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Added memory fence to xt_rsil(). Without this the compiler may use #6301

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Merged
merged 1 commit into from
Jul 14, 2019
Merged

Added memory fence to xt_rsil(). Without this the compiler may use #6301

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2 changes: 1 addition & 1 deletion cores/esp8266/Arduino.h
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Original file line number Diff line number Diff line change
Expand Up @@ -159,7 +159,7 @@ void ets_intr_unlock();
// level 15 will disable ALL interrupts,
// level 0 will enable ALL interrupts,
//
#define xt_rsil(level) (__extension__({uint32_t state; __asm__ __volatile__("rsil %0," __STRINGIFY(level) : "=a" (state)); state;}))
#define xt_rsil(level) (__extension__({uint32_t state; __asm__ __volatile__("rsil %0," __STRINGIFY(level) : "=a" (state) :: "memory"); state;}))
#define xt_wsr_ps(state) __asm__ __volatile__("wsr %0,ps; isync" :: "a" (state) : "memory")

#define interrupts() xt_rsil(0)
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