[JIT][arm64] CSE for VSD calls

[EgorBo]

void Test(IDisposable d) => d.Dispose();

Currently emits:

; Method Program:Test(System.IDisposable):this
G_M50981_IG01:              ;; offset=0000H
        A9BF7BFD          stp     fp, lr, [sp,#-16]!
        910003FD          mov     fp, sp
						;; bbWeight=1    PerfScore 1.50

G_M50981_IG02:              ;; offset=0008H
        AA0103E0          mov     x0, x1
        D280080B          movz    x11, #64
        F2B9BB8B          movk    x11, #0xcddc LSL #16
        F2CFFFAB          movk    x11, #0x7ffd LSL #32
        D2800801          movz    x1, #64
        F2B9BB81          movk    x1, #0xcddc LSL #16
        F2CFFFA1          movk    x1, #0x7ffd LSL #32
        F9400021          ldr     x1, [x1]
						;; bbWeight=1    PerfScore 6.50

G_M50981_IG03:              ;; offset=0028H
        A8C17BFD          ldp     fp, lr, [sp],#16
        D61F0020          br      x1
						;; bbWeight=1    PerfScore 2.00
; Total bytes of code: 48

Expected codegen:

; Method Program:Test(System.IDisposable):this
G_M50981_IG01:              ;; offset=0000H
        A9BF7BFD          stp     fp, lr, [sp,#-16]!
        910003FD          mov     fp, sp
						;; bbWeight=1    PerfScore 1.50

G_M50981_IG02:              ;; offset=0008H
        AA0103E0          mov     x0, x1
        D2800801          movz    x1, #64
        F2B9BB81          movk    x1, #0xcddc LSL #16
        F2CFFFA1          movk    x1, #0x7ffd LSL #32
        F9400021          ldr     x1, [x1]
						;; bbWeight=1    PerfScore 6.50

G_M50981_IG03:              ;; offset=0028H
        A8C17BFD          ldp     fp, lr, [sp],#16
        D61F0020          br      x1
						;; bbWeight=1    PerfScore 2.00

/cc @dotnet/jit-contrib

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Issue Details

---

    void Test(IDisposable d)
    {
        // emulating GDV:
        if (d is not MySealedDisposeImpl)
            d.Dispose();
    }

    public void Dispose() {}

Currently emits:

; Method Program:Test(System.IDisposable):this
G_M50981_IG01:              ;; offset=0000H
        A9BF7BFD          stp     fp, lr, [sp,#-16]!
        910003FD          mov     fp, sp
						;; bbWeight=1    PerfScore 1.50

G_M50981_IG02:              ;; offset=0008H
        AA0103E0          mov     x0, x1
        B40000E0          cbz     x0, G_M50981_IG04
						;; bbWeight=1    PerfScore 1.50

G_M50981_IG03:              ;; offset=0010H
        F9400000          ldr     x0, [x0]
        D2835D0B          movz    x11, #0x1ae8
        F2B9C7EB          movk    x11, #0xce3f LSL #16
        F2CFFFAB          movk    x11, #0x7ffd LSL #32
        EB0B001F          cmp     x0, x11
        54000041          bne     G_M50981_IG05
						;; bbWeight=0.25 PerfScore 1.50

G_M50981_IG04:              ;; offset=0028H
        B5000161          cbnz    x1, G_M50981_IG07
						;; bbWeight=0.50 PerfScore 0.50

G_M50981_IG05:              ;; offset=002CH
        AA0103E0          mov     x0, x1
        D280080B          movz    x11, #64
        F2B9BBEB          movk    x11, #0xcddf LSL #16
        F2CFFFAB          movk    x11, #0x7ffd LSL #32
        D2800801          movz    x1, #64
        F2B9BBE1          movk    x1, #0xcddf LSL #16
        F2CFFFA1          movk    x1, #0x7ffd LSL #32
        F9400021          ldr     x1, [x1]
						;; bbWeight=0.50 PerfScore 3.25

G_M50981_IG06:              ;; offset=004CH
        A8C17BFD          ldp     fp, lr, [sp],#16
        D61F0020          br      x1
						;; bbWeight=0.50 PerfScore 1.00

G_M50981_IG07:              ;; offset=0054H
        A8C17BFD          ldp     fp, lr, [sp],#16
        D65F03C0          ret     lr
						;; bbWeight=0.50 PerfScore 1.00
; Total bytes of code: 92

can we use relocs here or it's some AltJit thing?
/cc @dotnet/jit-contrib

Author:	EgorBo
Assignees:	-
Labels:	tenet-performance, area-CodeGen-coreclr, untriaged
Milestone:	-

[AndyAyersMS]

You mean instead of those composed immediates? I don't think there's much we can do on that front.

We should however do a better job of CSEing these, or (if this happens in say lower) be smarter about not gratuitously duplicating handle nodes.

        D280080B          movz    x11, #64
        F2B9BBEB          movk    x11, #0xcddf LSL #16
        F2CFFFAB          movk    x11, #0x7ffd LSL #32
        D2800801          movz    x1, #64
        F2B9BBE1          movk    x1, #0xcddf LSL #16
        F2CFFFA1          movk    x1, #0x7ffd LSL #32

[EgorBo]

You mean instead of those composed immediates? I don't think there's much we can do on that front.

We should however do a better job of CSEing these, or (if this happens in say lower) be smarter about not gratuitously duplicating handle nodes.

        D280080B          movz    x11, #64
        F2B9BBEB          movk    x11, #0xcddf LSL #16
        F2CFFFAB          movk    x11, #0x7ffd LSL #32
        D2800801          movz    x1, #64
        F2B9BBE1          movk    x1, #0xcddf LSL #16
        F2CFFFA1          movk    x1, #0x7ffd LSL #32

good point, but looks like the second constant appears in lowering after CSE (#47808 related?)

[AndyAyersMS]

Similar -- #47808 was for virtual calls. This is an interface call (VSD).

We could try to expose this earlier too, and give CSE a chance to work, but it might also be fairly easy to fix in lowering itself as we have to load the thing in a register anyways.

[EgorBo]

@AndyAyersMS regarding the relocs - I was thinking of a dedicated reg always pointing to the start of a separated heap for Type objects (and string literals) so we could always use relative addressing for those - but it's just thinking out loud

[AndyAyersMS]

Related Shared constant CSEs should get you something similar, right? Just that the "base" address would be selected based on the actual constants that appear in the IR.

Right now we allow a limited form of this, perhaps we should expand it?

[jakobbotsch]

We already do the optimization but it's turned off for tailcalls. I have #59602 that fixes it.

[jakobbotsch]

This was actually fixed with #56669.