From 2cbd41f54d6a47c003eb980ead00d2607fa8e40f Mon Sep 17 00:00:00 2001 From: Peter Marheine Date: Sun, 13 Jul 2025 13:45:04 +1000 Subject: [PATCH 1/3] soc: rp2350: correctly handle GPIOs >31 RP2350 has 48 GPIOs, where only the first 30 are broken out to pins on RP2350A (same as RP2040) and the remaining 18 are only usable on RP2350B. This change makes the soc pinctrl driver support GPIOs above 31, where previously it was impossible to configure GPIOs 32 through 47. Tested on RP2350B, confirming that GPIO44 can be correctly configured for PWM. Signed-off-by: Peter Marheine --- include/zephyr/dt-bindings/pinctrl/rpi-pico-pinctrl-common.h | 2 +- soc/raspberrypi/rpi_pico/common/pinctrl_soc.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/zephyr/dt-bindings/pinctrl/rpi-pico-pinctrl-common.h b/include/zephyr/dt-bindings/pinctrl/rpi-pico-pinctrl-common.h index a1b396d1dd60a..0f575a8d8f556 100644 --- a/include/zephyr/dt-bindings/pinctrl/rpi-pico-pinctrl-common.h +++ b/include/zephyr/dt-bindings/pinctrl/rpi-pico-pinctrl-common.h @@ -12,7 +12,7 @@ #define RP2_ALT_FUNC_MASK 0xf #define RP2_PIN_NUM_POS 5 -#define RP2_PIN_NUM_MASK 0x1f +#define RP2_PIN_NUM_MASK 0x3f #define RP2_GPIO_OVERRIDE_NORMAL 0 #define RP2_GPIO_OVERRIDE_INVERT 1 diff --git a/soc/raspberrypi/rpi_pico/common/pinctrl_soc.h b/soc/raspberrypi/rpi_pico/common/pinctrl_soc.h index 35a7d3aee8c5e..82a55cd84db0b 100644 --- a/soc/raspberrypi/rpi_pico/common/pinctrl_soc.h +++ b/soc/raspberrypi/rpi_pico/common/pinctrl_soc.h @@ -13,8 +13,8 @@ * @brief Type to hold a pin's pinctrl configuration. */ struct rpi_pinctrl_soc_pin { - /** Pin number 0..29 */ - uint32_t pin_num: 5; + /** Pin number 0..29 on RP2040, 0..47 on RP2350 */ + uint32_t pin_num: 6; /** Alternative function (UART, SPI, etc.) */ uint32_t alt_func: 5; /** Maximum current used by a pin, in mA */ From a5bde82f2df3f8bc9613bd613f13011fb5168580 Mon Sep 17 00:00:00 2001 From: Peter Marheine Date: Tue, 5 Aug 2025 14:01:36 +1000 Subject: [PATCH 2/3] soc: rp2350: support PWM channels >8 RP2350 adds four more PWM slices from the eight available on RP2040, which are only broken out to package pins on RP2350B. This change fixes the driver to support the correct number of slices on RP2350. Tested by confirming that PWM can correctly be configured on GPIO 44 of RP2350B. Signed-off-by: Peter Marheine --- drivers/pwm/pwm_rpi_pico.c | 26 ++++++++++------ dts/bindings/pwm/raspberrypi,pico-pwm.yaml | 36 ++++++++++++++++++++++ 2 files changed, 52 insertions(+), 10 deletions(-) diff --git a/drivers/pwm/pwm_rpi_pico.c b/drivers/pwm/pwm_rpi_pico.c index 98fefe1aad630..1e54964a61b6f 100644 --- a/drivers/pwm/pwm_rpi_pico.c +++ b/drivers/pwm/pwm_rpi_pico.c @@ -17,8 +17,21 @@ LOG_MODULE_REGISTER(pwm_rpi_pico, CONFIG_PWM_LOG_LEVEL); #include #include +/* + * pico-sdk defines PWM_NUM_SLICES with a 'u' suffix for unsigned, which + * doesn't work with LISTIFY later on in this file. + */ +#ifdef CONFIG_SOC_SERIES_RP2350 +#define PWM_RPI_PICO_NUM_SLICES 12 +#else +#define PWM_RPI_PICO_NUM_SLICES 8 +#endif +BUILD_ASSERT(NUM_PWM_SLICES == PWM_RPI_PICO_NUM_SLICES, + "PWM_RPI_PICO_NUM_SLICES misconfigured for SOC"); + #define PWM_RPI_PICO_COUNTER_TOP_MAX UINT16_MAX -#define PWM_RPI_NUM_CHANNELS (16U) +#define PWM_RPI_NUM_CHANNELS (2 * NUM_PWM_SLICES) + struct pwm_rpi_slice_config { uint8_t integral; @@ -193,7 +206,7 @@ static int pwm_rpi_init(const struct device *dev) return 0; } -#define PWM_INST_RPI_SLICE_DIVIDER(idx, n) \ +#define PWM_INST_RPI_SLICE_DIVIDER(n, idx) \ { \ .integral = DT_INST_PROP_OR(idx, UTIL_CAT(divider_int_, n), 0), \ .frac = DT_INST_PROP_OR(idx, UTIL_CAT(divider_frac_, n), 0), \ @@ -206,14 +219,7 @@ static int pwm_rpi_init(const struct device *dev) .pwm_controller = (pwm_hw_t *)DT_INST_REG_ADDR(idx), \ .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \ .slice_configs = { \ - PWM_INST_RPI_SLICE_DIVIDER(idx, 0), \ - PWM_INST_RPI_SLICE_DIVIDER(idx, 1), \ - PWM_INST_RPI_SLICE_DIVIDER(idx, 2), \ - PWM_INST_RPI_SLICE_DIVIDER(idx, 3), \ - PWM_INST_RPI_SLICE_DIVIDER(idx, 4), \ - PWM_INST_RPI_SLICE_DIVIDER(idx, 5), \ - PWM_INST_RPI_SLICE_DIVIDER(idx, 6), \ - PWM_INST_RPI_SLICE_DIVIDER(idx, 7), \ + LISTIFY(PWM_RPI_PICO_NUM_SLICES, PWM_INST_RPI_SLICE_DIVIDER, (,), idx) \ }, \ .reset = RESET_DT_SPEC_INST_GET(idx), \ .clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(idx)), \ diff --git a/dts/bindings/pwm/raspberrypi,pico-pwm.yaml b/dts/bindings/pwm/raspberrypi,pico-pwm.yaml index 6e29eb132ee39..98031fa5f5c97 100644 --- a/dts/bindings/pwm/raspberrypi,pico-pwm.yaml +++ b/dts/bindings/pwm/raspberrypi,pico-pwm.yaml @@ -87,6 +87,42 @@ properties: type: int description: See divider-frac-0 for help + divider-int-8: + type: int + description: | + See divider-int-0 for help, however this PWM slice is not available on + RP2040. + + divider-frac-8: + type: int + description: | + See divider-frac-0 for help, however this PWM slice is not available on + RP2040. + + divider-int-9: + type: int + description: See divider-int-8 for help + + divider-frac-9: + type: int + description: See divider-frac-8 for help + + divider-int-10: + type: int + description: See divider-int-8 for help + + divider-frac-10: + type: int + description: See divider-frac-8 for help + + divider-int-11: + type: int + description: See divider-int-8 for help + + divider-frac-11: + type: int + description: See divider-frac-8 for help + "#pwm-cells": const: 3 From 823d0a95babda7bac8c1bfb49eb85cae9cd786c2 Mon Sep 17 00:00:00 2001 From: Peter Marheine Date: Tue, 5 Aug 2025 14:02:55 +1000 Subject: [PATCH 3/3] dt-bindings: rp2350: correct PWM names for GPIOs 40..47 The macros for PWM output on these GPIOs had names that referred to PWM channels that do no exist on this chip- it only has 12 channels, where channels 8..11 are exposed on both GPIOs 32..39 and 40..47. Signed-off-by: Peter Marheine --- .../pinctrl/rpi-pico-rp2350b-pinctrl.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/zephyr/dt-bindings/pinctrl/rpi-pico-rp2350b-pinctrl.h b/include/zephyr/dt-bindings/pinctrl/rpi-pico-rp2350b-pinctrl.h index 7f53cf559fd62..d4e5e436c22ef 100644 --- a/include/zephyr/dt-bindings/pinctrl/rpi-pico-rp2350b-pinctrl.h +++ b/include/zephyr/dt-bindings/pinctrl/rpi-pico-rp2350b-pinctrl.h @@ -79,14 +79,14 @@ #define PWM_10B_P37 RP2XXX_PINMUX(37, RP2_PINCTRL_GPIO_FUNC_PWM) #define PWM_11A_P38 RP2XXX_PINMUX(38, RP2_PINCTRL_GPIO_FUNC_PWM) #define PWM_11B_P39 RP2XXX_PINMUX(39, RP2_PINCTRL_GPIO_FUNC_PWM) -#define PWM_12A_P40 RP2XXX_PINMUX(40, RP2_PINCTRL_GPIO_FUNC_PWM) -#define PWM_12B_P41 RP2XXX_PINMUX(41, RP2_PINCTRL_GPIO_FUNC_PWM) -#define PWM_13A_P42 RP2XXX_PINMUX(42, RP2_PINCTRL_GPIO_FUNC_PWM) -#define PWM_13B_P43 RP2XXX_PINMUX(43, RP2_PINCTRL_GPIO_FUNC_PWM) -#define PWM_14A_P44 RP2XXX_PINMUX(44, RP2_PINCTRL_GPIO_FUNC_PWM) -#define PWM_14B_P45 RP2XXX_PINMUX(45, RP2_PINCTRL_GPIO_FUNC_PWM) -#define PWM_15A_P46 RP2XXX_PINMUX(46, RP2_PINCTRL_GPIO_FUNC_PWM) -#define PWM_15B_P47 RP2XXX_PINMUX(47, RP2_PINCTRL_GPIO_FUNC_PWM) +#define PWM_8A_P40 RP2XXX_PINMUX(40, RP2_PINCTRL_GPIO_FUNC_PWM) +#define PWM_8B_P41 RP2XXX_PINMUX(41, RP2_PINCTRL_GPIO_FUNC_PWM) +#define PWM_9A_P42 RP2XXX_PINMUX(42, RP2_PINCTRL_GPIO_FUNC_PWM) +#define PWM_9B_P43 RP2XXX_PINMUX(43, RP2_PINCTRL_GPIO_FUNC_PWM) +#define PWM_10A_P44 RP2XXX_PINMUX(44, RP2_PINCTRL_GPIO_FUNC_PWM) +#define PWM_10B_P45 RP2XXX_PINMUX(45, RP2_PINCTRL_GPIO_FUNC_PWM) +#define PWM_11A_P46 RP2XXX_PINMUX(46, RP2_PINCTRL_GPIO_FUNC_PWM) +#define PWM_11B_P47 RP2XXX_PINMUX(47, RP2_PINCTRL_GPIO_FUNC_PWM) #define PIO0_P30 RP2XXX_PINMUX(30, RP2_PINCTRL_GPIO_FUNC_PIO0) #define PIO0_P31 RP2XXX_PINMUX(31, RP2_PINCTRL_GPIO_FUNC_PIO0)