diff --git a/boards/st/stm32n6570_dk/Kconfig.sysbuild b/boards/st/stm32n6570_dk/Kconfig.sysbuild
new file mode 100644
index 0000000000000..2b9d0e5494108
--- /dev/null
+++ b/boards/st/stm32n6570_dk/Kconfig.sysbuild
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: Apache-2.0
+# Copyright (c) 2025 STMicroelectronics
+
+choice BOOTLOADER
+	default BOOTLOADER_MCUBOOT
+endchoice
diff --git a/boards/st/stm32n6570_dk/board.cmake b/boards/st/stm32n6570_dk/board.cmake
index becac84524af7..bf5df373a5dfd 100644
--- a/boards/st/stm32n6570_dk/board.cmake
+++ b/boards/st/stm32n6570_dk/board.cmake
@@ -9,7 +9,15 @@ else()
   board_runner_args(stm32cubeprogrammer "--port=swd")
   board_runner_args(stm32cubeprogrammer "--tool-opt= mode=HOTPLUG ap=1")
   board_runner_args(stm32cubeprogrammer "--extload=MX66UW1G45G_STM32N6570-DK.stldr")
-  board_runner_args(stm32cubeprogrammer "--download-address=0x70000000")
+
+  set(app_base_addr 0x70000000)
+  if(CONFIG_BOOTLOADER_MCUBOOT)
+    dt_nodelabel(slot0_partition NODELABEL "slot0_partition" REQUIRED)
+    dt_reg_addr(slot0_partition_addr PATH ${slot0_partition})
+    math(EXPR app_base_addr "${app_base_addr} + ${slot0_partition_addr}")
+  endif()
+    board_runner_args(stm32cubeprogrammer "--download-address=${app_base_addr}")
 endif()
 
+
 include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
diff --git a/boards/st/stm32n6570_dk/board.yml b/boards/st/stm32n6570_dk/board.yml
index 2bdf8abd80e26..4d58a17af312b 100644
--- a/boards/st/stm32n6570_dk/board.yml
+++ b/boards/st/stm32n6570_dk/board.yml
@@ -6,3 +6,4 @@ board:
     - name: stm32n657xx
       variants:
         - name: sb
+        - name: fsbl
diff --git a/boards/st/stm32n6570_dk/doc/index.rst b/boards/st/stm32n6570_dk/doc/index.rst
index dd66f90d77f46..5e26587d6f8cf 100644
--- a/boards/st/stm32n6570_dk/doc/index.rst
+++ b/boards/st/stm32n6570_dk/doc/index.rst
@@ -176,6 +176,20 @@ Serial Port
 STM32N6570_DK board has 10 U(S)ARTs. The Zephyr console output is assigned to
 USART1. Default settings are 115200 8N1.
 
+Board variants
+**************
+
+Three variants are available with STM32N6570_DK:
+
+- Default variant. Available as a chainloaded application which should be loaded by a
+  Boot Loader, it has access to the whole AXISRAM1 and AXISRAM2 regions.
+- ``fsbl``: First Stage Boot Loader (FSBL) which is available as an application loaded by the
+  Boot ROM and flashed using ST-Link. This is typically a Boot Loader image. It runs
+  in RAM LOAD mode on second half of AXISRAM2. 511K are available for the whole image.
+- ``sb``: First Stage Boot Loader - Serial Boot. Equivalent to the FSBL image, but could be
+  loaded using USB and doesn't require switching the bootpins. This is the most practical
+  for developments steps.
+
 Programming and Debugging
 *************************
 
@@ -216,13 +230,26 @@ First, connect the STM32N6570_DK to your host computer using the ST-Link USB por
 
    .. tabs::
 
-      .. group-tab:: ST-Link
+      .. group-tab:: Application image
 
-         Build and flash an application using ``stm32n6570_dk`` target.
+         Build and flash an application loaded by MCUBoot.
 
          .. zephyr-app-commands::
             :zephyr-app: samples/hello_world
             :board: stm32n6570_dk
+            :west-args: --sysbuild
+            :goals: build flash
+
+         By default, application runs in XIP mode. Add ``-DSB_CONFIG_MCUBOOT_MODE_RAM_LOAD=y``
+         to use RAMLOAD mode.
+
+      .. group-tab:: FSBL - ST-Link
+
+         Build and flash an application using ``stm32n6570_dk/stm32n657xx/fsbl`` target.
+
+         .. zephyr-app-commands::
+            :zephyr-app: samples/hello_world
+            :board: stm32n6570_dk//fsbl
             :goals: build flash
 
          .. note::
@@ -237,7 +264,7 @@ First, connect the STM32N6570_DK to your host computer using the ST-Link USB por
 
 	    Power off and on the board again.
 
-      .. group-tab:: Serial Boot Loader (USB)
+      .. group-tab:: FSBL - Serial Boot Loader (USB)
 
          Additionally, connect the STM32N6570_DK to your host computer using the USB port.
          In this configuration, ST-Link is used to power the board and for serial communication
diff --git a/boards/st/stm32n6570_dk/stm32n6570_dk.dts b/boards/st/stm32n6570_dk/stm32n6570_dk.dts
index 82bb8b72dde72..fdde09677866f 100644
--- a/boards/st/stm32n6570_dk/stm32n6570_dk.dts
+++ b/boards/st/stm32n6570_dk/stm32n6570_dk.dts
@@ -10,4 +10,8 @@
 / {
 	model = "STMicroelectronics STM32N6570 Discovery Kit board";
 	compatible = "st,stm32n6570-dk";
+
+	chosen {
+		zephyr,sram = &axisram1;
+	};
 };
diff --git a/boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi b/boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi
index 6eddc4fca8bb3..82d205daf452a 100644
--- a/boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi
+++ b/boards/st/stm32n6570_dk/stm32n6570_dk_common.dtsi
@@ -22,6 +22,9 @@
 		zephyr,display = &ltdc;
 		zephyr,touch = &gt911;
 		spi-flash0 = &mx66uw1g45g;
+		zephyr,flash-controller = &mx66uw1g45g;
+		zephyr,flash = &mx66uw1g45g;
+		zephyr,code-partition = &slot0_partition;
 	};
 
 	aliases {
@@ -292,7 +295,7 @@ zephyr_udc0: &usbotg_hs1 {
 		     &xspim_p1_io15_pp15>;
 	pinctrl-names = "default";
 	clocks = <&rcc STM32_CLOCK(AHB5, 5)>,
-		 <&rcc STM32_SRC_IC3 XSPI1_SEL(2)>,
+		 <&rcc STM32_SRC_HCLK5 XSPI1_SEL(0)>,
 		 <&rcc STM32_CLOCK(AHB5, 13)>;
 	status = "okay";
 
@@ -336,9 +339,27 @@ zephyr_udc0: &usbotg_hs1 {
 			#address-cells = <1>;
 			#size-cells = <1>;
 
-			storage_partition: partition@7ff0000 {
+			/*
+			 * Following flash partition is dedicated to the use of bootloader
+			 */
+			boot_partition: partition@0 {
+				label = "mcuboot";
+				reg = <0x00000000 DT_SIZE_K(256)>;
+			};
+
+			slot0_partition: partition@10000 {
+				label = "image-0";
+				reg = <0x10000 DT_SIZE_K(1536)>;
+			};
+
+			slot1_partition: partition@210000 {
+				label = "image-1";
+				reg = <0x210000 DT_SIZE_K(1536)>;
+			};
+
+			storage_partition: partition@410000 {
 				label = "storage";
-				reg = <0x7ff0000 DT_SIZE_K(64)>;
+				reg = <0x410000 DT_SIZE_K(64)>;
 			};
 		};
 	};
diff --git a/boards/st/stm32n6570_dk/stm32n6570_dk_defconfig b/boards/st/stm32n6570_dk/stm32n6570_dk_defconfig
index 01abfa9c0b7ff..171f70e58c8bd 100644
--- a/boards/st/stm32n6570_dk/stm32n6570_dk_defconfig
+++ b/boards/st/stm32n6570_dk/stm32n6570_dk_defconfig
@@ -16,6 +16,3 @@ CONFIG_ARM_MPU=y
 
 # Enable HW stack protection
 CONFIG_HW_STACK_PROTECTION=y
-
-# No internal Flash
-CONFIG_XIP=n
diff --git a/boards/st/stm32n6570_dk/stm32n6570_dk_stm32n657xx_fsbl.dts b/boards/st/stm32n6570_dk/stm32n6570_dk_stm32n657xx_fsbl.dts
new file mode 100644
index 0000000000000..6b46d7365d922
--- /dev/null
+++ b/boards/st/stm32n6570_dk/stm32n6570_dk_stm32n657xx_fsbl.dts
@@ -0,0 +1,13 @@
+/*
+ * Copyright (c) 2025 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include "stm32n6570_dk_common.dtsi"
+
+/ {
+	model = "STMicroelectronics STM32N6570 Discovery Kit board";
+	compatible = "st,stm32n6570-dk-fsbl";
+};
diff --git a/boards/st/stm32n6570_dk/stm32n6570_dk_stm32n657xx_fsbl_defconfig b/boards/st/stm32n6570_dk/stm32n6570_dk_stm32n657xx_fsbl_defconfig
new file mode 100644
index 0000000000000..01abfa9c0b7ff
--- /dev/null
+++ b/boards/st/stm32n6570_dk/stm32n6570_dk_stm32n657xx_fsbl_defconfig
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: Apache-2.0
+# Copyright (c) 2024 STMicroelectronics
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable HW stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# No internal Flash
+CONFIG_XIP=n
diff --git a/boards/st/stm32n6570_dk/sysbuild.cmake b/boards/st/stm32n6570_dk/sysbuild.cmake
new file mode 100644
index 0000000000000..1977836d7236d
--- /dev/null
+++ b/boards/st/stm32n6570_dk/sysbuild.cmake
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: Apache-2.0
+# Copyright (c) 2025 STMicroelectronics
+
+if(SB_CONFIG_BOOTLOADER_MCUBOOT)
+  set_target_properties(mcuboot PROPERTIES BOARD stm32n6570_dk/stm32n657xx/fsbl)
+endif()
diff --git a/dts/arm/st/n6/stm32n657X0.dtsi b/dts/arm/st/n6/stm32n657X0.dtsi
index b503ffed905d7..7be632681572b 100644
--- a/dts/arm/st/n6/stm32n657X0.dtsi
+++ b/dts/arm/st/n6/stm32n657X0.dtsi
@@ -8,11 +8,13 @@
 
 / {
 	axisram1: memory@34000000 {
-		/* 400 kB of FLEXRAM followed by 624 kB of AXISRAM1 */
-		reg = <0x34000000 (DT_SIZE_K(400) + DT_SIZE_K(624))>;
+		/* This section is the RAM available to the chainloaded application */
+		/* 400 kB of FLEXRAM followed by 624 kB of AXISRAM1 + AXISRAM2 */
+		reg = <0x34000000 (DT_SIZE_K(400) + DT_SIZE_K(624) + DT_SIZE_M(1))>;
 	};
 
 	axisram2: memory@34180400 {
+		/* This section is the RAM available to FSBL application */
 		reg = <0x34180400 DT_SIZE_K(511)>;
 	};
 };
diff --git a/soc/st/stm32/stm32n6x/CMakeLists.txt b/soc/st/stm32/stm32n6x/CMakeLists.txt
index db6824e410970..c2a8c56b3c0d1 100644
--- a/soc/st/stm32/stm32n6x/CMakeLists.txt
+++ b/soc/st/stm32/stm32n6x/CMakeLists.txt
@@ -9,28 +9,34 @@ zephyr_include_directories(.)
 
 set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")
 
-if(${CMAKE_HOST_SYSTEM_NAME} STREQUAL Windows)
-  set(SIGNING_TOOL STM32_SigningTool_CLI.exe)
-else()
-  set(SIGNING_TOOL STM32_SigningTool_CLI)
-endif()
+zephyr_linker_sources_ifdef(CONFIG_BOOTLOADER_MCUBOOT SECTIONS ram_check.ld)
 
-find_file(SIGNING_TOOL_FIND ${SIGNING_TOOL})
-if(SIGNING_TOOL_FIND STREQUAL SIGNING_TOOL_FIND-NOTFOUND)
-  message(WARNING "
-  Signing Image tool (${SIGNING_TOOL}) is not available.
-  Signed image will not be generated.
-  You won't be able to run application on the board.
-  Refer to board documentation for more information")
-else()
-  set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
-    COMMAND ${SIGNING_TOOL}
-    -in ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.bin
-    -nk -t fsbl -hv 2.3 --silent
-    -o ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.signed.bin
-    -dump ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.signed.bin
-    WORKING_DIRECTORY ${PROJECT_BINARY_DIR}
-  )
+if(NOT CONFIG_BOOTLOADER_MCUBOOT)
+
+  if(${CMAKE_HOST_SYSTEM_NAME} STREQUAL Windows)
+    set(SIGNING_TOOL STM32_SigningTool_CLI.exe)
+  else()
+    set(SIGNING_TOOL STM32_SigningTool_CLI)
+  endif()
+
+  find_file(SIGNING_TOOL_FIND ${SIGNING_TOOL})
+  if(SIGNING_TOOL_FIND STREQUAL SIGNING_TOOL_FIND-NOTFOUND)
+    message(WARNING "
+    Signing Image tool (${SIGNING_TOOL}) is not available.
+    Signed image will not be generated.
+    You won't be able to run application on the board.
+    Refer to board documentation for more information")
+  else()
+    set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
+      COMMAND ${SIGNING_TOOL}
+      -in ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.bin
+      -nk -t fsbl -hv 2.3 --silent
+      -o ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.signed.bin
+      -dump ${PROJECT_BINARY_DIR}/${CONFIG_KERNEL_BIN_NAME}.signed.bin
+      WORKING_DIRECTORY ${PROJECT_BINARY_DIR}
+    )
+
+    set_property(TARGET runners_yaml_props_target PROPERTY bin_file ${CONFIG_KERNEL_BIN_NAME}.signed.bin)
+  endif()
 
-  set_property(TARGET runners_yaml_props_target PROPERTY bin_file ${CONFIG_KERNEL_BIN_NAME}.signed.bin)
 endif()
diff --git a/soc/st/stm32/stm32n6x/Kconfig.defconfig b/soc/st/stm32/stm32n6x/Kconfig.defconfig
index 4f92e59ac9c9b..7b9d8dfd01351 100644
--- a/soc/st/stm32/stm32n6x/Kconfig.defconfig
+++ b/soc/st/stm32/stm32n6x/Kconfig.defconfig
@@ -18,4 +18,7 @@ config STM32_LTDC_FB_SMH_ALIGN
 	default 256 if MEMC_STM32_XSPI_PSRAM && SHARED_MULTI_HEAP && \
 		       STM32_LTDC_FB_USE_SHARED_MULTI_HEAP
 
+config ROM_START_OFFSET
+	default 0x400 if BOOTLOADER_MCUBOOT
+
 endif # SOC_SERIES_STM32N6X
diff --git a/soc/st/stm32/stm32n6x/ram_check.ld b/soc/st/stm32/stm32n6x/ram_check.ld
new file mode 100644
index 0000000000000..705989c5e17bc
--- /dev/null
+++ b/soc/st/stm32/stm32n6x/ram_check.ld
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2025 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/devicetree.h>
+#include <zephyr/linker/linker-defs.h>
+
+#define MCUBOOT_START_ADDR DT_PROP_BY_IDX(DT_NODELABEL(axisram2), reg, 0)
+
+ASSERT((__kernel_ram_start < (MCUBOOT_START_ADDR - CONFIG_ROM_START_OFFSET)),
+       "
+       Image is too large to fit RAMLOAD configuration. Consider using XIP.
+       ")
diff --git a/west.yml b/west.yml
index a9d47b902c636..ef3927c13acf5 100644
--- a/west.yml
+++ b/west.yml
@@ -245,7 +245,7 @@ manifest:
       groups:
         - hal
     - name: hal_stm32
-      revision: 468e5ad450a75d4baa3eed80e4f77a7700b71203
+      revision: 2aa79063bfe82c967bf1aa8f1995f04f6dc352db
       path: modules/hal/stm32
       groups:
         - hal