diff --git a/boards/st/nucleo_wba65ri/Kconfig.defconfig b/boards/st/nucleo_wba65ri/Kconfig.defconfig index 8e937f2a6ad12..273cc20ccdd80 100644 --- a/boards/st/nucleo_wba65ri/Kconfig.defconfig +++ b/boards/st/nucleo_wba65ri/Kconfig.defconfig @@ -10,4 +10,16 @@ config SPI_STM32_INTERRUPT default y depends on SPI +if BUILD_WITH_TFM + +# Not defining LIBC malloc arena has the effect of declaring all available RAM +# as available for malloc. +# This currently conflicts with TF-M MPU setting, resulting in a hard fault. +# Define a specific size to avoid this situation. + +config COMMON_LIBC_MALLOC_ARENA_SIZE + default 2048 + +endif # BUILD_WITH_TFM + endif # BOARD_NUCLEO_WBA65RI diff --git a/boards/st/nucleo_wba65ri/board.cmake b/boards/st/nucleo_wba65ri/board.cmake index 828d1f367ab24..b501f4b0d3c93 100644 --- a/boards/st/nucleo_wba65ri/board.cmake +++ b/boards/st/nucleo_wba65ri/board.cmake @@ -1,6 +1,31 @@ # SPDX-License-Identifier: Apache-2.0 -board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") +if(CONFIG_BUILD_WITH_TFM) + set(FLASH_BASE_ADDRESS_S 0x0C000000) + + # Flash merged TF-M + Zephyr binary + set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex) + + if (CONFIG_HAS_FLASH_LOAD_OFFSET) + MATH(EXPR TFM_HEX_BASE_ADDRESS_NS "${FLASH_BASE_ADDRESS_S}+${CONFIG_FLASH_LOAD_OFFSET}") + else() + set(TFM_HEX_BASE_ADDRESS_NS ${TFM_FLASH_BASE_ADDRESS_S}) + endif() + + # System entry point is TF-M vector, located 1kByte after tfm_fmw_partition in DTS + get_target_property(TFM_FWM_NODE_NAME devicetree_target "DT_NODELABEL|slot0_secure_partition") + string(REGEX REPLACE ".*@([^@]+)$" "\\1" TFM_FWM_OFFSET "${TFM_FWM_NODE_NAME}") + if(NOT TFM_FWM_OFFSET) + message(FATAL_ERROR "Could not find TF-M firmware offset from node label slot0_secure_partition") + endif() + math(EXPR TFM_FWM_BOOT_ADDR "0x${TFM_FWM_OFFSET}+${FLASH_BASE_ADDRESS_S}+0x400") + + board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw" + "--erase" "--start-address=${TFM_FWM_BOOT_ADDR}" + ) +else() + board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") +endif() include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-stm32.board.cmake) diff --git a/boards/st/nucleo_wba65ri/board.yml b/boards/st/nucleo_wba65ri/board.yml index 01a51d7715d1e..7d69dba2e215b 100644 --- a/boards/st/nucleo_wba65ri/board.yml +++ b/boards/st/nucleo_wba65ri/board.yml @@ -4,3 +4,5 @@ board: vendor: st socs: - name: stm32wba65xx + variants: + - name: ns diff --git a/boards/st/nucleo_wba65ri/doc/nucleo_wba65ri.rst b/boards/st/nucleo_wba65ri/doc/nucleo_wba65ri.rst index 1452d65987a31..c4edad4ef8b3f 100644 --- a/boards/st/nucleo_wba65ri/doc/nucleo_wba65ri.rst +++ b/boards/st/nucleo_wba65ri/doc/nucleo_wba65ri.rst @@ -152,6 +152,45 @@ Supported Features .. zephyr:board-supported-hw:: +Zephyr board options +==================== + +Zephyr supports building both Secure and Non-Secure firmware for +Nucleo WBA65RI board. + +The BOARD options are summarized below: + ++---------------------------------+------------------------------------------+ +| BOARD | Description | ++=================================+==========================================+ +| stm32wba65i_dk1 | For building TrustZone Disabled firmware | ++---------------------------------+------------------------------------------+ +| stm32wba65i_dk1/stm32wba65xx/ns | For building Non-Secure firmware | ++---------------------------------+------------------------------------------+ + +Here are the instructions to build Zephyr with a non-secure configuration, +using :zephyr:code-sample:`tfm_ipc` sample: + + .. code-block:: console + + $ west build -b nucleo_wba65ri/stm32wba65xx/ns samples/tfm_integration/tfm_ipc/ + +Once done, before flashing, you need to first run a generated script that +will set platform Option Bytes config and erase internal flash (among others, +Option Bit TZEN will be set). + + .. code-block:: bash + + $ ./build/tfm/api_ns/regression.sh + $ west flash + +Please note that, after having programmed the board for a TrustZone enabled system +(e.g. with ``./build/tfm/api_ns/regression.sh``), the SoC TZEN Option Byte is enabled +and you will need to operate specific sequence to disable this TZEN Option Byte +configuration to get your board back in normal state for booting with a TrustZone +disabled system (e.g. without TF-M support). +You can use STM32CubeProgrammer_ to disable the SoC TZEN Option Byte config. + Connections and IOs =================== diff --git a/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.dts b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.dts new file mode 100644 index 0000000000000..94e453b8f1bf6 --- /dev/null +++ b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.dts @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2025 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include "nucleo_wba65ri.dts" + +/ { + chosen { + zephyr,code-partition = &slot0_ns_partition; + }; +}; + + +&flash0 { + /delete-node/ partitions; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "bootstage"; + reg = <0 DT_SIZE_K(48)>; + }; + + slot0_secure_partition: partition@c000 { + label = "image-secure"; + reg = <0xc000 DT_SIZE_K(256)>; + }; + + slot0_ns_partition: partition@4c000 { + label = "image-non-secure"; + reg = <0x4c000 DT_SIZE_K(512)>; + }; + + storage_partition: partition@cc000 { + label = "storage"; + reg = <0xcc000 (DT_SIZE_M(1) - DT_SIZE_K(208))>; + }; + }; +}; diff --git a/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.yaml b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.yaml new file mode 100644 index 0000000000000..10a223c81415c --- /dev/null +++ b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.yaml @@ -0,0 +1,19 @@ +identifier: nucleo_wba65ri/stm32wba65xx/ns +name: ST STM32WBA65I Discovery kit with TF-M and non-secure firmware +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb +supported: + - gpio + - i2c + - spi + - adc + - rng + - arduino_gpio + - arduino_i2c + - arduino_spi +ram: 512 +flash: 2048 +vendor: st diff --git a/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns_defconfig b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns_defconfig new file mode 100644 index 0000000000000..7210d739a499f --- /dev/null +++ b/boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns_defconfig @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: Apache-2.0 +# Copyright (c) 2025 STMicroelectronics + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable GPIO +CONFIG_GPIO=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable the internal SMPS regulator +CONFIG_POWER_SUPPLY_DIRECT_SMPS=y + +# Enable TZ non-secure configuration +CONFIG_ARM_TRUSTZONE_M=y +CONFIG_RUNTIME_NMI=y +CONFIG_TRUSTED_EXECUTION_NONSECURE=y +CONFIG_BUILD_WITH_TFM=y +CONFIG_TFM_BL2=n diff --git a/boards/st/stm32wba65i_dk1/Kconfig.defconfig b/boards/st/stm32wba65i_dk1/Kconfig.defconfig new file mode 100644 index 0000000000000..a2f91d80f88dd --- /dev/null +++ b/boards/st/stm32wba65i_dk1/Kconfig.defconfig @@ -0,0 +1,25 @@ +# STM32WBA65I Discovery kit board configuration + +# Copyright (c) 2025 STMicroelectronics + +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_STM32WBA65I_DK1 + +config SPI_STM32_INTERRUPT + default y + depends on SPI + +if BUILD_WITH_TFM + +# Not defining LIBC malloc arena has the effect of declaring all available RAM +# as available for malloc. +# This currently conflicts with TF-M MPU setting, resulting in a hard fault. +# Define a specific size to avoid this situation. + +config COMMON_LIBC_MALLOC_ARENA_SIZE + default 2048 + +endif # BUILD_WITH_TFM + +endif # BOARD_STM32WBA65I_DK1 diff --git a/boards/st/stm32wba65i_dk1/Kconfig.stm32wba65i_dk1 b/boards/st/stm32wba65i_dk1/Kconfig.stm32wba65i_dk1 new file mode 100644 index 0000000000000..9fcfc52471d83 --- /dev/null +++ b/boards/st/stm32wba65i_dk1/Kconfig.stm32wba65i_dk1 @@ -0,0 +1,5 @@ +# Copyright (c) 2025 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_STM32WBA65I_DK1 + select SOC_STM32WBA65XX diff --git a/boards/st/stm32wba65i_dk1/arduino_r3_connector.dtsi b/boards/st/stm32wba65i_dk1/arduino_r3_connector.dtsi new file mode 100644 index 0000000000000..44e824e46644e --- /dev/null +++ b/boards/st/stm32wba65i_dk1/arduino_r3_connector.dtsi @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2025 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpioa 4 0>, /* A0 */ + <1 0 &gpioa 6 0>, /* A1 */ + <2 0 &gpioa 2 0>, /* A2 */ + <3 0 &gpioa 1 0>, /* A3 */ + <4 0 &gpioa 5 0>, /* A4 */ + <5 0 &gpioa 0 0>, /* A5 */ + <6 0 &gpioa 11 0>, /* D0 */ + <7 0 &gpioa 12 0>, /* D1 */ + <8 0 &gpioe 0 0>, /* D2 */ + <9 0 &gpiob 13 0>, /* D3 */ + <10 0 &gpioa 3 0>, /* D4 */ + <11 0 &gpiob 14 0>, /* D5 */ + <12 0 &gpiob 0 0>, /* D6 */ + <13 0 &gpiod 14 0>, /* D7 */ + <14 0 &gpioa 10 0>, /* D8 */ + <15 0 &gpiob 11 0>, /* D9 */ + <16 0 &gpiob 9 0>, /* D10 */ + <17 0 &gpioc 3 0>, /* D11 */ + <18 0 &gpioa 9 0>, /* D12 */ + <19 0 &gpiob 10 0>, /* D13 */ + <20 0 &gpiob 1 0>, /* D14 */ + <21 0 &gpiob 2 0>; /* D15 */ + }; +}; + +arduino_i2c: &i2c1 {}; +arduino_spi: &spi1 {}; diff --git a/boards/st/stm32wba65i_dk1/board.cmake b/boards/st/stm32wba65i_dk1/board.cmake new file mode 100644 index 0000000000000..73b95f582165f --- /dev/null +++ b/boards/st/stm32wba65i_dk1/board.cmake @@ -0,0 +1,32 @@ +# Copyright (c) 2025 STMicroelectronics +# SPDX-License-Identifier: Apache-2.0 + +if(CONFIG_BUILD_WITH_TFM) + set(FLASH_BASE_ADDRESS_S 0x0C000000) + + # Flash merged TF-M + Zephyr binary + set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex) + + if (CONFIG_HAS_FLASH_LOAD_OFFSET) + MATH(EXPR TFM_HEX_BASE_ADDRESS_NS "${FLASH_BASE_ADDRESS_S}+${CONFIG_FLASH_LOAD_OFFSET}") + else() + set(TFM_HEX_BASE_ADDRESS_NS ${TFM_FLASH_BASE_ADDRESS_S}) + endif() + + # System entry point is TF-M vector, located 1kByte after tfm_fmw_partition in DTS + get_target_property(TFM_FWM_NODE_NAME devicetree_target "DT_NODELABEL|slot0_secure_partition") + string(REGEX REPLACE ".*@([^@]+)$" "\\1" TFM_FWM_OFFSET "${TFM_FWM_NODE_NAME}") + if(NOT TFM_FWM_OFFSET) + message(FATAL_ERROR "Could not find TF-M firmware offset from node label slot0_secure_partition") + endif() + math(EXPR TFM_FWM_BOOT_ADDR "0x${TFM_FWM_OFFSET}+${FLASH_BASE_ADDRESS_S}+0x400") + + board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw" + "--erase" "--start-address=${TFM_FWM_BOOT_ADDR}" + ) +else() + board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") +endif() + +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/st/stm32wba65i_dk1/board.yml b/boards/st/stm32wba65i_dk1/board.yml new file mode 100644 index 0000000000000..cb9044a106327 --- /dev/null +++ b/boards/st/stm32wba65i_dk1/board.yml @@ -0,0 +1,8 @@ +board: + name: stm32wba65i_dk1 + full_name: STM32WBA65I Discovery kit + vendor: st + socs: + - name: stm32wba65xx + variants: + - name: ns diff --git a/boards/st/stm32wba65i_dk1/doc/img/stm32wba65i-dk1.webp b/boards/st/stm32wba65i_dk1/doc/img/stm32wba65i-dk1.webp new file mode 100644 index 0000000000000..4cae2e31f4708 Binary files /dev/null and b/boards/st/stm32wba65i_dk1/doc/img/stm32wba65i-dk1.webp differ diff --git a/boards/st/stm32wba65i_dk1/doc/index.rst b/boards/st/stm32wba65i_dk1/doc/index.rst new file mode 100644 index 0000000000000..edb7222dcee00 --- /dev/null +++ b/boards/st/stm32wba65i_dk1/doc/index.rst @@ -0,0 +1,278 @@ +.. zephyr:board:: stm32wba65i_dk1 + +Overview +******** + +STM32WBA65I-DK1 is a Bluetooth |reg| Low Energy, 802.15.4 and Zigbee |reg| +wireless and ultra-low-power board embedding a powerful and ultra-low-power +radio compliant with the Bluetooth |reg| Low Energy SIG specification v5.4 +with IEEE 802.15.4-2015 and Zigbee |reg| specifications. + +The ARDUINO |reg| Uno V3 connectivity support and the ST morpho headers allow +the easy expansion of the functionality of the STM32 Discovery kit open +development platform with a wide choice of specialized shields. + +- Ultra-low-power wireless STM32WBA65RI microcontroller based on the Arm |reg| + Cortex |reg| ‑M33 core with TrustZone |reg|, MPU, DSP, and FPU, that operates + at a frequency of up to 100 MHz, featuring 2 Mbyte of flash memory and 512 + Kbytes of SRAM in a VFQFPN68 package + +- MCU RF board (MB2130): + + - 2.4 GHz RF transceiver supporting Bluetooth |reg| specification v5.4 + - Cortex |reg| -M33 CPU + - Integrated PCB antenna + +- 3 user LEDs (incl. one default not connected) +- One reset push-buttons +- 1 Joystick + +- Board connectors: + + - 2 USB Type-C + - ARDUINO |reg| Uno V3 expansion connector + - ST morpho headers for full access to all STM32 I/Os + +- Flexible power-supply options: ST-LINK USB VBUS or external sources +- On-board STLINK-V3MODS debugger/programmer with USB re-enumeration capability: + mass storage, Virtual COM port, and debug port + +Hardware +******** + +The STM32WBA65xx multiprotocol wireless and ultralow power devices embed a +powerful and ultralow power radio compliant with the Bluetooth |reg| SIG Low +Energy specification 5.4. + +- Includes ST state-of-the-art patented technology + +- Ultra low power radio: + + - 2.4 GHz radio + - RF transceiver supporting Bluetooth |reg| Low Energy 5.4 specification + IEEE 802.15.4-2015 PHY and MAC, supporting Thread, Matter and Zigbee |reg| + - Proprietary protocols + - RX sensitivity: -96 dBm (Bluetooth |reg| Low Energy at 1 Mbps) + and -100 dBm (IEEE 802.15.4 at 250 kbps) + - Programmable output power, up to +10 dBm with 1 dB steps + - Support for external PA + - Integrated balun to reduce BOM + - Suitable for systems requiring compliance with radio frequency regulations + ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66 + +- Ultra low power platform with FlexPowerControl: + + - 1.71 to 3.6 V power supply + - - 40 °C to 85 °C temperature range + - Autonomous peripherals with DMA, functional down to Stop 1 mode + - 120 nA Standby mode (16 wake-up pins) + - 1.68 |micro| A Standby mode with 64 KB SRAM with RTC + - 5.58 |micro| A Stop 2 mode with 64 KB SRAM with RTC + - 28.75 |micro| A/MHz Run mode at 3.3 V + - Radio: Rx 4.26 mA / Tx at 0 dBm 5.94 mA + +- ART Accelerator |trade|: 8-Kbyte instruction cache allowing 0-wait-state execution + from flash memory (frequency up to 100 MHz, 150 DMIPS) +- Power management: embedded regulator LDO and SMPS step-down converter +- Supporting switch on-the-fly and voltage scaling + +- Benchmarks: + + - 1.5 DMIPS/MHz (Drystone 2.1) + - 410 CoreMark |reg| (4.10 CoreMark/MHz) + +- Clock sources: + + - 32 MHz crystal oscillator + - 32 kHz crystal oscillator (LSE) + - Internal low-power 32 kHz (±5%) RC + - Internal 16 MHz factory trimmed RC (±1%) + - PLL for system clock and ADC + +- Memories: + + - 2 MB flash memory with ECC, including 256 Kbytes with 100 cycles + - 512 KB SRAM, including 64 KB with parity check + - 512-byte (32 rows) OTP + +- Rich analog peripherals (independent supply): + + - 12-bit ADC 2.5 Msps with hardware oversampling + +- Communication peripherals: + + - Four UARTs (ISO 7816, IrDA, modem) + - Three SPIs + - Four I2C Fm+ (1 Mbit/s), SMBus/PMBus |reg| + +- System peripherals: + + - Touch sensing controller, up to 24 sensors, supporting touch key, linear, + rotary touch sensors + - One 16-bit, advanced motor control timer + - Three 16-bit timers + - Two 32-bit timer + - Two low-power 16-bit timers (available in Stop mode) + - Two Systick timers + - RTC with hardware calendar and calibration + - Two watchdogs + - 8-channel DMA controller, functional in Stop mode + +- Security and cryptography: + + - Arm |reg| TrustZone |reg| and securable I/Os, memories, and peripherals + - Flexible life cycle scheme with RDP and password protected debug + - Root of trust thanks to unique boot entry and secure hide protection area (HDP) + - SFI (secure firmware installation) thanks to embedded RSS (root secure services) + - Secure data storage with root hardware unique key (RHUK) + - Secure firmware upgrade support with TF-M + - Two AES co-processors, including one with DPA resistance + - Public key accelerator, DPA resistant + - HASH hardware accelerator + - True random number generator, NIST SP800-90B compliant + - 96-bit unique ID + - Active tampers + - CRC calculation unit + +- Up to 86 I/Os (most of them 5 V-tolerant) with interrupt capability + +- Development support: + + - Serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade| + +- ECOPACK2 compliant package + +More information about STM32WBA series can be found here: + +- `STM32WBA Series on www.st.com`_ + +Supported Features +================== + +.. zephyr:board-supported-hw:: + +Zephyr board options +==================== + +Zephyr supports building both Secure and Non-Secure firmware for +STM32WBA65I-DK1 board. + +The BOARD options are summarized below: + ++---------------------------------+------------------------------------------+ +| BOARD | Description | ++=================================+==========================================+ +| stm32wba65i_dk1 | For building TrustZone Disabled firmware | ++---------------------------------+------------------------------------------+ +| stm32wba65i_dk1/stm32wba65xx/ns | For building Non-Secure firmware | ++---------------------------------+------------------------------------------+ + +Here are the instructions to build Zephyr with a non-secure configuration, +using :zephyr:code-sample:`tfm_ipc` sample: + + .. code-block:: console + + $ west build -b stm32wba65i_dk1/stm32wba65xx/ns samples/tfm_integration/tfm_ipc/ + +Once done, before flashing, you need to first run a generated script that +will set platform Option Bytes config and erase internal flash (among others, +Option Bit TZEN will be set). + + .. code-block:: bash + + $ ./build/tfm/api_ns/regression.sh + $ west flash + +Please note that, after having programmed the board for a TrustZone enabled system +(e.g. with ``./build/tfm/api_ns/regression.sh``), the SoC TZEN Option Byte is enabled +and you will need to operate specific sequence to disable this TZEN Option Byte +configuration to get your board back in normal state for booting with a TrustZone +disabled system (e.g. without TF-M support). +You can use STM32CubeProgrammer_ to disable the SoC TZEN Option Byte config. + +Connections and IOs +=================== + +STM32WBA65I-DK1 board has 4 GPIO controllers. These controllers are responsible for pin muxing, +input/output, pull-up, etc. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +.. rst-class:: rst-columns + +- USART_1 TX/RX : PB12/PA8 +- I2C_1_SCL : PB2 +- I2C_1_SDA : PB1 +- LD6 : PD8 +- SPI_1_NSS : PA12 (arduino_spi) +- SPI_1_SCK : PB4 (arduino_spi) +- SPI_1_MISO : PB3 (arduino_spi) +- SPI_1_MOSI : PA15 (arduino_spi) + +System Clock +------------ + +STM32WBA65I-DK1 System Clock could be driven by internal or external oscillator, +as well as main PLL clock. By default System clock is driven by HSE+PLL clock at 100MHz. + +Serial Port +----------- + +STM32WBA65I-DK1 board has 3 U(S)ARTs. The Zephyr console output is assigned to USART1. +Default settings are 115200 8N1. + + +Programming and Debugging +************************* + +.. zephyr:board-supported-runners:: + +STM32WBA65I-DK1 board includes an ST-LINK/V3 embedded debug tool interface. +It could be used for flash and debug using either OpenOCD or STM32Cube ecosystem tools. + +Flashing +======== + +The board is configured to be flashed using west `STM32CubeProgrammer`_ runner, +so its :ref:`installation ` is required. + +Alternatively, OpenOCD can also be used to flash the board using +the ``--runner`` (or ``-r``) option: + +.. code-block:: console + + $ west flash --runner openocd + +Flashing an application to a STM32WBA65I-DK1 +-------------------------------------------- + +Here is an example for the :zephyr:code-sample:`blinky` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: stm32wba65i_dk1 + :goals: build flash + +You will see the LED blinking every second. + +Debugging +========= + +Debugging using OpenOCD +----------------------- + +You can debug an application in the usual way using OpenOCD. Here is an example for the +:zephyr:code-sample:`blinky` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/basic/blinky + :board: stm32wba65i_dk1 + :maybe-skip-config: + :goals: debug + +.. _STM32WBA Series on www.st.com: + https://www.st.com/en/microcontrollers-microprocessors/stm32wba-series.html + +.. _STM32CubeProgrammer: + https://www.st.com/en/development-tools/stm32cubeprog.html diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.dts b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.dts new file mode 100644 index 0000000000000..b5cf614fdd0fc --- /dev/null +++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.dts @@ -0,0 +1,187 @@ +/* + * Copyright (c) 2025 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include +#include "arduino_r3_connector.dtsi" +#include + +/ { + model = "STMicroelectronics STM32WBA65I Discovery kit board"; + compatible = "st,stm32wba65i-dk1"; + + #address-cells = <1>; + #size-cells = <1>; + + chosen { + zephyr,bt-c2h-uart = &usart1; + zephyr,console = &usart1; + zephyr,shell-uart = &usart1; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; + + leds: leds { + compatible = "gpio-leds"; + + green_led_1: led_0 { + gpios = <&gpiod 8 GPIO_ACTIVE_LOW>; + label = "User LD6"; + }; + + red_led_2: led_1 { + gpios = <&gpiod 9 GPIO_ACTIVE_LOW>; + label = "User LD5"; + }; + + blue_led_3: led_2 { + /* Not functional w/o a 0Ohm resistor on MB2143 R42 */ + gpios = <&gpiob 10 GPIO_ACTIVE_LOW>; + label = "User LD3"; + }; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&adc4 6>; + keyup-threshold-mv = <3300>; + + select_key { + press-thresholds-mv = <0>; + zephyr,code = ; + }; + + left_key { + press-thresholds-mv = <670>; + zephyr,code = ; + }; + + down_key { + press-thresholds-mv = <1320>; + zephyr,code = ; + }; + + up_key { + press-thresholds-mv = <2010>; + zephyr,code = ; + }; + + right_key { + press-thresholds-mv = <2650>; + zephyr,code = ; + }; + }; + + aliases { + led0 = &green_led_1; + led1 = &red_led_2; + }; +}; + +&clk_lsi { + status = "okay"; +}; + +&clk_lse { + status = "okay"; +}; + +&clk_hse { + hse-div2; + status = "okay"; +}; + +&clk_hsi { + status = "okay"; +}; + +&rcc { + clocks = <&clk_hse>; + clock-frequency = ; + ahb-prescaler = <1>; + ahb5-prescaler = <2>; + apb1-prescaler = <1>; + apb2-prescaler = <2>; + apb7-prescaler = <1>; +}; + +&iwdg { + status = "okay"; +}; + +&rtc { + status = "okay"; + clocks = <&rcc STM32_CLOCK(APB7, 21)>, + <&rcc STM32_SRC_LSE RTC_SEL(1)>; + prescaler = <32768>; +}; + +&usart1 { + clocks = <&rcc STM32_CLOCK(APB2, 14)>, + <&rcc STM32_SRC_HSI16 USART1_SEL(2)>; + pinctrl-0 = <&usart1_tx_pb12 &usart1_rx_pa8>; + pinctrl-1 = <&analog_pb12 &analog_pa8>; + pinctrl-names = "default", "sleep"; + current-speed = <115200>; + status = "okay"; +}; + +&spi1 { + pinctrl-0 = <&spi1_nss_pa12 &spi1_sck_pb4 + &spi1_miso_pb3 &spi1_mosi_pa15>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_scl_pb2 &i2c1_sda_pb1>; + pinctrl-names = "default"; + status = "okay"; + clock-frequency = ; +}; + +&adc4 { + pinctrl-0 = <&adc4_in6_pa3>; + pinctrl-names = "default"; + st,adc-clock-source = "ASYNC"; + st,adc-prescaler = <4>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + channel@6 { + reg = <0x6>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + zephyr,vref-mv = <3300>; + }; +}; + +stm32_lp_tick_source: &lptim1 { + clocks = <&rcc STM32_CLOCK(APB7, 11)>, + <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>; + status = "okay"; +}; + +&rng { + status = "okay"; +}; + +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + storage_partition: partition@1c0000 { + label = "storage"; + reg = <0x001c0000 DT_SIZE_K(256)>; + }; + }; +}; diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.yaml b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.yaml new file mode 100644 index 0000000000000..98bad77188d55 --- /dev/null +++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1.yaml @@ -0,0 +1,19 @@ +identifier: stm32wba65i_dk1/stm32wba65xx +name: ST STM32WBA65I Discovery kit +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb +supported: + - gpio + - i2c + - spi + - adc + - rng + - arduino_gpio + - arduino_i2c + - arduino_spi +ram: 512 +flash: 2048 +vendor: st diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_defconfig b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_defconfig new file mode 100644 index 0000000000000..5e650e6826cb7 --- /dev/null +++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_defconfig @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: Apache-2.0 +# Copyright (c) 2025 STMicroelectronics + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable GPIO +CONFIG_GPIO=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable the internal SMPS regulator +CONFIG_POWER_SUPPLY_DIRECT_SMPS=y + +# Enable ADC for joystick +CONFIG_ADC=y diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.dts b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.dts new file mode 100644 index 0000000000000..201fe84b59b49 --- /dev/null +++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.dts @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2025 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include "stm32wba65i_dk1.dts" + +/ { + chosen { + zephyr,code-partition = &slot0_ns_partition; + }; +}; + + +&flash0 { + /delete-node/ partitions; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "bootstage"; + reg = <0 DT_SIZE_K(48)>; + }; + + slot0_secure_partition: partition@c000 { + label = "image-secure"; + reg = <0xc000 DT_SIZE_K(256)>; + }; + + slot0_ns_partition: partition@4c000 { + label = "image-non-secure"; + reg = <0x4c000 DT_SIZE_K(512)>; + }; + + storage_partition: partition@cc000 { + label = "storage"; + reg = <0xcc000 (DT_SIZE_M(1) - DT_SIZE_K(208))>; + }; + }; +}; diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.yaml b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.yaml new file mode 100644 index 0000000000000..66e70d4891396 --- /dev/null +++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns.yaml @@ -0,0 +1,19 @@ +identifier: stm32wba65i_dk1/stm32wba65xx/ns +name: ST STM32WBA65I Discovery kit with TF-M and non-secure firmware +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb +supported: + - gpio + - i2c + - spi + - adc + - rng + - arduino_gpio + - arduino_i2c + - arduino_spi +ram: 512 +flash: 2048 +vendor: st diff --git a/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns_defconfig b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns_defconfig new file mode 100644 index 0000000000000..8d3b81cfdbc4f --- /dev/null +++ b/boards/st/stm32wba65i_dk1/stm32wba65i_dk1_stm32wba65xx_ns_defconfig @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: Apache-2.0 +# Copyright (c) 2025 STMicroelectronics + +# Enable UART driver +CONFIG_SERIAL=y + +# Enable GPIO +CONFIG_GPIO=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y + +# Enable the internal SMPS regulator +CONFIG_POWER_SUPPLY_DIRECT_SMPS=y + +# Enable ADC for joystick +CONFIG_ADC=y + +# TF-M expects Zephyr includes a 1kB header +CONFIG_ROM_START_OFFSET=0x400 + +# Enable TZ non-secure configuration +CONFIG_ARM_TRUSTZONE_M=y +CONFIG_RUNTIME_NMI=y +CONFIG_TRUSTED_EXECUTION_NONSECURE=y +CONFIG_BUILD_WITH_TFM=y +CONFIG_TFM_BL2=n diff --git a/boards/st/stm32wba65i_dk1/support/openocd.cfg b/boards/st/stm32wba65i_dk1/support/openocd.cfg new file mode 100644 index 0000000000000..247de974f3963 --- /dev/null +++ b/boards/st/stm32wba65i_dk1/support/openocd.cfg @@ -0,0 +1,26 @@ +# Note: Using OpenOCD using nucloe_wba52cg requires using openocd fork. +# See board documentation for more information + +source [find interface/stlink-dap.cfg] + +set WORKAREASIZE 0x8000 + +transport select "dapdirect_swd" + +# Enable debug when in low power modes +set ENABLE_LOW_POWER 1 + +# Stop Watchdog counters when halt +set STOP_WATCHDOG 1 + +# STlink Debug clock frequency +set CLOCK_FREQ 8000 + +# Reset configuration +# use hardware reset, connect under reset +# connect_assert_srst needed if low power mode application running (WFI...) +reset_config srst_only srst_nogate + +source [find target/stm32wbax.cfg] + +gdb_memory_map disable diff --git a/modules/trusted-firmware-m/CMakeLists.txt b/modules/trusted-firmware-m/CMakeLists.txt index 9130f96297895..7fbce76b33d7b 100644 --- a/modules/trusted-firmware-m/CMakeLists.txt +++ b/modules/trusted-firmware-m/CMakeLists.txt @@ -276,6 +276,12 @@ if (CONFIG_BUILD_WITH_TFM) list(APPEND TFM_CMAKE_ARGS -DETHOS_DRIVER_PATH=${CONFIG_TFM_ETHOS_DRIVER_PATH_LOCAL}) endif() + if (NOT CONFIG_TFM_STM32_FLASH_LAYOUT_BEGIN_OFFSET EQUAL 0) + list(APPEND TFM_CMAKE_ARGS + -DSTM32_FLASH_LAYOUT_BEGIN_OFFSET=${CONFIG_TFM_STM32_FLASH_LAYOUT_BEGIN_OFFSET} + ) + endif() + file(MAKE_DIRECTORY ${TFM_BINARY_DIR}) add_custom_target(tfm_cmake DEPENDS ${TFM_BINARY_DIR}/CMakeCache.txt diff --git a/modules/trusted-firmware-m/Kconfig.tfm b/modules/trusted-firmware-m/Kconfig.tfm index d1cf81f8f0ac4..a45030f5d4e60 100644 --- a/modules/trusted-firmware-m/Kconfig.tfm +++ b/modules/trusted-firmware-m/Kconfig.tfm @@ -20,6 +20,8 @@ config TFM_BOARD default "stm/b_u585i_iot02a" if BOARD_B_U585I_IOT02A default "stm/nucleo_l552ze_q" if BOARD_NUCLEO_L552ZE_Q default "stm/stm32l562e_dk" if BOARD_STM32L562E_DK + default "stm/stm32wba65i_dk" if BOARD_NUCLEO_WBA65RI + default "stm/stm32wba65i_dk" if BOARD_STM32WBA65I_DK1 default "arm/musca_b1" if BOARD_V2M_MUSCA_B1 default "arm/musca_s1" if BOARD_V2M_MUSCA_S1 default "adi/max32657" if BOARD_MAX32657EVKIT_MAX32657_NS @@ -515,4 +517,12 @@ config TFM_EXCEPTION_INFO_DUMP On fatal errors in the secure firmware, capture info about the exception. Print the info if the SPM log level is sufficient. +config TFM_STM32_FLASH_LAYOUT_BEGIN_OFFSET + int "Offset gap at beginning of flash layout" + default 0 + help + Add an offset at the beginning of the platform flash layout defined by + TF-M. The platform uses this gap for platform specific reason, as for + example when a bootloader that is external to TF-M is used. + endif # BUILD_WITH_TFM diff --git a/submanifests/optional.yaml b/submanifests/optional.yaml index 5f679e1103161..4a1a79178a963 100644 --- a/submanifests/optional.yaml +++ b/submanifests/optional.yaml @@ -29,7 +29,7 @@ manifest: groups: - optional - name: psa-arch-tests - revision: 2cadb02a72eacda7042505dcbdd492371e8ce024 + revision: pull/13/head path: modules/tee/tf-m/psa-arch-tests remote: upstream groups: diff --git a/tests/drivers/adc/adc_api/boards/nucleo_wba65ri_stm32wba65xx_ns.overlay b/tests/drivers/adc/adc_api/boards/nucleo_wba65ri_stm32wba65xx_ns.overlay new file mode 100644 index 0000000000000..4a6e6546c487e --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/nucleo_wba65ri_stm32wba65xx_ns.overlay @@ -0,0 +1,34 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2025 STMicroelectronics + */ + +/ { + zephyr,user { + /* adjust channel number according to pinmux in board.dts */ + io-channels = <&adc4 7>, <&adc4 8>; + }; +}; + +&adc4 { + pinctrl-0 = <&adc4_in7_pa2 &adc4_in8_pa1>; + #address-cells = <1>; + #size-cells = <0>; + + channel@7 { + reg = <7>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@8 { + reg = <8>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +}; diff --git a/tests/drivers/adc/adc_api/boards/stm32wba65i_dk1.overlay b/tests/drivers/adc/adc_api/boards/stm32wba65i_dk1.overlay new file mode 100644 index 0000000000000..314ca8d287cde --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/stm32wba65i_dk1.overlay @@ -0,0 +1,32 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2025 STMicroelectronics + */ + +/ { + zephyr,user { + /* adjust channel number according to pinmux in board.dts */ + io-channels = <&adc4 7>, <&adc4 8>; + }; +}; + +&adc4 { + pinctrl-0 = <&adc4_in6_pa3 &adc4_in7_pa2 &adc4_in8_pa1>; + + channel@7 { + reg = <7>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@8 { + reg = <8>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +}; diff --git a/tests/drivers/adc/adc_api/boards/stm32wba65i_dk1_stm32wba65xx_ns.overlay b/tests/drivers/adc/adc_api/boards/stm32wba65i_dk1_stm32wba65xx_ns.overlay new file mode 100644 index 0000000000000..314ca8d287cde --- /dev/null +++ b/tests/drivers/adc/adc_api/boards/stm32wba65i_dk1_stm32wba65xx_ns.overlay @@ -0,0 +1,32 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2025 STMicroelectronics + */ + +/ { + zephyr,user { + /* adjust channel number according to pinmux in board.dts */ + io-channels = <&adc4 7>, <&adc4 8>; + }; +}; + +&adc4 { + pinctrl-0 = <&adc4_in6_pa3 &adc4_in7_pa2 &adc4_in8_pa1>; + + channel@7 { + reg = <7>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; + + channel@8 { + reg = <8>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <12>; + }; +}; diff --git a/tests/drivers/adc/adc_api/testcase.yaml b/tests/drivers/adc/adc_api/testcase.yaml index 2cb23c381f3f9..a9b2d882b3878 100644 --- a/tests/drivers/adc/adc_api/testcase.yaml +++ b/tests/drivers/adc/adc_api/testcase.yaml @@ -59,6 +59,7 @@ tests: - stm32f3_disco - stm32h573i_dk - stm32u083c_dk + - stm32wba65i_dk1 integration_platforms: - disco_l475_iot1 - nucleo_l476rg diff --git a/west.yml b/west.yml index 702bc9b784e32..70a93694463ca 100644 --- a/west.yml +++ b/west.yml @@ -360,7 +360,7 @@ manifest: groups: - tee - name: trusted-firmware-m - revision: c150f48855f04d77451a39bfaa80d14eb61d918b + revision: pull/133/head path: modules/tee/tf-m/trusted-firmware-m groups: - tee