Skip to content
Open
Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
40 commits
Select commit Hold shift + click to select a range
168cc30
scripts: dts: gen_defines: generate clock management specific DT macros
danieldegrasse Oct 1, 2024
68dbd9f
scripts: build: add gen_clock_deps.py and support for clock handles
danieldegrasse Oct 1, 2024
27cd1d5
dts: bindings: clock_management: define common clock management bindings
danieldegrasse Oct 1, 2024
6c54c93
include: zephyr: devicetree: add devicetree helpers for clock management
danieldegrasse Oct 1, 2024
dbb2b27
include: zephyr: drivers: clock_management: add clock model header
danieldegrasse Oct 1, 2024
5730c05
include: zephyr: drivers: add clock driver API header
danieldegrasse Oct 1, 2024
260e498
include: zephyr: drivers: add clock management subsystem header
danieldegrasse Oct 1, 2024
f7bd443
cmake: extensions: add add_clock_management_header() function
danieldegrasse Oct 1, 2024
09fe467
drivers: clock_mgmt: add initial clock management driver infrastructure
danieldegrasse Oct 1, 2024
2636775
drivers: clock_management: implement common clock management drivers
danieldegrasse Oct 1, 2024
b79f9f5
drivers: clock_management: implement common NXP syscon drivers
danieldegrasse Oct 1, 2024
fa55304
drivers: clock_management: implement LPC55Sxx specific PLL drivers
danieldegrasse Oct 1, 2024
7527c14
dts: arm: nxp: add lpc55sxx clock tree
danieldegrasse Oct 1, 2024
3e81e0b
dts: bindings: cpu: add clock-device include
danieldegrasse Oct 1, 2024
01fa219
dts: arm: nxp: nxp_lpc55s6x: add clock-output prop for CPU0
danieldegrasse Oct 1, 2024
b938fbc
soc: nxp: lpc: lpc55xxx: apply default CPU0 clock state at boot
danieldegrasse Oct 1, 2024
5db820b
soc: nxp: lpc: lpc55sxxx: make clocks for peripherals depend on Kconfig
danieldegrasse Oct 1, 2024
de5e774
dts: bindings: arm: indicate flexcomm may be a clock consumer
danieldegrasse Oct 1, 2024
9ad9bae
dts: arm: nxp: add clock outputs for LPC55sxx flexcomm nodes
danieldegrasse Oct 1, 2024
d6a7fd7
drivers: serial: uart_mcux_flexcomm: add support for clock management
danieldegrasse Oct 1, 2024
8b321f5
boards: nxp: lpcxpresso55s69: add support for clock management on CPU0
danieldegrasse Oct 1, 2024
449130d
soc: nxp: lpc: Kconfig: imply clock control instead of selecting
danieldegrasse Oct 1, 2024
c3fa673
soc: nxp: lpc: don't configure UART clocks if clock management is on
danieldegrasse Aug 19, 2025
14ab8ba
boards: native_sim: indicate clock management support
danieldegrasse Oct 1, 2024
fcbbd57
tests: drivers: clock_management: add clock_management_api test
danieldegrasse Oct 1, 2024
d0ed748
tests: drivers: clock_management: add clock management hardware test
danieldegrasse Oct 1, 2024
206db11
tests: drivers: clock_management: add clock_management_minimal test
danieldegrasse Dec 10, 2024
d16a488
doc: hardware: add documentation for clock management subsystem
danieldegrasse Oct 1, 2024
2102640
drivers: clock_management: rework definition of clock types
danieldegrasse Aug 14, 2025
fbca100
drivers: clock_management: rework API definitions
danieldegrasse Aug 14, 2025
f2d62ad
drivers: clock_management: update user facing header
danieldegrasse Aug 14, 2025
ad80c6f
drivers: clock_management: rework clock_management_common
danieldegrasse Aug 14, 2025
bd168ae
drivers: rework clock management drivers for new API
danieldegrasse Aug 14, 2025
0e84474
include: drivers: clock_management: add clock management helpers
danieldegrasse Aug 17, 2025
a5aaab4
drivers: clock_management: rework NXP LPC clock management drivers
danieldegrasse Aug 17, 2025
25fc9af
drivers: clock_management: add clock ranking support
danieldegrasse Aug 23, 2025
6c2e9c6
tests: drivers: clock_management: add testcase for ranking
danieldegrasse Sep 5, 2025
c3b6d7d
tests: drivers: clock_management: add test for clock_management on/off
danieldegrasse Sep 6, 2025
e917746
drivers: clock_management: add framework-wide lock
danieldegrasse Sep 6, 2025
7764d24
docs: update clock subsystem documentation
danieldegrasse Sep 6, 2025
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
20 changes: 19 additions & 1 deletion CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -1198,6 +1198,24 @@ if(CONFIG_USERSPACE)
set(PROCESS_GPERF ${ZEPHYR_BASE}/scripts/build/process_gperf.py)
endif()

if(CONFIG_CLOCK_MANAGEMENT_RUNTIME)
# clock_deps.c is generated from ${ZEPHYR_LINK_STAGE_EXECUTABLE} by
# gen_clock_deps.py
add_custom_command(
OUTPUT clock_deps.c
COMMAND
${PYTHON_EXECUTABLE}
${ZEPHYR_BASE}/scripts/build/gen_clock_deps.py
--output-source clock_deps.c
--kernel $<TARGET_FILE:${ZEPHYR_LINK_STAGE_EXECUTABLE}>
--zephyr-base ${ZEPHYR_BASE}
--start-symbol "$<TARGET_PROPERTY:linker,devices_start_symbol>"
VERBATIM
DEPENDS ${ZEPHYR_LINK_STAGE_EXECUTABLE}
)
set_property(GLOBAL APPEND PROPERTY GENERATED_APP_SOURCE_FILES clock_deps.c)
endif()

# @Intent: Obtain compiler specific flag for specifying the c standard
zephyr_compile_options(
$<$<COMPILE_LANGUAGE:C>:$<TARGET_PROPERTY:compiler,cstd>${CSTD}>
Expand Down Expand Up @@ -1442,7 +1460,7 @@ if(CONFIG_USERSPACE)
endforeach()
endif()

if(CONFIG_USERSPACE OR CONFIG_DEVICE_DEPS)
if(CONFIG_USERSPACE OR CONFIG_DEVICE_DEPS OR CONFIG_CLOCK_MANAGEMENT_RUNTIME)
configure_linker_script(
${ZEPHYR_CURRENT_LINKER_CMD}
"${LINKER_PASS_${ZEPHYR_CURRENT_LINKER_PASS}_DEFINE}"
Expand Down
1 change: 1 addition & 0 deletions boards/native/native_sim/native_sim.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@ toolchain:
supported:
- can
- counter
- clock_management
- display
- dma
- eeprom
Expand Down
45 changes: 45 additions & 0 deletions boards/nxp/lpcxpresso55s69/lpcxpresso55s69_lpc55s69_cpu0.dts
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@
#include "lpcxpresso55s69.dtsi"
#include <zephyr/dt-bindings/pwm/pwm.h>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include <freq.h>

/ {
model = "NXP LPCXpresso55S69 board";
Expand Down Expand Up @@ -109,6 +110,50 @@

&flexcomm0 {
status = "okay";
clock-state-0 = <&fxcom0_96mhz>;
clock-state-names = "default";
};

&cpu0 {
clock-state-0 = <&sys_clk_144mhz>;
clock-state-names = "default";
};

&fxcom0_clock {
/* 96 MHz setpoint for Flexcomm0 clock using FROHF */
fxcom0_96mhz: fxcom0_96mhz {
compatible = "clock-state";
clocks = <&fcclksel0 3 &frohfdiv 1>;
clock-frequency = <DT_FREQ_M(96)>;
};
};

&system_clock {
/* 144 MHz setpoint for CPU core clock */
sys_clk_144mhz: sys_clk_144mhz {
compatible = "clock-state";
clocks = <&ahbclkdiv 1 &fro_12m 1 &mainclkselb 0 &mainclksela 0
&xtal32m 1 &clk_in_en 1 &pll1clksel 1
&pll1_pdec 2 &pll1 8 144 0 53 31
&pll1_directo 0 &pll1_bypass 0
&mainclkselb 2>;
clock-frequency = <DT_FREQ_M(144)>;
locking-state;
};
};

&fxcom2_clock {
/* 96 MHz setpoint for Flexcomm2 clock using FROHF */
fxcom2_96mhz: fxcom2_96mhz {
compatible = "clock-state";
clocks = <&fcclksel2 3 &frohfdiv 1>;
clock-frequency = <DT_FREQ_M(96)>;
};
};

&flexcomm2 {
clock-state-0 = <&fxcom2_96mhz>;
clock-state-names = "default";
};

&flexcomm4 {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@ supported:
- arduino_i2c
- arduino_serial
- arduino_spi
- clock_management
- counter
- flash
- gpio
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -18,3 +18,6 @@ CONFIG_HW_STACK_PROTECTION=y
# Enable TrustZone-M
CONFIG_TRUSTED_EXECUTION_SECURE=y
CONFIG_ARM_TRUSTZONE_M=y

# Enable clock management
CONFIG_CLOCK_MANAGEMENT=y
6 changes: 6 additions & 0 deletions boards/nxp/lpcxpresso55s69/pre_dt_board.cmake
Original file line number Diff line number Diff line change
@@ -0,0 +1,6 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0

# Suppress "unique_unit_address_if_enabled" to handle syscon
# clock address overlaps
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
49 changes: 49 additions & 0 deletions cmake/modules/extensions.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,8 @@ include(CheckCXXCompilerFlag)
# 7.2 add_llext_* build control functions
# 7.3 llext helper functions
# 8. Script mode handling
# 9. Clock Management extensions
# 9.1 Clock Management headers

########################################################
# 1. Zephyr-aware extensions
Expand Down Expand Up @@ -6162,3 +6164,50 @@ if(CMAKE_SCRIPT_MODE_FILE)
# This silence the error: 'Unknown CMake command "yaml_context"'
endfunction()
endif()

########################################################
# 9. Clock Management extensions
########################################################
#
# These functions enable clock drivers to register their headers for inclusion
# into the clock management framework. This is required to properly support
# out of tree clock drivers, as the clock driver header needs to be included
# within the in-tree clock management code.

# 9.1 Clock Management headers
#
# This function permits drivers to register headers for use with the clock
# management framework, which provide macros to extract configuration data
# from their clock nodes in devicetree

# Usage:
# add_clock_management_header(<filename>)
#
# Adds the header file given by <filename> to the list of files included
# within the clock management framework for clock drivers
#
function(add_clock_management_header filename)
# Get the real path of the file
file(REAL_PATH "${filename}" abs_path)
get_property(clock_management_includes TARGET clock_management_header_target PROPERTY
INTERFACE_SOURCES)
list(APPEND clock_management_includes "${abs_path}")
set_property(TARGET clock_management_header_target PROPERTY INTERFACE_SOURCES
"${clock_management_includes}")
endfunction()

# Usage:
# add_clock_management_header_ifdef(<setting> <filename>)
#
# Will add header to clock management framework if <setting> is enabled.
#
# <setting>: Setting to check for True value before invoking
# add_clock_management_header()
#
# See add_clock_management_header() description for other supported arguments.
#
macro(add_clock_management_header_ifdef feature_toggle)
if(${${feature_toggle}})
add_clock_management_header(${ARGN})
endif()
endmacro()
1 change: 1 addition & 0 deletions cmake/modules/kernel.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,7 @@ May include isr_tables.c etc."
set_property(GLOBAL PROPERTY GENERATED_KERNEL_SOURCE_FILES "")

add_custom_target(code_data_relocation_target)
add_custom_target(clock_management_header_target)

# The zephyr/runners.yaml file in the build directory is used to
# configure the scripts/west_commands/runners Python package used
Expand Down
Loading
Loading