diff --git a/arch/arm/soc/st_stm32/stm32f4/soc_pinmux.c b/arch/arm/soc/st_stm32/stm32f4/soc_pinmux.c index 711372f582d90..5731526eb1d64 100644 --- a/arch/arm/soc/st_stm32/stm32f4/soc_pinmux.c +++ b/arch/arm/soc/st_stm32/stm32f4/soc_pinmux.c @@ -12,52 +12,379 @@ #include #include +#define PAD(AF, func) \ + [AF - 1] = func + +#define _PINMUX_PWM(pin, port, chan) \ + PAD(STM32F4_PINMUX_FUNC_##pin##_PWM##port##_CH##chan,\ + STM32F4X_PIN_CONFIG_AF_PUSH_UP), + +#define _PINMUX_UART(pin, port, dir) \ + PAD(STM32F4_PINMUX_FUNC_##pin##_##port##_##dir, \ + STM32F4X_PIN_CONFIG_AF_PUSH_UP), + +/* Blank pinmux by default */ +#define PINMUX_PWM2(pin, chan) +#define PINMUX_UART1(pin, dir) +#define PINMUX_UART2(pin, dir) +#define PINMUX_UART3(pin, dir) +#define PINMUX_UART4(pin, dir) +#define PINMUX_UART5(pin, dir) +#define PINMUX_UART6(pin, dir) +#define PINMUX_UART7(pin, dir) +#define PINMUX_UART8(pin, dir) +#define PINMUX_UART9(pin, dir) +#define PINMUX_UART10(pin, dir) + +#ifdef CONFIG_PWM_STM32_2 + #undef PINMUX_PWM2 + #define PINMUX_PWM2(pin, chan) _PINMUX_PWM(pin, 2, chan) +#endif + +#ifdef CONFIG_UART_STM32_PORT_1 + #undef PINMUX_UART1 + #define PINMUX_UART1(pin, dir) _PINMUX_UART(pin, USART1, dir) +#endif + +#ifdef CONFIG_UART_STM32_PORT_2 + #undef PINMUX_UART2 + #define PINMUX_UART2(pin, dir) _PINMUX_UART(pin, USART2, dir) +#endif + +#ifdef CONFIG_UART_STM32_PORT_3 + #undef PINMUX_UART3 + #define PINMUX_UART3(pin, dir) _PINMUX_UART(pin, USART3, dir) +#endif + +#ifdef CONFIG_UART_STM32_PORT_4 + #undef PINMUX_UART4 + #define PINMUX_UART4(pin, dir) _PINMUX_UART(pin, UART4, dir) +#endif + +#ifdef CONFIG_UART_STM32_PORT_5 + #undef PINMUX_UART5 + #define PINMUX_UART5(pin, dir) _PINMUX_UART(pin, UART5, dir) +#endif + +#ifdef CONFIG_UART_STM32_PORT_6 + #undef PINMUX_UART6 + #define PINMUX_UART6(pin, dir) _PINMUX_UART(pin, USART6, dir) +#endif + +#ifdef CONFIG_UART_STM32_PORT_7 + #undef PINMUX_UART7 + #define PINMUX_UART7(pin, dir) _PINMUX_UART(pin, UART7, dir) +#endif + +#ifdef CONFIG_UART_STM32_PORT_8 + #undef PINMUX_UART8 + #define PINMUX_UART8(pin, dir) _PINMUX_UART(pin, UART8, dir) +#endif + +#ifdef CONFIG_UART_STM32_PORT_9 + #undef PINMUX_UART9 + #define PINMUX_UART9(pin, dir) _PINMUX_UART(pin, UART9, dir) +#endif + +#ifdef CONFIG_UART_STM32_PORT_10 + #undef PINMUX_UART10 + #define PINMUX_UART10(pin, dir) _PINMUX_UART(pin, UART10, dir) +#endif + +#define PINMUX_PWM(pin, pwm, chan) PINMUX_##pwm(pin, chan) +#define PINMUX_UART(pin, port, dir) PINMUX_##port(pin, dir) + +/* Port A */ +static const stm32_pin_func_t pin_pa0_funcs[] = { + PINMUX_PWM(PA0, PWM2, 1) + PINMUX_UART(PA0, UART4, TX) +}; + +static const stm32_pin_func_t pin_pa1_funcs[] = { + PINMUX_UART(PA1, UART4, RX) +}; + +static const stm32_pin_func_t pin_pa2_funcs[] = { + PINMUX_UART(PA2, UART2, TX) +}; + +static const stm32_pin_func_t pin_pa3_funcs[] = { + PINMUX_UART(PA3, UART2, RX) +}; + +static const stm32_pin_func_t pin_pa8_funcs[] = { + PINMUX_UART(PA8, UART7, RX) +}; + static const stm32_pin_func_t pin_pa9_funcs[] = { - [STM32F4_PINMUX_FUNC_PA9_USART1_TX - 1] = - STM32F4X_PIN_CONFIG_AF_PUSH_UP, + PINMUX_UART(PA9, UART1, TX) }; static const stm32_pin_func_t pin_pa10_funcs[] = { - [STM32F4_PINMUX_FUNC_PA10_USART1_RX - 1] = - STM32F4X_PIN_CONFIG_AF_PUSH_UP, + PINMUX_UART(PA10, UART1, RX) +}; + +static const stm32_pin_func_t pin_pa11_funcs[] = { + PINMUX_UART(PA11, UART6, TX) + PINMUX_UART(PA11, UART4, RX) +}; + +static const stm32_pin_func_t pin_pa12_funcs[] = { + PINMUX_UART(PA12, UART6, RX) + PINMUX_UART(PA12, UART4, TX) +}; + +static const stm32_pin_func_t pin_pa15_funcs[] = { + PINMUX_UART(PA15, UART1, TX) + PINMUX_UART(PA15, UART7, TX) +}; + +/* Port B */ +static const stm32_pin_func_t pin_pb3_funcs[] = { + PINMUX_UART(PB3, UART1, RX) + PINMUX_UART(PB3, UART7, RX) +}; + +static const stm32_pin_func_t pin_pb4_funcs[] = { + PINMUX_UART(PB4, UART7, TX) +}; + +static const stm32_pin_func_t pin_pb5_funcs[] = { + PINMUX_UART(PB5, UART5, RX) }; static const stm32_pin_func_t pin_pb6_funcs[] = { - [STM32F4_PINMUX_FUNC_PB6_USART1_TX - 1] = - STM32F4X_PIN_CONFIG_AF_PUSH_UP, + PINMUX_UART(PB6, UART1, TX) + PINMUX_UART(PB6, UART5, TX) }; static const stm32_pin_func_t pin_pb7_funcs[] = { - [STM32F4_PINMUX_FUNC_PB7_USART1_RX - 1] = - STM32F4X_PIN_CONFIG_AF_PUSH_UP, + PINMUX_UART(PB7, UART1, RX) }; -static const stm32_pin_func_t pin_pa2_funcs[] = { - [STM32F4_PINMUX_FUNC_PA2_USART2_TX - 1] = - STM32F4X_PIN_CONFIG_AF_PUSH_UP, +static const stm32_pin_func_t pin_pb8_funcs[] = { + PINMUX_UART(PB8, UART5, RX) }; -static const stm32_pin_func_t pin_pa3_funcs[] = { - [STM32F4_PINMUX_FUNC_PA3_USART2_RX - 1] = - STM32F4X_PIN_CONFIG_AF_PUSH_UP, +static const stm32_pin_func_t pin_pb9_funcs[] = { + PINMUX_UART(PB9, UART5, TX) }; -static const stm32_pin_func_t pin_pa0_funcs[] = { - [STM32F4_PINMUX_FUNC_PA0_PWM2_CH1 - 1] = - STM32F4X_PIN_CONFIG_AF_PUSH_UP, +static const stm32_pin_func_t pin_pb10_funcs[] = { + PINMUX_UART(PB10, UART3, TX) +}; + +static const stm32_pin_func_t pin_pb11_funcs[] = { + PINMUX_UART(PB11, UART3, RX) +}; + +static const stm32_pin_func_t pin_pb12_funcs[] = { + PINMUX_UART(PB12, UART5, RX) +}; + +static const stm32_pin_func_t pin_pb13_funcs[] = { + PINMUX_UART(PB13, UART5, TX) +}; + +/* Port C */ +static const stm32_pin_func_t pin_pc5_funcs[] = { + PINMUX_UART(PC5, UART3, RX) +}; + +static const stm32_pin_func_t pin_pc6_funcs[] = { + PINMUX_UART(PC6, UART6, TX) +}; + +static const stm32_pin_func_t pin_pc7_funcs[] = { + PINMUX_UART(PC7, UART6, RX) +}; + +static const stm32_pin_func_t pin_pc10_funcs[] = { + PINMUX_UART(PC10, UART3, TX) +}; + +static const stm32_pin_func_t pin_pc11_funcs[] = { + PINMUX_UART(PC11, UART3, RX) + PINMUX_UART(PC11, UART4, RX) +}; + +static const stm32_pin_func_t pin_pc12_funcs[] = { + PINMUX_UART(PC12, UART5, TX) +}; + +/* Port D */ +static const stm32_pin_func_t pin_pd0_funcs[] = { + PINMUX_UART(PD0, UART4, RX) +}; + +static const stm32_pin_func_t pin_pd2_funcs[] = { + PINMUX_UART(PD2, UART5, RX) +}; + +static const stm32_pin_func_t pin_pd5_funcs[] = { + PINMUX_UART(PD5, UART2, TX) +}; + +static const stm32_pin_func_t pin_pd6_funcs[] = { + PINMUX_UART(PD6, UART2, RX) +}; + +static const stm32_pin_func_t pin_pd8_funcs[] = { + PINMUX_UART(PD8, UART3, TX) +}; + +static const stm32_pin_func_t pin_pd9_funcs[] = { + PINMUX_UART(PD9, UART3, RX) +}; + +static const stm32_pin_func_t pin_pd10_funcs[] = { + PINMUX_UART(PD10, UART4, TX) +}; + +static const stm32_pin_func_t pin_pd14_funcs[] = { + PINMUX_UART(PD14, UART9, RX) +}; + +static const stm32_pin_func_t pin_pd15_funcs[] = { + PINMUX_UART(PD15, UART9, TX) +}; + +/* Port E */ +static const stm32_pin_func_t pin_pe0_funcs[] = { + PINMUX_UART(PE0, UART8, RX) +}; + +static const stm32_pin_func_t pin_pe1_funcs[] = { + PINMUX_UART(PE1, UART8, TX) +}; + +static const stm32_pin_func_t pin_pe2_funcs[] = { + PINMUX_UART(PE2, UART10, RX) +}; + +static const stm32_pin_func_t pin_pe3_funcs[] = { + PINMUX_UART(PE3, UART10, TX) +}; + +static const stm32_pin_func_t pin_pe7_funcs[] = { + PINMUX_UART(PE7, UART7, RX) +}; + +static const stm32_pin_func_t pin_pe8_funcs[] = { + PINMUX_UART(PE8, UART7, TX) +}; + +/* Port F */ +static const stm32_pin_func_t pin_pf6_funcs[] = { + PINMUX_UART(PF6, UART7, RX) +}; + +static const stm32_pin_func_t pin_pf7_funcs[] = { + PINMUX_UART(PF7, UART7, TX) +}; + +static const stm32_pin_func_t pin_pf8_funcs[] = { + PINMUX_UART(PF8, UART8, RX) +}; + +static const stm32_pin_func_t pin_pf9_funcs[] = { + PINMUX_UART(PF9, UART8, TX) +}; + +/* Port G */ +static const stm32_pin_func_t pin_pg0_funcs[] = { + PINMUX_UART(PG0, UART9, RX) +}; + +static const stm32_pin_func_t pin_pg1_funcs[] = { + PINMUX_UART(PG1, UART9, TX) +}; + +static const stm32_pin_func_t pin_pg9_funcs[] = { + PINMUX_UART(PG9, UART6, RX) +}; + +static const stm32_pin_func_t pin_pg11_funcs[] = { + PINMUX_UART(PG11, UART10, RX) +}; + +static const stm32_pin_func_t pin_pg12_funcs[] = { + PINMUX_UART(PG12, UART10, TX) +}; + +static const stm32_pin_func_t pin_pg14_funcs[] = { + PINMUX_UART(PG14, UART6, TX) }; /** * @brief pin configuration */ static const struct stm32_pinmux_conf pins[] = { + /* Port A */ + STM32_PIN_CONF(STM32_PIN_PA0, pin_pa0_funcs), + STM32_PIN_CONF(STM32_PIN_PA1, pin_pa1_funcs), + STM32_PIN_CONF(STM32_PIN_PA2, pin_pa2_funcs), + STM32_PIN_CONF(STM32_PIN_PA3, pin_pa3_funcs), + STM32_PIN_CONF(STM32_PIN_PA8, pin_pa8_funcs), STM32_PIN_CONF(STM32_PIN_PA9, pin_pa9_funcs), STM32_PIN_CONF(STM32_PIN_PA10, pin_pa10_funcs), + STM32_PIN_CONF(STM32_PIN_PA11, pin_pa11_funcs), + STM32_PIN_CONF(STM32_PIN_PA12, pin_pa12_funcs), + STM32_PIN_CONF(STM32_PIN_PA15, pin_pa15_funcs), + + /* Port B */ + STM32_PIN_CONF(STM32_PIN_PB3, pin_pb3_funcs), + STM32_PIN_CONF(STM32_PIN_PB4, pin_pb4_funcs), + STM32_PIN_CONF(STM32_PIN_PB5, pin_pb5_funcs), STM32_PIN_CONF(STM32_PIN_PB6, pin_pb6_funcs), STM32_PIN_CONF(STM32_PIN_PB7, pin_pb7_funcs), - STM32_PIN_CONF(STM32_PIN_PA2, pin_pa2_funcs), - STM32_PIN_CONF(STM32_PIN_PA3, pin_pa3_funcs), - STM32_PIN_CONF(STM32_PIN_PA0, pin_pa0_funcs), + STM32_PIN_CONF(STM32_PIN_PB8, pin_pb8_funcs), + STM32_PIN_CONF(STM32_PIN_PB9, pin_pb9_funcs), + STM32_PIN_CONF(STM32_PIN_PB10, pin_pb10_funcs), + STM32_PIN_CONF(STM32_PIN_PB11, pin_pb11_funcs), + STM32_PIN_CONF(STM32_PIN_PB12, pin_pb12_funcs), + STM32_PIN_CONF(STM32_PIN_PB13, pin_pb13_funcs), + + /* Port C */ + STM32_PIN_CONF(STM32_PIN_PC5, pin_pc5_funcs), + STM32_PIN_CONF(STM32_PIN_PC6, pin_pc6_funcs), + STM32_PIN_CONF(STM32_PIN_PC7, pin_pc7_funcs), + STM32_PIN_CONF(STM32_PIN_PC10, pin_pc10_funcs), + STM32_PIN_CONF(STM32_PIN_PC11, pin_pc11_funcs), + STM32_PIN_CONF(STM32_PIN_PC12, pin_pc12_funcs), + + /* Port D */ + STM32_PIN_CONF(STM32_PIN_PD0, pin_pd0_funcs), + STM32_PIN_CONF(STM32_PIN_PD2, pin_pd2_funcs), + STM32_PIN_CONF(STM32_PIN_PD5, pin_pd5_funcs), + STM32_PIN_CONF(STM32_PIN_PD6, pin_pd6_funcs), + STM32_PIN_CONF(STM32_PIN_PD8, pin_pd8_funcs), + STM32_PIN_CONF(STM32_PIN_PD9, pin_pd9_funcs), + STM32_PIN_CONF(STM32_PIN_PD10, pin_pd10_funcs), + STM32_PIN_CONF(STM32_PIN_PD14, pin_pd14_funcs), + STM32_PIN_CONF(STM32_PIN_PD15, pin_pd15_funcs), + + /* Port E */ + STM32_PIN_CONF(STM32_PIN_PE0, pin_pe0_funcs), + STM32_PIN_CONF(STM32_PIN_PE1, pin_pe1_funcs), + STM32_PIN_CONF(STM32_PIN_PE2, pin_pe2_funcs), + STM32_PIN_CONF(STM32_PIN_PE3, pin_pe3_funcs), + STM32_PIN_CONF(STM32_PIN_PE7, pin_pe7_funcs), + STM32_PIN_CONF(STM32_PIN_PE8, pin_pe8_funcs), + + /* Port F */ + STM32_PIN_CONF(STM32_PIN_PF6, pin_pf6_funcs), + STM32_PIN_CONF(STM32_PIN_PF7, pin_pf7_funcs), + STM32_PIN_CONF(STM32_PIN_PF8, pin_pf8_funcs), + STM32_PIN_CONF(STM32_PIN_PF9, pin_pf9_funcs), + + /* Port G */ + STM32_PIN_CONF(STM32_PIN_PG0, pin_pg0_funcs), + STM32_PIN_CONF(STM32_PIN_PG1, pin_pg1_funcs), + STM32_PIN_CONF(STM32_PIN_PG9, pin_pg9_funcs), + STM32_PIN_CONF(STM32_PIN_PG11, pin_pg11_funcs), + STM32_PIN_CONF(STM32_PIN_PG12, pin_pg12_funcs), + STM32_PIN_CONF(STM32_PIN_PG14, pin_pg14_funcs), }; int stm32_get_pin_config(int pin, int func) diff --git a/drivers/pinmux/stm32/pinmux_stm32f4.h b/drivers/pinmux/stm32/pinmux_stm32f4.h index 436c86567103b..818b32aaedce3 100644 --- a/drivers/pinmux/stm32/pinmux_stm32f4.h +++ b/drivers/pinmux/stm32/pinmux_stm32f4.h @@ -11,15 +11,122 @@ * @file Header for STM32F4 pin multiplexing helper */ +/* Port A */ #define STM32F4_PINMUX_FUNC_PA0_PWM2_CH1 STM32_PINMUX_FUNC_ALT_1 +#define STM32F4_PINMUX_FUNC_PA0_UART4_TX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PA1_UART4_RX STM32_PINMUX_FUNC_ALT_8 #define STM32F4_PINMUX_FUNC_PA2_USART2_TX STM32_PINMUX_FUNC_ALT_7 + #define STM32F4_PINMUX_FUNC_PA3_USART2_RX STM32_PINMUX_FUNC_ALT_7 +#define STM32F4_PINMUX_FUNC_PA8_UART7_RX STM32_PINMUX_FUNC_ALT_8 + #define STM32F4_PINMUX_FUNC_PA9_USART1_TX STM32_PINMUX_FUNC_ALT_7 + #define STM32F4_PINMUX_FUNC_PA10_USART1_RX STM32_PINMUX_FUNC_ALT_7 +#define STM32F4_PINMUX_FUNC_PA11_USART6_TX STM32_PINMUX_FUNC_ALT_8 +#define STM32F4_PINMUX_FUNC_PA11_UART4_RX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PA12_USART6_RX STM32_PINMUX_FUNC_ALT_8 +#define STM32F4_PINMUX_FUNC_PA12_UART4_TX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PA15_USART1_TX STM32_PINMUX_FUNC_ALT_7 +#define STM32F4_PINMUX_FUNC_PA15_UART7_TX STM32_PINMUX_FUNC_ALT_8 + +/* Port B */ +#define STM32F4_PINMUX_FUNC_PB3_USART1_RX STM32_PINMUX_FUNC_ALT_7 +#define STM32F4_PINMUX_FUNC_PB3_UART7_RX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PB4_UART7_TX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PB5_UART5_RX STM32_PINMUX_FUNC_ALT_11 + #define STM32F4_PINMUX_FUNC_PB6_USART1_TX STM32_PINMUX_FUNC_ALT_7 +#define STM32F4_PINMUX_FUNC_PB6_UART5_TX STM32_PINMUX_FUNC_ALT_11 + #define STM32F4_PINMUX_FUNC_PB7_USART1_RX STM32_PINMUX_FUNC_ALT_7 +#define STM32F4_PINMUX_FUNC_PB8_UART5_RX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PB9_UART5_TX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PB10_USART3_TX STM32_PINMUX_FUNC_ALT_7 + +#define STM32F4_PINMUX_FUNC_PB11_USART3_RX STM32_PINMUX_FUNC_ALT_7 + +#define STM32F4_PINMUX_FUNC_PB12_UART5_RX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PB13_UART5_TX STM32_PINMUX_FUNC_ALT_11 + +/* Port C */ +#define STM32F4_PINMUX_FUNC_PC5_USART3_RX STM32_PINMUX_FUNC_ALT_7 + +#define STM32F4_PINMUX_FUNC_PC6_USART6_TX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PC7_USART6_RX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PC10_USART3_TX STM32_PINMUX_FUNC_ALT_7 + +#define STM32F4_PINMUX_FUNC_PC11_USART3_RX STM32_PINMUX_FUNC_ALT_7 +#define STM32F4_PINMUX_FUNC_PC11_UART4_RX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PC12_UART5_TX STM32_PINMUX_FUNC_ALT_8 + +/* Port D */ +#define STM32F4_PINMUX_FUNC_PD0_UART4_RX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PD2_UART5_RX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PD5_USART2_TX STM32_PINMUX_FUNC_ALT_7 + +#define STM32F4_PINMUX_FUNC_PD6_USART2_RX STM32_PINMUX_FUNC_ALT_7 + +#define STM32F4_PINMUX_FUNC_PD8_USART3_TX STM32_PINMUX_FUNC_ALT_7 + +#define STM32F4_PINMUX_FUNC_PD9_USART3_RX STM32_PINMUX_FUNC_ALT_7 + +#define STM32F4_PINMUX_FUNC_PD10_UART4_TX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PD14_UART9_RX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PD15_UART9_TX STM32_PINMUX_FUNC_ALT_11 + +/* Port E */ +#define STM32F4_PINMUX_FUNC_PE0_UART8_RX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PE1_UART8_TX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PE2_UART10_RX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PE3_UART10_TX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PE7_UART7_RX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PE8_UART7_TX STM32_PINMUX_FUNC_ALT_8 + +/* Port F */ +#define STM32F4_PINMUX_FUNC_PF6_UART7_RX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PF7_UART7_TX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PF8_UART8_RX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PF9_UART8_TX STM32_PINMUX_FUNC_ALT_8 + +/* Port G */ +#define STM32F4_PINMUX_FUNC_PG0_UART9_RX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PG1_UART9_TX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PG9_USART6_RX STM32_PINMUX_FUNC_ALT_8 + +#define STM32F4_PINMUX_FUNC_PG11_UART10_RX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PG12_UART10_TX STM32_PINMUX_FUNC_ALT_11 + +#define STM32F4_PINMUX_FUNC_PG14_USART6_TX STM32_PINMUX_FUNC_ALT_8 + #endif /* _STM32F4_PINMUX_H_ */ diff --git a/drivers/serial/Kconfig.stm32 b/drivers/serial/Kconfig.stm32 index 4a67eb1e93ffd..a871861834fcc 100644 --- a/drivers/serial/Kconfig.stm32 +++ b/drivers/serial/Kconfig.stm32 @@ -71,4 +71,130 @@ config UART_STM32_PORT_3_NAME This is the device name for USART3 port, and is included in the device struct. +# --- port 4 --- + +config UART_STM32_PORT_4 + bool "Enable STM32 UART4 Port" + default n + depends on UART_STM32 + help + Enable support for UART4 port in the driver. Say y here + if you want to use UART4 device. + +config UART_STM32_PORT_4_NAME + string "Device Name for STM32 UART4 Port" + default "UART_4" + depends on UART_STM32_PORT_4 + help + This is the device name for UART4 port, and is + included in the device struct. + +# --- port 5 --- + +config UART_STM32_PORT_5 + bool "Enable STM32 UART5 Port" + default n + depends on UART_STM32 + help + Enable support for UART5 port in the driver. Say y here + if you want to use UART5 device. + +config UART_STM32_PORT_5_NAME + string "Device Name for STM32 UART5 Port" + default "UART_5" + depends on UART_STM32_PORT_5 + help + This is the device name for UART5 port, and is + included in the device struct. + +# --- port 6 --- + +config UART_STM32_PORT_6 + bool "Enable STM32 USART6 Port" + default n + depends on UART_STM32 + help + Enable support for USART6 port in the driver. Say y here + if you want to use USART6 device. + +config UART_STM32_PORT_6_NAME + string "Device Name for STM32 USART6 Port" + default "UART_6" + depends on UART_STM32_PORT_6 + help + This is the device name for USART6 port, and is + included in the device struct. + +# --- port 7 --- + +config UART_STM32_PORT_7 + bool "Enable STM32 UART7 Port" + default n + depends on UART_STM32 + help + Enable support for UART7 port in the driver. Say y here + if you want to use UART7 device. + +config UART_STM32_PORT_7_NAME + string "Device Name for STM32 UART7 Port" + default "UART_7" + depends on UART_STM32_PORT_7 + help + This is the device name for UART7 port, and is + included in the device struct. + +# --- port 8 --- + +config UART_STM32_PORT_8 + bool "Enable STM32 UART8 Port" + default n + depends on UART_STM32 + help + Enable support for UART8 port in the driver. Say y here + if you want to use UART8 device. + +config UART_STM32_PORT_8_NAME + string "Device Name for STM32 UART8 Port" + default "UART_8" + depends on UART_STM32_PORT_8 + help + This is the device name for UART8 port, and is + included in the device struct. + +# --- port 9 --- + +config UART_STM32_PORT_9 + bool "Enable STM32 UART9 Port" + default n + depends on UART_STM32 + help + Enable support for UART9 port in the driver. Say y here + if you want to use UART9 device. + +config UART_STM32_PORT_9_NAME + string "Device Name for STM32 UART9 Port" + default "UART_9" + depends on UART_STM32_PORT_9 + help + This is the device name for UART9 port, and is + included in the device struct. + +# --- port 10 --- + +config UART_STM32_PORT_10 + bool "Enable STM32 UART10 Port" + default n + depends on UART_STM32 + help + Enable support for UART10 port in the driver. Say y here + if you want to use UART10 device. + +config UART_STM32_PORT_10_NAME + string "Device Name for STM32 UART10 Port" + default "UART_10" + depends on UART_STM32_PORT_10 + help + This is the device name for UART10 port, and is + included in the device struct. + endif # UART_STM32 diff --git a/drivers/serial/uart_stm32.c b/drivers/serial/uart_stm32.c index d7747008d4309..9259120025a8c 100644 --- a/drivers/serial/uart_stm32.c +++ b/drivers/serial/uart_stm32.c @@ -303,145 +303,100 @@ static int uart_stm32_init(struct device *dev) return 0; } - -#ifdef CONFIG_UART_STM32_PORT_1 - -#ifdef CONFIG_UART_INTERRUPT_DRIVEN -static void uart_stm32_irq_config_func_1(struct device *dev); -#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ - -static const struct uart_stm32_config uart_stm32_dev_cfg_1 = { - .uconf = { - .base = (u8_t *)CONFIG_UART_STM32_PORT_1_BASE_ADDRESS, -#ifdef CONFIG_UART_INTERRUPT_DRIVEN - .irq_config_func = uart_stm32_irq_config_func_1, -#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ - }, +/* Define clocks */ #ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE - .pclken = { .bus = STM32_CLOCK_BUS_APB2, - .enr = LL_APB2_GRP1_PERIPH_USART1 }, + #define STM32_CLOCK_UART(type, apb, n) \ + .pclken = { .bus = STM32_CLOCK_BUS_ ## apb, \ + .enr = LL_##apb##_GRP1_PERIPH_##type##n } #else - .clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART1), + #define STM32_CLOCK_UART(type, apb, n) \ + .clock_subsys = UINT_TO_POINTER( \ + STM32F10X_CLOCK_SUBSYS_##type##n) #endif /* CLOCK_CONTROL_STM32_CUBE */ -}; - -static struct uart_stm32_data uart_stm32_dev_data_1 = { - .huart = { - .Init = { - .BaudRate = CONFIG_UART_STM32_PORT_1_BAUD_RATE - } - } -}; - -DEVICE_AND_API_INIT(uart_stm32_1, CONFIG_UART_STM32_PORT_1_NAME, - &uart_stm32_init, - &uart_stm32_dev_data_1, &uart_stm32_dev_cfg_1, - PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, - &uart_stm32_driver_api); #ifdef CONFIG_UART_INTERRUPT_DRIVEN -static void uart_stm32_irq_config_func_1(struct device *dev) -{ - IRQ_CONNECT(PORT_1_IRQ, - CONFIG_UART_STM32_PORT_1_IRQ_PRI, - uart_stm32_isr, DEVICE_GET(uart_stm32_1), - 0); - irq_enable(PORT_1_IRQ); +#define STM32_UART_IRQ_HANDLER_DECL(n) \ + static void uart_stm32_irq_config_func_##n(struct device *dev) +#define STM32_UART_IRQ_HANDLER_FUNC(n) \ + .irq_config_func = uart_stm32_irq_config_func_##n, +#define STM32_UART_IRQ_HANDLER(n) \ +static void uart_stm32_irq_config_func_##n(struct device *dev) \ +{ \ + IRQ_CONNECT(PORT_ ## n ## _IRQ, \ + CONFIG_UART_STM32_PORT_ ## n ## _IRQ_PRI, \ + uart_stm32_isr, DEVICE_GET(uart_stm32_ ## n), \ + 0); \ + irq_enable(PORT_ ## n ## _IRQ); \ } -#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ - -#endif /* CONFIG_UART_STM32_PORT_1 */ - - -#ifdef CONFIG_UART_STM32_PORT_2 - -#ifdef CONFIG_UART_INTERRUPT_DRIVEN -static void uart_stm32_irq_config_func_2(struct device *dev); -#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ - -static const struct uart_stm32_config uart_stm32_dev_cfg_2 = { - .uconf = { - .base = (u8_t *)CONFIG_UART_STM32_PORT_2_BASE_ADDRESS, -#ifdef CONFIG_UART_INTERRUPT_DRIVEN - .irq_config_func = uart_stm32_irq_config_func_2, -#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ - }, -#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE - .pclken = { .bus = STM32_CLOCK_BUS_APB1, - .enr = LL_APB1_GRP1_PERIPH_USART2 }, #else - .clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART2), -#endif /* CLOCK_CONTROL_STM32_CUBE */ -}; - -static struct uart_stm32_data uart_stm32_dev_data_2 = { - .huart = { - .Init = { - .BaudRate = CONFIG_UART_STM32_PORT_2_BAUD_RATE} } -}; +#define STM32_UART_IRQ_HANDLER_DECL(n) +#define STM32_UART_IRQ_HANDLER_FUNC(n) +#define STM32_UART_IRQ_HANDLER(n) +#endif -DEVICE_AND_API_INIT(uart_stm32_2, CONFIG_UART_STM32_PORT_2_NAME, - &uart_stm32_init, - &uart_stm32_dev_data_2, &uart_stm32_dev_cfg_2, - PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, - &uart_stm32_driver_api); +#define UART_DEVICE_INIT_STM32(type, n, apb) \ +STM32_UART_IRQ_HANDLER_DECL(n); \ + \ +static const struct uart_stm32_config uart_stm32_dev_cfg_##n = { \ + .uconf = { \ + .base = (u8_t *)CONFIG_UART_STM32_PORT_ ## n ## _BASE_ADDRESS, \ + STM32_UART_IRQ_HANDLER_FUNC(n) \ + }, \ + STM32_CLOCK_UART(type, apb, n), \ +}; \ + \ +static struct uart_stm32_data uart_stm32_dev_data_##n = { \ + .huart = { \ + .Init = { \ + .BaudRate = CONFIG_UART_STM32_PORT_##n##_BAUD_RATE \ + } \ + } \ +}; \ + \ +DEVICE_AND_API_INIT(uart_stm32_##n, CONFIG_UART_STM32_PORT_##n##_NAME, \ + &uart_stm32_init, \ + &uart_stm32_dev_data_##n, &uart_stm32_dev_cfg_##n, \ + PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \ + &uart_stm32_driver_api); \ + \ +STM32_UART_IRQ_HANDLER(n) -#ifdef CONFIG_UART_INTERRUPT_DRIVEN -static void uart_stm32_irq_config_func_2(struct device *dev) -{ - IRQ_CONNECT(PORT_2_IRQ, - CONFIG_UART_STM32_PORT_2_IRQ_PRI, - uart_stm32_isr, DEVICE_GET(uart_stm32_2), - 0); - irq_enable(PORT_2_IRQ); -} -#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ +#ifdef CONFIG_UART_STM32_PORT_1 +UART_DEVICE_INIT_STM32(USART, 1, APB2) +#endif /* CONFIG_UART_STM32_PORT_1 */ +#ifdef CONFIG_UART_STM32_PORT_2 +UART_DEVICE_INIT_STM32(USART, 2, APB1) #endif /* CONFIG_UART_STM32_PORT_2 */ - #ifdef CONFIG_UART_STM32_PORT_3 +UART_DEVICE_INIT_STM32(USART, 3, APB1) +#endif /* CONFIG_UART_STM32_PORT_3 */ -#ifdef CONFIG_UART_INTERRUPT_DRIVEN -static void uart_stm32_irq_config_func_3(struct device *dev); -#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ +#ifdef CONFIG_UART_STM32_PORT_4 +UART_DEVICE_INIT_STM32(UART, 4, APB1) +#endif /* CONFIG_UART_STM32_PORT_4 */ -static const struct uart_stm32_config uart_stm32_dev_cfg_3 = { - .uconf = { - .base = (u8_t *)CONFIG_UART_STM32_PORT_3_BASE_ADDRESS, -#ifdef CONFIG_UART_INTERRUPT_DRIVEN - .irq_config_func = uart_stm32_irq_config_func_3, -#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ - }, -#ifdef CONFIG_CLOCK_CONTROL_STM32_CUBE - .pclken = { .bus = STM32_CLOCK_BUS_APB1, - .enr = LL_APB1_GRP1_PERIPH_USART3 }, -#else - .clock_subsys = UINT_TO_POINTER(STM32F10X_CLOCK_SUBSYS_USART3), -#endif /* CLOCK_CONTROL_STM32_CUBE */ -}; +#ifdef CONFIG_UART_STM32_PORT_5 +UART_DEVICE_INIT_STM32(UART, 5, APB1) +#endif /* CONFIG_UART_STM32_PORT_5 */ -static struct uart_stm32_data uart_stm32_dev_data_3 = { - .huart = { - .Init = { - .BaudRate = CONFIG_UART_STM32_PORT_3_BAUD_RATE} } -}; +#ifdef CONFIG_UART_STM32_PORT_6 +UART_DEVICE_INIT_STM32(USART, 6, APB2) +#endif /* CONFIG_UART_STM32_PORT_6 */ -DEVICE_AND_API_INIT(uart_stm32_3, CONFIG_UART_STM32_PORT_3_NAME, - &uart_stm32_init, - &uart_stm32_dev_data_3, &uart_stm32_dev_cfg_3, - PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, - &uart_stm32_driver_api); +#ifdef CONFIG_UART_STM32_PORT_7 +UART_DEVICE_INIT_STM32(UART, 7, APB1) +#endif /* CONFIG_UART_STM32_PORT_7 */ -#ifdef CONFIG_UART_INTERRUPT_DRIVEN -static void uart_stm32_irq_config_func_3(struct device *dev) -{ - IRQ_CONNECT(PORT_3_IRQ, - CONFIG_UART_STM32_PORT_3_IRQ_PRI, - uart_stm32_isr, DEVICE_GET(uart_stm32_3), - 0); - irq_enable(PORT_3_IRQ); -} -#endif /* CONFIG_UART_INTERRUPT_DRIVEN */ +#ifdef CONFIG_UART_STM32_PORT_8 +UART_DEVICE_INIT_STM32(UART, 8, APB1) +#endif /* CONFIG_UART_STM32_PORT_8 */ -#endif /* CONFIG_UART_STM32_PORT_3 */ +#ifdef CONFIG_UART_STM32_PORT_9 +UART_DEVICE_INIT_STM32(UART, 9, APB2) +#endif /* CONFIG_UART_STM32_PORT_9 */ + +#ifdef CONFIG_UART_STM32_PORT_10 +UART_DEVICE_INIT_STM32(UART, 10, APB2) +#endif /* CONFIG_UART_STM32_PORT_10 */ diff --git a/dts/arm/st/stm32f4.dtsi b/dts/arm/st/stm32f4.dtsi index 8a96c2f8a7b07..0eaff4ce39674 100644 --- a/dts/arm/st/stm32f4.dtsi +++ b/dts/arm/st/stm32f4.dtsi @@ -31,12 +31,61 @@ status = "disabled"; }; + usart3: uart@40004800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004800 0x400>; + interrupts = <39 0>; + status = "disabled"; + }; + + uart4: uart@40004c00 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004c00 0x400>; + interrupts = <52 0>; + status = "disabled"; + }; + + uart5: uart@40005000 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40005000 0x400>; + interrupts = <53 0>; + status = "disabled"; + }; + usart6: uart@40011400 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40011400 0x400>; interrupts = <71 0>; status = "disabled"; }; + + uart7: uart@40007800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40007800 0x400>; + interrupts = <82 0>; + status = "disabled"; + }; + + uart8: uart@40007c00 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40007c00 0x400>; + interrupts = <83 0>; + status = "disabled"; + }; + + uart9: uart@40011800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40011800 0x400>; + interrupts = <88 0>; + status = "disabled"; + }; + + uart10: uart@40011c00 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40011c00 0x400>; + interrupts = <89 0>; + status = "disabled"; + }; }; };