diff --git a/boards/arm/disco_l475_iot1/disco_l475_iot1.dts b/boards/arm/disco_l475_iot1/disco_l475_iot1.dts index dd847f3a66bef..bdb2e4f8b3806 100644 --- a/boards/arm/disco_l475_iot1/disco_l475_iot1.dts +++ b/boards/arm/disco_l475_iot1/disco_l475_iot1.dts @@ -51,6 +51,8 @@ &usart1 { current-speed = <115200>; + pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>; + pinctrl-names = "default"; status = "okay"; }; diff --git a/dts/arm/st/l4/stm32l4-pinctrl.dtsi b/dts/arm/st/l4/stm32l4-pinctrl.dtsi new file mode 100644 index 0000000000000..3c834df89755d --- /dev/null +++ b/dts/arm/st/l4/stm32l4-pinctrl.dtsi @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2019 Linaro Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@48000000 { + /* USART1_TX */ + usart1_tx_pa9: usart1_tx_1 { + pinmux = ; + drive-push-pull; + bias-pull-up; + }; + usart1_tx_pb6: usart1_tx_2 { + pinmux = ; + drive-push-pull; + bias-pull-up; + }; + /* USART1_RX */ + usart1_rx_pa10: usart1_rx_1 { + pinmux = ; + bias-disable; + }; + usart1_rx_pb7: usart1_rx_2 { + pinmux = ; + bias-disable; + }; + /* USART2_TX */ + usart2_tx_pa2: usart2_tx_1 { + pinmux = ; + bias-disable; + }; + /* USART2_RX */ + usart2_rx_pa3: usart2_rx_1 { + pinmux = ; + bias-disable; + }; + usart2_rx_pa15: usart2_rx_2 { + pinmux = ; + bias-disable; + }; + }; + }; +}; diff --git a/dts/arm/st/l4/stm32l4.dtsi b/dts/arm/st/l4/stm32l4.dtsi index 89850fbfc07a3..78a9229e7a015 100644 --- a/dts/arm/st/l4/stm32l4.dtsi +++ b/dts/arm/st/l4/stm32l4.dtsi @@ -7,6 +7,7 @@ #include +#include #include #include #include diff --git a/dts/arm/st/l4/stm32l471-pinctrl.dtsi b/dts/arm/st/l4/stm32l471-pinctrl.dtsi new file mode 100644 index 0000000000000..4242c4ed2fcba --- /dev/null +++ b/dts/arm/st/l4/stm32l471-pinctrl.dtsi @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2019 Linaro Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + soc { + pinctrl: pin-controller@48000000 { + /* USART3_TX */ + usart3_tx_pb10: usart3_tx_1 { + pinmux = ; + drive-push-pull; + bias-pull-up; + }; + usart3_tx_pc4: usart3_tx_2 { + pinmux = ; + drive-push-pull; + bias-pull-up; + }; + usart3_tx_pc11: usart3_tx_3 { + pinmux = ; + drive-push-pull; + bias-pull-up; + }; + /* USART3_RX */ + usart3_rx_pb10: usart3_rx_1 { + pinmux = ; + bias-pull-up; + }; + usart3_rx_pc4: usart3_rx_2 { + pinmux = ; + bias-pull-up; + }; + usart3_rx_pc11: usart3_rx_3 { + pinmux = ; + bias-pull-up; + }; + }; + }; +}; diff --git a/dts/bindings/pinctrl/st,stm32-pinmux.yaml b/dts/bindings/pinctrl/st,stm32-pinmux.yaml index face232eb7480..564c0ab48e106 100644 --- a/dts/bindings/pinctrl/st,stm32-pinmux.yaml +++ b/dts/bindings/pinctrl/st,stm32-pinmux.yaml @@ -11,6 +11,50 @@ properties: reg: required: true -pinmux-cells: - - pin - - function +child-binding: + title: STM32 PIN configurations + + description: | + This binding gives a base representation of the STM32 pins configration + + properties: + pinmux: + required: false + type: int + + bias-disable: + required: false + type: boolean + + bias-pull-down: + required: false + type: boolean + + bias-pull-up: + required: false + type: boolean + + drive-push-pull: + required: false + type: boolean + + drive-open-drain: + required: false + type: boolean + + output-low: + required: false + type: boolean + + output-high: + required: false + type: boolean + + slew-rate: + type: int + default: 2 + enum: + - 0 + - 1 + - 2 + - 3 diff --git a/include/dt-bindings/pinctrl/stm32-pinctrl-common.h b/include/dt-bindings/pinctrl/stm32-pinctrl-common.h index c58e91f32f7da..98f928db3deab 100644 --- a/include/dt-bindings/pinctrl/stm32-pinctrl-common.h +++ b/include/dt-bindings/pinctrl/stm32-pinctrl-common.h @@ -7,6 +7,31 @@ #ifndef ZEPHYR_STM32_PINCTRL_COMMON_H_ #define ZEPHYR_STM32_PINCTRL_COMMON_H_ +/* Extracted from Linux: include/dt-bindings/pinctrl/stm32-pinfunc.h */ +/* define PIN modes */ +#define GPIO 0x0 +#define AF0 0x1 +#define AF1 0x2 +#define AF2 0x3 +#define AF3 0x4 +#define AF4 0x5 +#define AF5 0x6 +#define AF6 0x7 +#define AF7 0x8 +#define AF8 0x9 +#define AF9 0xa +#define AF10 0xb +#define AF11 0xc +#define AF12 0xd +#define AF13 0xe +#define AF14 0xf +#define AF15 0x10 +#define ANALOG 0x11 + +/* define Pins number*/ +#define PIN_NO(port, line) (((port) - 'A') * 0x10 + (line)) + +#define STM32_PINMUX(port, line, mode) (((PIN_NO(port, line)) << 8) | (mode)) /** * @brief numerical IDs for IO ports