arch: common: nocache: fix linker section definition #16923
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No-cache SRAM section is currently used for ARM-only builds with support for no-cacheable memory sections (i.e. CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT) and it holds uninitialized data. This commit properly defines the corresponding linker section using SECTION_DATA_PROLOGUE and GROUP_DATA_LINK_IN macros. Signed-off-by: Ioannis Glaropoulos <[email protected]>
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No cache memory sections are currently used only for ARM, and only for Cortex-M7 with MPU support, which is reflected in ARCH_HAS_NOCACHE_MEMORY_SUPPORT. Currently used for uninitialized data in some drivers like ethernet and usb for nxp and atmel platforms. |
jukkar
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Jun 19, 2019
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No-cache SRAM section is currently used for ARM-only builds
with support for no-cacheable memory sections (i.e.
CONFIG_ARCH_HAS_NOCACHE_MEMORY_SUPPORT) and it holds
uninitialized data. This commit properly defines the
corresponding linker section using SECTION_DATA_PROLOGUE
and GROUP_DATA_LINK_IN macros.
The patch fixes mimxrt board compilation.
Fixes #16778
Signed-off-by: Ioannis Glaropoulos [email protected]