@@ -131,6 +131,8 @@ void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai)
131131
132132void HAL_SAI_TxCpltCallback (SAI_HandleTypeDef * hsai )
133133{
134+ LOG_WRN ("HAL_SAI_TxCpltCallback" );
135+
134136 struct i2s_stm32_sai_data * dev_data = CONTAINER_OF (hsai , struct i2s_stm32_sai_data , hsai );
135137 struct stream * stream = & dev_data -> stream ;
136138 struct queue_item item ;
@@ -274,8 +276,14 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
274276 /* HACK: This field is used to inform driver that it is overridden */
275277 dma_cfg .linked_channel = STM32_DMA_HAL_OVERRIDE ;
276278
279+ #if defined(CONFIG_SOC_SERIES_STM32L4X )
280+ /* Because of the STREAM OFFSET, the DMA channel given here is from 0 - 7 */
281+ ret = dma_config (stream -> dma_dev , (stream -> dma_channel - 1 ) + STM32_DMA_STREAM_OFFSET ,
282+ & dma_cfg );
283+ #else
277284 /* Because of the STREAM OFFSET, the DMA channel given here is from 1 - 8 */
278285 ret = dma_config (stream -> dma_dev , stream -> dma_channel + STM32_DMA_STREAM_OFFSET , & dma_cfg );
286+ #endif
279287
280288 if (ret != 0 ) {
281289 LOG_ERR ("Failed to configure DMA channel %d" ,
@@ -285,12 +293,18 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
285293
286294#if defined(CONFIG_SOC_SERIES_STM32H7X )
287295 hdma -> Instance = __LL_DMA_GET_STREAM_INSTANCE (stream -> reg , stream -> dma_channel );
288- hdma -> Init .PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD ;
289- hdma -> Init .MemDataAlignment = DMA_PDATAALIGN_HALFWORD ;
290- hdma -> Init .Priority = DMA_PRIORITY_HIGH ;
291296 hdma -> Init .FIFOMode = DMA_FIFOMODE_DISABLE ;
297+ #elif defined(CONFIG_SOC_SERIES_STM32L4X )
298+ hdma -> Instance = __LL_DMA_GET_CHANNEL_INSTANCE (stream -> reg , (stream -> dma_channel - 1 ));
292299#else
293300 hdma -> Instance = LL_DMA_GET_CHANNEL_INSTANCE (stream -> reg , stream -> dma_channel );
301+ #endif
302+
303+ #if defined(CONFIG_SOC_SERIES_STM32H7X ) || defined(CONFIG_SOC_SERIES_STM32L4X )
304+ hdma -> Init .PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD ;
305+ hdma -> Init .MemDataAlignment = DMA_MDATAALIGN_HALFWORD ;
306+ hdma -> Init .Priority = DMA_PRIORITY_HIGH ;
307+ #else
294308 hdma -> Init .BlkHWRequest = DMA_BREQ_SINGLE_BURST ;
295309 hdma -> Init .SrcDataWidth = DMA_SRC_DATAWIDTH_HALFWORD ;
296310 hdma -> Init .DestDataWidth = DMA_DEST_DATAWIDTH_HALFWORD ;
@@ -304,10 +318,13 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
304318 hdma -> Init .Request = dma_cfg .dma_slot ;
305319 hdma -> Init .Mode = DMA_NORMAL ;
306320
321+ /* L4 how to get the request */
322+ hdma -> Init .Request = DMA_REQUEST_1 ;
323+
307324 if (stream -> dma_cfg .channel_direction == (enum dma_channel_direction )MEMORY_TO_PERIPHERAL ) {
308325 hdma -> Init .Direction = DMA_MEMORY_TO_PERIPH ;
309326
310- #if defined(CONFIG_SOC_SERIES_STM32H7X )
327+ #if defined(CONFIG_SOC_SERIES_STM32H7X ) || defined( CONFIG_SOC_SERIES_STM32L4X )
311328 hdma -> Init .PeriphInc = DMA_PINC_DISABLE ;
312329 hdma -> Init .MemInc = DMA_MINC_ENABLE ;
313330#else
@@ -319,7 +336,7 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
319336 } else {
320337 hdma -> Init .Direction = DMA_PERIPH_TO_MEMORY ;
321338
322- #if defined(CONFIG_SOC_SERIES_STM32H7X )
339+ #if defined(CONFIG_SOC_SERIES_STM32H7X ) || defined( CONFIG_SOC_SERIES_STM32L4X )
323340 hdma -> Init .PeriphInc = DMA_PINC_ENABLE ;
324341 hdma -> Init .MemInc = DMA_MINC_DISABLE ;
325342#else
@@ -341,7 +358,7 @@ static int i2s_stm32_sai_dma_init(const struct device *dev)
341358 LOG_ERR ("HAL_DMA_ConfigChannelAttributes: <Failed>" );
342359 return - EIO ;
343360 }
344- #elif !defined(CONFIG_SOC_SERIES_STM32H7X )
361+ #elif !defined(CONFIG_SOC_SERIES_STM32H7X ) && !defined( CONFIG_SOC_SERIES_STM32L4X )
345362 if (HAL_DMA_ConfigChannelAttributes (& dev_data -> hdma , DMA_CHANNEL_NPRIV ) != HAL_OK ) {
346363 LOG_ERR ("HAL_DMA_ConfigChannelAttributes: <Failed>" );
347364 return - EIO ;
@@ -456,21 +473,28 @@ static int i2s_stm32_sai_configure(const struct device *dev, enum i2s_dir dir,
456473 return - EINVAL ;
457474 }
458475
476+ /* Not possible to control MCLK output from SAI configuration */
477+ #if !defined(CONFIG_SOC_SERIES_STM32L4X )
459478 if (cfg -> mclk_enable && stream -> master ) {
460479 hsai -> Init .MckOutput = SAI_MCK_OUTPUT_ENABLE ;
461480 } else {
462481 hsai -> Init .MckOutput = SAI_MCK_OUTPUT_DISABLE ;
463482 }
483+ #endif
464484
465485 if (cfg -> mclk_div == (enum mclk_divider )MCLK_NO_DIV ) {
466486 hsai -> Init .NoDivider = SAI_MASTERDIVIDER_DISABLED ;
467487 } else {
468488 hsai -> Init .NoDivider = SAI_MASTERDIVIDER_ENABLE ;
489+
490+ /* MckOverSampling is not supported by all STM32L4xx MCUs */
491+ #if !defined(CONFIG_SOC_SERIES_STM32L4X )
469492 if (cfg -> mclk_div == (enum mclk_divider )MCLK_DIV_256 ) {
470493 hsai -> Init .MckOverSampling = SAI_MCK_OVERSAMPLING_DISABLE ;
471494 } else {
472495 hsai -> Init .MckOverSampling = SAI_MCK_OVERSAMPLING_ENABLE ;
473496 }
497+ #endif
474498 }
475499
476500 /* AudioFrequency */
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