Skip to content

Commit b448f19

Browse files
galakgalak
committed
drivers: counter: cmsdk: Convert to new DT_<COMPAT>_<INSTANCE> defines
Convert cmsdk driver to use new defines so we can remove the dts_fixup.h code for it. Signed-off-by: Kumar Gala <[email protected]>
1 parent 91ed76e commit b448f19

File tree

12 files changed

+36
-167
lines changed

12 files changed

+36
-167
lines changed

‎boards/arm/mps2_an385/Kconfig.defconfig‎

Lines changed: 2 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -47,23 +47,12 @@ endif # WATCHDOG
4747

4848
if COUNTER
4949

50-
if TIMER_TMR_CMSDK_APB
51-
52-
config TIMER_TMR_CMSDK_APB_0
53-
default y
54-
55-
config TIMER_TMR_CMSDK_APB_1
50+
config TIMER_TMR_CMSDK_APB
5651
default y
5752

58-
endif # TIMER_TMR_CMSDK_APB
59-
60-
if TIMER_DTMR_CMSDK_APB
61-
62-
config TIMER_DTMR_CMSDK_APB_0
53+
config TIMER_DTMR_CMSDK_APB
6354
default y
6455

65-
endif # TIMER_DTMR_CMSDK_APB
66-
6756
endif # COUNTER
6857

6958
if I2C

‎boards/arm/mps2_an385/dts_fixup.h‎

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2,17 +2,6 @@
22

33
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
44

5-
/* CMSDK APB Timers */
6-
#define DT_CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS
7-
#define DT_CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_40000000_IRQ_0
8-
9-
#define DT_CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS
10-
#define DT_CMSDK_APB_TIMER_1_IRQ DT_ARM_CMSDK_TIMER_40001000_IRQ_0
11-
12-
/* CMSDK APB Dual Timer */
13-
#define DT_CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS
14-
#define DT_CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_40002000_IRQ_0
15-
165
/* CMSDK AHB General Purpose Input/Output (GPIO) */
176
#define DT_CMSDK_AHB_GPIO0 DT_ARM_CMSDK_GPIO_40010000_BASE_ADDRESS
187
#define DT_IRQ_PORT0_ALL DT_ARM_CMSDK_GPIO_40010000_IRQ_0

‎boards/arm/v2m_beetle/Kconfig.defconfig‎

Lines changed: 2 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -56,23 +56,12 @@ endif # WATCHDOG
5656

5757
if COUNTER
5858

59-
if TIMER_TMR_CMSDK_APB
60-
61-
config TIMER_TMR_CMSDK_APB_0
62-
default y
63-
64-
config TIMER_TMR_CMSDK_APB_1
59+
config TIMER_TMR_CMSDK_APB
6560
default y
6661

67-
endif # TIMER_TMR_CMSDK_APB
68-
69-
if TIMER_DTMR_CMSDK_APB
70-
71-
config TIMER_DTMR_CMSDK_APB_0
62+
config TIMER_DTMR_CMSDK_APB
7263
default y
7364

74-
endif # TIMER_DTMR_CMSDK_APB
75-
7665
endif # COUNTER
7766

7867
endif # BOARD_V2M_BEETLE

‎boards/arm/v2m_musca/Kconfig.defconfig‎

Lines changed: 2 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -40,23 +40,12 @@ endif # SERIAL
4040

4141
if COUNTER
4242

43-
if TIMER_TMR_CMSDK_APB
44-
45-
config TIMER_TMR_CMSDK_APB_0
46-
def_bool y
47-
48-
config TIMER_TMR_CMSDK_APB_1
43+
config TIMER_TMR_CMSDK_APB
4944
def_bool y
5045

51-
endif # TIMER_TMR_CMSDK_APB
52-
53-
if TIMER_DTMR_CMSDK_APB
54-
55-
config TIMER_DTMR_CMSDK_APB_0
46+
config TIMER_DTMR_CMSDK_APB
5647
def_bool y
5748

58-
endif # TIMER_DTMR_CMSDK_APB
59-
6049
endif # COUNTER
6150

6251
endif

‎drivers/counter/Kconfig.dtmr_cmsdk_apb‎

Lines changed: 0 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -14,22 +14,4 @@ config TIMER_DTMR_CMSDK_APB
1414
The dualtimer (DTMR) present in the platform is used as a timer.
1515
This option enables the support for the timer.
1616

17-
if TIMER_DTMR_CMSDK_APB
18-
19-
# ---------- Timer 0 ----------
20-
21-
config TIMER_DTMR_CMSDK_APB_0
22-
bool "Timer 0 driver"
23-
help
24-
Enable support for Timer 0.
25-
26-
config TIMER_DTMR_CMSDK_APB_0_IRQ_PRI
27-
int "Interrupt Priority for Timer 0"
28-
depends on TIMER_DTMR_CMSDK_APB_0
29-
default 3
30-
help
31-
Interrupt priority for Timer 0.
32-
33-
endif # TIMER_DTMR_CMSDK_APB
34-
3517
endif # SOC_FAMILY_ARM

‎drivers/counter/Kconfig.tmr_cmsdk_apb‎

Lines changed: 0 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -14,36 +14,4 @@ config TIMER_TMR_CMSDK_APB
1414
The timers (TMR) present in the platform are used as timers.
1515
This option enables the support for the timers.
1616

17-
if TIMER_TMR_CMSDK_APB
18-
19-
# ---------- Timer 0 ----------
20-
21-
config TIMER_TMR_CMSDK_APB_0
22-
bool "Timer 0 driver"
23-
help
24-
Enable support for Timer 0.
25-
26-
config TIMER_TMR_CMSDK_APB_0_IRQ_PRI
27-
int "Interrupt Priority for Timer 0"
28-
depends on TIMER_TMR_CMSDK_APB_0
29-
default 3
30-
help
31-
Interrupt priority for Timer 0.
32-
33-
# ---------- Timer 1 ----------
34-
35-
config TIMER_TMR_CMSDK_APB_1
36-
bool "Timer 1 driver"
37-
help
38-
Enable support for Timer 1.
39-
40-
config TIMER_TMR_CMSDK_APB_1_IRQ_PRI
41-
int "Interrupt Priority for Timer 1"
42-
depends on TIMER_TMR_CMSDK_APB_1
43-
default 3
44-
help
45-
Interrupt priority for Timer 1.
46-
47-
endif # TIMER_TMR_CMSDK_APB
48-
4917
endif # SOC_FAMILY_ARM

‎drivers/counter/timer_dtmr_cmsdk_apb.c‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -155,7 +155,7 @@ static int dtmr_cmsdk_apb_init(struct device *dev)
155155
}
156156

157157
/* TIMER 0 */
158-
#ifdef CONFIG_TIMER_DTMR_CMSDK_APB_0
158+
#ifdef DT_ARM_CMSDK_DTIMER_0
159159
static void dtimer_cmsdk_apb_config_0(struct device *dev);
160160

161161
static const struct dtmr_cmsdk_apb_cfg dtmr_cmsdk_apb_cfg_0 = {
@@ -165,22 +165,22 @@ static const struct dtmr_cmsdk_apb_cfg dtmr_cmsdk_apb_cfg_0 = {
165165
.count_up = false,
166166
.channels = 0U,
167167
},
168-
.dtimer = ((volatile struct dualtimer_cmsdk_apb *)DT_CMSDK_APB_DTIMER),
168+
.dtimer = ((volatile struct dualtimer_cmsdk_apb *)DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS),
169169
.dtimer_config_func = dtimer_cmsdk_apb_config_0,
170170
.dtimer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
171-
.device = DT_CMSDK_APB_DTIMER,},
171+
.device = DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS,},
172172
.dtimer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
173-
.device = DT_CMSDK_APB_DTIMER,},
173+
.device = DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS,},
174174
.dtimer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
175-
.device = DT_CMSDK_APB_DTIMER,},
175+
.device = DT_ARM_CMSDK_DTIMER_0_BASE_ADDRESS,},
176176
};
177177

178178
static struct dtmr_cmsdk_apb_dev_data dtmr_cmsdk_apb_dev_data_0 = {
179179
.load = UINT_MAX,
180180
};
181181

182182
DEVICE_AND_API_INIT(dtmr_cmsdk_apb_0,
183-
DT_CMSDK_APB_DTIMER0_LABEL,
183+
DT_ARM_CMSDK_DTIMER_0_LABEL,
184184
dtmr_cmsdk_apb_init,
185185
&dtmr_cmsdk_apb_dev_data_0,
186186
&dtmr_cmsdk_apb_cfg_0, POST_KERNEL,
@@ -189,10 +189,10 @@ DEVICE_AND_API_INIT(dtmr_cmsdk_apb_0,
189189

190190
static void dtimer_cmsdk_apb_config_0(struct device *dev)
191191
{
192-
IRQ_CONNECT(DT_CMSDK_APB_DUALTIMER_IRQ,
193-
CONFIG_TIMER_DTMR_CMSDK_APB_0_IRQ_PRI,
192+
IRQ_CONNECT(DT_ARM_CMSDK_DTIMER_0_IRQ_0,
193+
DT_ARM_CMSDK_DTIMER_0_IRQ_0_PRIORITY,
194194
dtmr_cmsdk_apb_isr,
195195
DEVICE_GET(dtmr_cmsdk_apb_0), 0);
196-
irq_enable(DT_CMSDK_APB_DUALTIMER_IRQ);
196+
irq_enable(DT_ARM_CMSDK_DTIMER_0_IRQ_0);
197197
}
198-
#endif /* CONFIG_TIMER_DTMR_CMSDK_APB_0 */
198+
#endif /* DT_ARM_CMSDK_DTIMER_0 */

‎drivers/counter/timer_tmr_cmsdk_apb.c‎

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -157,7 +157,7 @@ static int tmr_cmsdk_apb_init(struct device *dev)
157157
}
158158

159159
/* TIMER 0 */
160-
#ifdef CONFIG_TIMER_TMR_CMSDK_APB_0
160+
#ifdef DT_ARM_CMSDK_TIMER_0
161161
static void timer_cmsdk_apb_config_0(struct device *dev);
162162

163163
static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_0 = {
@@ -167,38 +167,38 @@ static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_0 = {
167167
.count_up = false,
168168
.channels = 0U,
169169
},
170-
.timer = ((volatile struct timer_cmsdk_apb *)DT_CMSDK_APB_TIMER0),
170+
.timer = ((volatile struct timer_cmsdk_apb *)DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS),
171171
.timer_config_func = timer_cmsdk_apb_config_0,
172172
.timer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
173-
.device = DT_CMSDK_APB_TIMER0,},
173+
.device = DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS,},
174174
.timer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
175-
.device = DT_CMSDK_APB_TIMER0,},
175+
.device = DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS,},
176176
.timer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
177-
.device = DT_CMSDK_APB_TIMER0,},
177+
.device = DT_ARM_CMSDK_TIMER_0_BASE_ADDRESS,},
178178
};
179179

180180
static struct tmr_cmsdk_apb_dev_data tmr_cmsdk_apb_dev_data_0 = {
181181
.load = UINT32_MAX,
182182
};
183183

184184
DEVICE_AND_API_INIT(tmr_cmsdk_apb_0,
185-
DT_CMSDK_APB_TIMER0_LABEL,
185+
DT_ARM_CMSDK_TIMER_0_LABEL,
186186
tmr_cmsdk_apb_init, &tmr_cmsdk_apb_dev_data_0,
187187
&tmr_cmsdk_apb_cfg_0, POST_KERNEL,
188188
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
189189
&tmr_cmsdk_apb_api);
190190

191191
static void timer_cmsdk_apb_config_0(struct device *dev)
192192
{
193-
IRQ_CONNECT(DT_CMSDK_APB_TIMER_0_IRQ, CONFIG_TIMER_TMR_CMSDK_APB_0_IRQ_PRI,
193+
IRQ_CONNECT(DT_ARM_CMSDK_TIMER_0_IRQ_0, DT_ARM_CMSDK_TIMER_0_IRQ_0_PRIORITY,
194194
tmr_cmsdk_apb_isr,
195195
DEVICE_GET(tmr_cmsdk_apb_0), 0);
196-
irq_enable(DT_CMSDK_APB_TIMER_0_IRQ);
196+
irq_enable(DT_ARM_CMSDK_TIMER_0_IRQ_0);
197197
}
198-
#endif /* CONFIG_TIMER_TMR_CMSDK_APB_0 */
198+
#endif /* DT_ARM_CMSDK_TIMER_0 */
199199

200200
/* TIMER 1 */
201-
#ifdef CONFIG_TIMER_TMR_CMSDK_APB_1
201+
#ifdef DT_ARM_CMSDK_TIMER_1
202202
static void timer_cmsdk_apb_config_1(struct device *dev);
203203

204204
static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_1 = {
@@ -208,32 +208,32 @@ static const struct tmr_cmsdk_apb_cfg tmr_cmsdk_apb_cfg_1 = {
208208
.count_up = false,
209209
.channels = 0U,
210210
},
211-
.timer = ((volatile struct timer_cmsdk_apb *)DT_CMSDK_APB_TIMER1),
211+
.timer = ((volatile struct timer_cmsdk_apb *)DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS),
212212
.timer_config_func = timer_cmsdk_apb_config_1,
213213
.timer_cc_as = {.bus = CMSDK_APB, .state = SOC_ACTIVE,
214-
.device = DT_CMSDK_APB_TIMER1,},
214+
.device = DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS,},
215215
.timer_cc_ss = {.bus = CMSDK_APB, .state = SOC_SLEEP,
216-
.device = DT_CMSDK_APB_TIMER1,},
216+
.device = DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS,},
217217
.timer_cc_dss = {.bus = CMSDK_APB, .state = SOC_DEEPSLEEP,
218-
.device = DT_CMSDK_APB_TIMER1,},
218+
.device = DT_ARM_CMSDK_TIMER_1_BASE_ADDRESS,},
219219
};
220220

221221
static struct tmr_cmsdk_apb_dev_data tmr_cmsdk_apb_dev_data_1 = {
222222
.load = UINT32_MAX,
223223
};
224224

225225
DEVICE_AND_API_INIT(tmr_cmsdk_apb_1,
226-
DT_CMSDK_APB_TIMER1_LABEL,
226+
DT_ARM_CMSDK_TIMER_1_LABEL,
227227
tmr_cmsdk_apb_init, &tmr_cmsdk_apb_dev_data_1,
228228
&tmr_cmsdk_apb_cfg_1, POST_KERNEL,
229229
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
230230
&tmr_cmsdk_apb_api);
231231

232232
static void timer_cmsdk_apb_config_1(struct device *dev)
233233
{
234-
IRQ_CONNECT(DT_CMSDK_APB_TIMER_1_IRQ, CONFIG_TIMER_TMR_CMSDK_APB_1_IRQ_PRI,
234+
IRQ_CONNECT(DT_ARM_CMSDK_TIMER_1_IRQ_0, DT_ARM_CMSDK_TIMER_1_IRQ_0_PRIORITY,
235235
tmr_cmsdk_apb_isr,
236236
DEVICE_GET(tmr_cmsdk_apb_1), 0);
237-
irq_enable(DT_CMSDK_APB_TIMER_1_IRQ);
237+
irq_enable(DT_ARM_CMSDK_TIMER_1_IRQ_0);
238238
}
239-
#endif /* CONFIG_TIMER_TMR_CMSDK_APB_1 */
239+
#endif /* DT_ARM_CMSDK_TIMER_1 */

‎soc/arm/arm/beetle/dts_fixup.h‎

Lines changed: 0 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -2,20 +2,6 @@
22

33
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
44

5-
/* CMSDK APB Timers */
6-
#define DT_CMSDK_APB_TIMER0 DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS
7-
#define DT_CMSDK_APB_TIMER_0_IRQ DT_ARM_CMSDK_TIMER_40000000_IRQ_0
8-
#define DT_CMSDK_APB_TIMER0_LABEL DT_ARM_CMSDK_TIMER_40000000_LABEL
9-
10-
#define DT_CMSDK_APB_TIMER1 DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS
11-
#define DT_CMSDK_APB_TIMER_1_IRQ DT_ARM_CMSDK_TIMER_40001000_IRQ_0
12-
#define DT_CMSDK_APB_TIMER1_LABEL DT_ARM_CMSDK_TIMER_40001000_LABEL
13-
14-
/* CMSDK APB Dual Timer */
15-
#define DT_CMSDK_APB_DTIMER DT_ARM_CMSDK_DTIMER_40002000_BASE_ADDRESS
16-
#define DT_CMSDK_APB_DUALTIMER_IRQ DT_ARM_CMSDK_DTIMER_40002000_IRQ_0
17-
#define DT_CMSDK_APB_DTIMER0_LABEL DT_ARM_CMSDK_DTIMER_40002000_LABEL
18-
195
/* CMSDK AHB General Purpose Input/Output (GPIO) */
206
#define DT_CMSDK_AHB_GPIO0 DT_ARM_CMSDK_GPIO_40010000_BASE_ADDRESS
217
#define DT_IRQ_PORT0_ALL DT_ARM_CMSDK_GPIO_40010000_IRQ_0

‎soc/arm/arm/beetle/power.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -25,13 +25,13 @@
2525

2626
#define AHB_CLK_BITS (CLK_BIT_GPIO0 | CLK_BIT_GPIO1)
2727

28-
#if defined(CONFIG_TIMER_TMR_CMSDK_APB_0)
28+
#if defined(DT_ARM_CMSDK_TIMER_40000000_BASE_ADDRESS)
2929
#define CLK_BIT_TIMER0 _BEETLE_TIMER0
3030
#else
3131
#define CLK_BIT_TIMER0 0
3232
#endif
3333

34-
#if defined(CONFIG_TIMER_TMR_CMSDK_APB_1)
34+
#if defined(DT_ARM_CMSDK_TIMER_40001000_BASE_ADDRESS)
3535
#define CLK_BIT_TIMER1 _BEETLE_TIMER1
3636
#else
3737
#define CLK_BIT_TIMER1 0

0 commit comments

Comments
 (0)