@@ -31,10 +31,10 @@ LOG_MODULE_REGISTER(flash_rpi_pico, CONFIG_FLASH_LOG_LEVEL);
3131
3232#define DT_DRV_COMPAT raspberrypi_pico_flash_controller
3333
34- #define PAGE_SIZE 256
34+ #define PAGE_SIZE 256
3535#define SECTOR_SIZE DT_PROP(DT_CHOSEN(zephyr_flash), erase_block_size)
3636#define ERASE_VALUE 0xff
37- #define FLASH_SIZE KB(CONFIG_FLASH_SIZE)
37+ #define FLASH_SIZE KB(CONFIG_FLASH_SIZE)
3838
3939static const struct flash_parameters flash_rpi_parameters = {
4040 .write_block_size = 1 ,
@@ -43,15 +43,16 @@ static const struct flash_parameters flash_rpi_parameters = {
4343
4444/**
4545 * Low level flash functions are based on:
46- * github.com/raspberrypi/pico-bootrom/blob/master/bootrom/program_flash_generic.c
46+ * github.com/raspberrypi/pico-bootrom/blob/master/bootrom/program_flash_generic.c,
47+ * github.com/raspberrypi/pico-bootrom-rp2350/blob/master/src/main/arm/varm_generic_flash.c
4748 * and
4849 * github.com/raspberrypi/pico-sdk/blob/master/src/rp2_common/hardware_flash/flash.c
4950 */
5051
5152#define FLASHCMD_PAGE_PROGRAM 0x02
52- #define FLASHCMD_READ_STATUS 0x05
53+ #define FLASHCMD_READ_STATUS 0x05
5354#define FLASHCMD_WRITE_ENABLE 0x06
54- #define BOOT2_SIZE_WORDS 64
55+ #define BOOT2_SIZE_WORDS 64
5556
5657enum outover {
5758 OUTOVER_NORMAL = 0 ,
@@ -83,7 +84,7 @@ static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)(void)
8384
8485static void __no_inline_not_in_flash_func (flash_enable_xip_via_boot2 )(void )
8586{
86- ((void (* )(void ))((uint32_t )boot2_copyout + 1 ))();
87+ ((void (* )(void ))((uint32_t )boot2_copyout + 1 ))();
8788}
8889
8990#if PICO_RP2350
@@ -106,38 +107,39 @@ static void __no_inline_not_in_flash_func(flash_rp2350_restore_qmi_cs1)(
106107{
107108 if (flash_devinfo_get_cs_size (1 ) == FLASH_DEVINFO_SIZE_NONE ) {
108109 /* Case 1: The RP2350 ROM sets QMI to a clean (03h read) configuration
109- during flash_exit_xip(), even though when CS1 is not enabled via
110- FLASH_DEVINFO it does not issue an XIP exit sequence to CS1. In
111- this case, restore the original register config for CS1 as it is
112- still the correct config. */
110+ * during flash_exit_xip(), even though when CS1 is not enabled via
111+ * FLASH_DEVINFO it does not issue an XIP exit sequence to CS1. In
112+ * this case, restore the original register config for CS1 as it is
113+ * still the correct config.
114+ */
113115 qmi_hw -> m [1 ].timing = state -> timing ;
114116 qmi_hw -> m [1 ].rcmd = state -> rcmd ;
115117 qmi_hw -> m [1 ].rfmt = state -> rfmt ;
116118 } else {
117119 /* Case 2: If RAM is attached to CS1, and the ROM has issued an XIP
118- exit sequence to it, then the ROM re-initialisation of the QMI
119- registers has actually not gone far enough. The old XIP write mode
120- is no longer valid when the QSPI RAM is returned to a serial
121- command state. Restore the default 02h serial write command config.
122- */
120+ * exit sequence to it, then the ROM re-initialisation of the QMI
121+ * registers has actually not gone far enough. The old XIP write mode
122+ * is no longer valid when the QSPI RAM is returned to a serial
123+ * command state. Restore the default 02h serial write command config.
124+ */
123125 qmi_hw -> m [1 ].wfmt = QMI_M1_WFMT_RESET ;
124126 qmi_hw -> m [1 ].wcmd = QMI_M1_WCMD_RESET ;
125127 }
126128}
127129#else
128130void __no_inline_not_in_flash_func (flash_cs_force )(enum outover over )
129131{
130- io_rw_32 * reg = (io_rw_32 * ) (IO_QSPI_BASE + IO_QSPI_GPIO_QSPI_SS_CTRL_OFFSET );
131- * reg = (* reg & ~IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_BITS )
132- | (over << IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_LSB );
133- (void ) * reg ;
132+ io_rw_32 * reg = (io_rw_32 * )(IO_QSPI_BASE + IO_QSPI_GPIO_QSPI_SS_CTRL_OFFSET );
133+ * reg = (* reg & ~IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_BITS ) |
134+ (over << IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_LSB );
135+ (void )* reg ;
134136}
135137#endif
136138
137139int __no_inline_not_in_flash_func (flash_was_aborted )()
138140{
139- return * (io_rw_32 * ) (IO_QSPI_BASE + IO_QSPI_GPIO_QSPI_SD1_CTRL_OFFSET )
140- & IO_QSPI_GPIO_QSPI_SD1_CTRL_INOVER_BITS ;
141+ return * (io_rw_32 * )(IO_QSPI_BASE + IO_QSPI_GPIO_QSPI_SD1_CTRL_OFFSET ) &
142+ IO_QSPI_GPIO_QSPI_SD1_CTRL_INOVER_BITS ;
141143}
142144
143145#if PICO_RP2350
@@ -151,14 +153,17 @@ uint __no_inline_not_in_flash_func(flash_put_get)(uint cs, const uint8_t *tx, ui
151153
152154 size_t tx_count = count ;
153155 size_t rx_count = count ;
156+
154157 while (tx_count || rx_count ) {
155158 uint32_t status = qmi_hw -> direct_csr ;
159+
156160 if (tx_count && !(status & QMI_DIRECT_CSR_TXFULL_BITS )) {
157161 qmi_hw -> direct_tx = (uint32_t )(tx ? * tx ++ : 0 );
158162 -- tx_count ;
159163 }
160164 if (rx_count && !(status & QMI_DIRECT_CSR_RXEMPTY_BITS )) {
161165 uint8_t rxbyte = (uint8_t )qmi_hw -> direct_rx ;
166+
162167 if (rx ) {
163168 * rx ++ = rxbyte ;
164169 }
@@ -167,16 +172,16 @@ uint __no_inline_not_in_flash_func(flash_put_get)(uint cs, const uint8_t *tx, ui
167172 }
168173
169174 /* Wait for BUSY as there may be no RX data at all, e.g. for single-byte SPI commands */
170- while (qmi_hw -> direct_csr & QMI_DIRECT_CSR_BUSY_BITS )
171- ;
175+ while (qmi_hw -> direct_csr & QMI_DIRECT_CSR_BUSY_BITS ) {
176+ }
172177
173178 /* Disable direct-mode interface and deassert chip select */
174179 hw_xor_bits (& qmi_hw -> direct_csr , csr_toggle_mask );
175180 return cs ;
176181}
177182#else
178183void __no_inline_not_in_flash_func (flash_put_get )(const uint8_t * tx , uint8_t * rx , size_t count ,
179- size_t rx_skip )
184+ size_t rx_skip )
180185{
181186 const uint max_in_flight = 16 - 2 ;
182187 size_t tx_count = count ;
@@ -225,7 +230,7 @@ uint __no_inline_not_in_flash_func(flash_put_get_wrapper)(uint cs, uint8_t cmd,
225230}
226231#else
227232void __no_inline_not_in_flash_func (flash_put_get_wrapper )(uint8_t cmd , const uint8_t * tx ,
228- uint8_t * rx , size_t count )
233+ uint8_t * rx , size_t count )
229234{
230235 flash_cs_force (OUTOVER_LOW );
231236 ssi_hw -> dr0 = cmd ;
@@ -244,7 +249,7 @@ static ALWAYS_INLINE uint flash_wait_ready(uint cs)
244249 return cs ;
245250}
246251#else
247- static ALWAYS_INLINE void flash_wait_ready ()
252+ static ALWAYS_INLINE void flash_wait_ready (void )
248253{
249254 uint8_t status_reg ;
250255
@@ -261,7 +266,7 @@ static ALWAYS_INLINE uint flash_enable_write(uint cs)
261266 return flash_put_get (cs , NULL , NULL , 0 );
262267}
263268#else
264- static ALWAYS_INLINE void flash_enable_write ()
269+ static ALWAYS_INLINE void flash_enable_write (void )
265270{
266271 flash_put_get_wrapper (FLASHCMD_WRITE_ENABLE , NULL , NULL , 0 );
267272}
@@ -286,10 +291,11 @@ static ALWAYS_INLINE void flash_put_cmd_addr(uint8_t cmd, uint32_t addr)
286291}
287292
288293void __no_inline_not_in_flash_func (flash_write_partial_internal )(uint32_t addr , const uint8_t * data ,
289- size_t size )
294+ size_t size )
290295{
291296#if PICO_RP2350
292297 uint cs = (addr >> 24 ) & 0x1u ;
298+
293299 cs = flash_enable_write (cs );
294300 flash_put_cmd_addr (FLASHCMD_PAGE_PROGRAM , addr );
295301 flash_put_get (cs , data , NULL , size );
@@ -305,16 +311,18 @@ void __no_inline_not_in_flash_func(flash_write_partial_internal)(uint32_t addr,
305311void __no_inline_not_in_flash_func (flash_write_partial )(uint32_t flash_offs , const uint8_t * data ,
306312 size_t count )
307313{
308- rom_connect_internal_flash_fn connect_internal_flash = (rom_connect_internal_flash_fn )
309- rom_func_lookup_inline (ROM_FUNC_CONNECT_INTERNAL_FLASH );
310- rom_flash_exit_xip_fn exit_xip = (rom_flash_exit_xip_fn )
311- rom_func_lookup_inline (ROM_FUNC_FLASH_EXIT_XIP );
312- rom_flash_flush_cache_fn flush_cache = (rom_flash_flush_cache_fn )
313- rom_func_lookup_inline (ROM_FUNC_FLASH_FLUSH_CACHE );
314+ rom_connect_internal_flash_fn connect_internal_flash =
315+ (rom_connect_internal_flash_fn )rom_func_lookup_inline (
316+ ROM_FUNC_CONNECT_INTERNAL_FLASH );
317+ rom_flash_exit_xip_fn exit_xip =
318+ (rom_flash_exit_xip_fn )rom_func_lookup_inline (ROM_FUNC_FLASH_EXIT_XIP );
319+ rom_flash_flush_cache_fn flush_cache =
320+ (rom_flash_flush_cache_fn )rom_func_lookup_inline (ROM_FUNC_FLASH_FLUSH_CACHE );
314321
315322 flash_init_boot2_copyout ();
316323#if PICO_RP2350
317324 flash_rp2350_qmi_save_state_t qmi_save ;
325+
318326 flash_rp2350_save_qmi_cs1 (& qmi_save );
319327#endif
320328
@@ -337,6 +345,8 @@ static bool is_valid_range(off_t offset, uint32_t size)
337345
338346static int flash_rpi_read (const struct device * dev , off_t offset , void * data , size_t size )
339347{
348+ ARG_UNUSED (dev );
349+
340350 if (size == 0 ) {
341351 return 0 ;
342352 }
@@ -357,13 +367,15 @@ static int flash_rpi_write(const struct device *dev, off_t offset, const void *d
357367 size_t bytes_to_write ;
358368 uint8_t * data_pointer = (uint8_t * )data ;
359369
370+ ARG_UNUSED (dev );
371+
360372 if (size == 0 ) {
361373 return 0 ;
362374 }
363375
364376 if (!is_valid_range (offset , size )) {
365- LOG_ERR ("Write range exceeds the flash boundaries. Offset=%#lx, Size=%u" ,
366- offset , size );
377+ LOG_ERR ("Write range exceeds the flash boundaries. Offset=%#lx, Size=%u" , offset ,
378+ size );
367379 return - EINVAL ;
368380 }
369381
@@ -406,14 +418,14 @@ static int flash_rpi_erase(const struct device *dev, off_t offset, size_t size)
406418 }
407419
408420 if (!is_valid_range (offset , size )) {
409- LOG_ERR ("Erase range exceeds the flash boundaries. Offset=%#lx, Size=%u" ,
410- offset , size );
421+ LOG_ERR ("Erase range exceeds the flash boundaries. Offset=%#lx, Size=%u" , offset ,
422+ size );
411423 return - EINVAL ;
412424 }
413425
414426 if ((offset % SECTOR_SIZE ) || (size % SECTOR_SIZE )) {
415427 LOG_ERR ("Erase range is not a multiple of the sector size. Offset=%#lx, Size=%u" ,
416- offset , size );
428+ offset , size );
417429 return - EINVAL ;
418430 }
419431
@@ -441,7 +453,7 @@ static const struct flash_pages_layout flash_rpi_pages_layout = {
441453};
442454
443455void flash_rpi_page_layout (const struct device * dev , const struct flash_pages_layout * * layout ,
444- size_t * layout_size )
456+ size_t * layout_size )
445457{
446458 * layout = & flash_rpi_pages_layout ;
447459 * layout_size = 1 ;
@@ -459,5 +471,5 @@ static DEVICE_API(flash, flash_rpi_driver_api) = {
459471#endif /* CONFIG_FLASH_PAGE_LAYOUT */
460472};
461473
462- DEVICE_DT_INST_DEFINE (0 , NULL , NULL , NULL , NULL , POST_KERNEL ,
463- CONFIG_FLASH_INIT_PRIORITY , & flash_rpi_driver_api );
474+ DEVICE_DT_INST_DEFINE (0 , NULL , NULL , NULL , NULL , POST_KERNEL , CONFIG_FLASH_INIT_PRIORITY ,
475+ & flash_rpi_driver_api );
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