Skip to content

Commit 84b5445

Browse files
diegosueirodiegosueiro
committed
board: add i2c support for colibri_imx7d_m4 board
Adds definitions, configurations and device tree entries for colibri_imx7d_m4 board. Signed-off-by: Diego Sueiro <[email protected]>
1 parent 37e4660 commit 84b5445

File tree

5 files changed

+125
-0
lines changed

5 files changed

+125
-0
lines changed

‎boards/arm/colibri_imx7d_m4/Kconfig.board‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,3 +9,4 @@ config BOARD_COLIBRI_IMX7D_M4
99
bool "Toradex Colibri iMX7 Dual"
1010
depends on SOC_SERIES_IMX7_M4
1111
select SOC_PART_NUMBER_MCIMX7D5EVM10SC
12+
select HAS_DTS_I2C_DEVICE

‎boards/arm/colibri_imx7d_m4/Kconfig.defconfig‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -42,4 +42,21 @@ config UART_IMX_UART_2
4242

4343
endif # UART_IMX
4444

45+
if I2C_IMX
46+
47+
config I2C_1
48+
def_bool n
49+
50+
config I2C_2
51+
def_bool n
52+
53+
config I2C_3
54+
def_bool n
55+
56+
config I2C_4
57+
def_bool y
58+
59+
endif # I2C_IMX
60+
61+
4562
endif # BOARD_COLIBRI_IMX7D_M4

‎boards/arm/colibri_imx7d_m4/colibri_imx7d_m4.dts‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@
1818
uart-2 = &uart2;
1919
led0 = &green_led;
2020
sw0 = &user_switch_1;
21+
i2c-4 = &i2c4;
2122
};
2223

2324
chosen {
@@ -58,3 +59,7 @@
5859
&gpio2 {
5960
status = "ok";
6061
};
62+
63+
&i2c4 {
64+
status = "ok";
65+
};

‎boards/arm/colibri_imx7d_m4/doc/colibri_imx7d_m4.rst‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -82,6 +82,8 @@ supports the following hardware features on the Cortex M4 Core:
8282
+-----------+------------+-------------------------------------+
8383
| GPIO | on-chip | gpio |
8484
+-----------+------------+-------------------------------------+
85+
| I2C | on-chip | i2c |
86+
+-----------+------------+-------------------------------------+
8587
| UART | on-chip | serial port-polling; |
8688
| | | serial port-interrupt |
8789
+-----------+------------+-------------------------------------+
@@ -109,6 +111,10 @@ was tested with the following pinmux controller configuration.
109111
+---------------+-----------------+---------------------------+
110112
| SODIMM_133 | GPIO2_IO26 | SW0 |
111113
+---------------+-----------------+---------------------------+
114+
| SODIMM_194 | I2C4_SDA | I2C_SDA |
115+
+---------------+-----------------+---------------------------+
116+
| SODIMM_196 | I2C4_SCL | I2C_SCL |
117+
+---------------+-----------------+---------------------------+
112118

113119
System Clock
114120
============

‎boards/arm/colibri_imx7d_m4/pinmux.c‎

Lines changed: 96 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -48,6 +48,102 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
4848
IOMUXC_UART2_RX_DATA_SELECT_INPUT_DAISY(3);
4949
#endif /* CONFIG_UART_IMX_UART_2 */
5050

51+
#ifdef CONFIG_I2C_1
52+
IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL =
53+
IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL_MUX_MODE(0) |
54+
IOMUXC_SW_MUX_CTL_PAD_I2C1_SCL_SION_MASK;
55+
IOMUXC_SW_MUX_CTL_PAD_I2C1_SDA =
56+
IOMUXC_SW_MUX_CTL_PAD_I2C1_SDA_MUX_MODE(0) |
57+
IOMUXC_SW_MUX_CTL_PAD_I2C1_SDA_SION_MASK;
58+
59+
IOMUXC_I2C1_SCL_SELECT_INPUT = IOMUXC_I2C1_SCL_SELECT_INPUT_DAISY(1);
60+
IOMUXC_I2C1_SDA_SELECT_INPUT = IOMUXC_I2C1_SDA_SELECT_INPUT_DAISY(1);
61+
62+
IOMUXC_SW_PAD_CTL_PAD_I2C1_SCL =
63+
IOMUXC_SW_PAD_CTL_PAD_I2C1_SCL_PE_MASK |
64+
IOMUXC_SW_PAD_CTL_PAD_I2C1_SCL_PS(3) |
65+
IOMUXC_SW_PAD_CTL_PAD_I2C1_SCL_DSE(0) |
66+
IOMUXC_SW_PAD_CTL_PAD_I2C1_SCL_HYS_MASK;
67+
68+
IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA =
69+
IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA_PE_MASK |
70+
IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA_PS(3) |
71+
IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA_DSE(0) |
72+
IOMUXC_SW_PAD_CTL_PAD_I2C1_SDA_HYS_MASK;
73+
#endif /* CONFIG_I2C_1 */
74+
75+
#ifdef CONFIG_I2C_2
76+
IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL =
77+
IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_MUX_MODE(0) |
78+
IOMUXC_SW_MUX_CTL_PAD_I2C2_SCL_SION_MASK;
79+
IOMUXC_SW_MUX_CTL_PAD_I2C2_SDA =
80+
IOMUXC_SW_MUX_CTL_PAD_I2C2_SDA_MUX_MODE(0) |
81+
IOMUXC_SW_MUX_CTL_PAD_I2C2_SDA_SION_MASK;
82+
83+
IOMUXC_I2C2_SCL_SELECT_INPUT = IOMUXC_I2C2_SCL_SELECT_INPUT_DAISY(1);
84+
IOMUXC_I2C2_SDA_SELECT_INPUT = IOMUXC_I2C2_SDA_SELECT_INPUT_DAISY(1);
85+
86+
IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL =
87+
IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_PE_MASK |
88+
IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_PS(3) |
89+
IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_DSE(0) |
90+
IOMUXC_SW_PAD_CTL_PAD_I2C2_SCL_HYS_MASK;
91+
92+
IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA =
93+
IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_PE_MASK |
94+
IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_PS(3) |
95+
IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_DSE(0) |
96+
IOMUXC_SW_PAD_CTL_PAD_I2C2_SDA_HYS_MASK;
97+
#endif /* CONFIG_I2C_2 */
98+
99+
#ifdef CONFIG_I2C_3
100+
IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL =
101+
IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_MUX_MODE(0) |
102+
IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL_SION_MASK;
103+
IOMUXC_SW_MUX_CTL_PAD_I2C3_SDA =
104+
IOMUXC_SW_MUX_CTL_PAD_I2C3_SDA_MUX_MODE(0) |
105+
IOMUXC_SW_MUX_CTL_PAD_I2C3_SDA_SION_MASK;
106+
107+
IOMUXC_I2C3_SCL_SELECT_INPUT = IOMUXC_I2C3_SCL_SELECT_INPUT_DAISY(2);
108+
IOMUXC_I2C3_SDA_SELECT_INPUT = IOMUXC_I2C3_SDA_SELECT_INPUT_DAISY(2);
109+
110+
IOMUXC_SW_PAD_CTL_PAD_I2C3_SCL =
111+
IOMUXC_SW_PAD_CTL_PAD_I2C3_SCL_PE_MASK |
112+
IOMUXC_SW_PAD_CTL_PAD_I2C3_SCL_PS(3) |
113+
IOMUXC_SW_PAD_CTL_PAD_I2C3_SCL_DSE(0) |
114+
IOMUXC_SW_PAD_CTL_PAD_I2C3_SCL_HYS_MASK;
115+
116+
IOMUXC_SW_PAD_CTL_PAD_I2C3_SDA =
117+
IOMUXC_SW_PAD_CTL_PAD_I2C3_SDA_PE_MASK |
118+
IOMUXC_SW_PAD_CTL_PAD_I2C3_SDA_PS(3) |
119+
IOMUXC_SW_PAD_CTL_PAD_I2C3_SDA_DSE(0) |
120+
IOMUXC_SW_PAD_CTL_PAD_I2C3_SDA_HYS_MASK;
121+
#endif /* CONFIG_I2C_3 */
122+
123+
#ifdef CONFIG_I2C_4
124+
IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD2 =
125+
IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD2_MUX_MODE(3) |
126+
IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD2_SION_MASK;
127+
IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD3 =
128+
IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD3_MUX_MODE(3) |
129+
IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_TD3_SION_MASK;
130+
131+
IOMUXC_I2C4_SCL_SELECT_INPUT = IOMUXC_I2C4_SCL_SELECT_INPUT_DAISY(4);
132+
IOMUXC_I2C4_SDA_SELECT_INPUT = IOMUXC_I2C4_SDA_SELECT_INPUT_DAISY(4);
133+
134+
IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD2 =
135+
IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD2_PE_MASK |
136+
IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD2_PS(1) |
137+
IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD2_DSE(0) |
138+
IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD2_HYS_MASK;
139+
140+
IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD3 =
141+
IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD3_PE_MASK |
142+
IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD3_PS(1) |
143+
IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD3_DSE(0) |
144+
IOMUXC_SW_PAD_CTL_PAD_ENET1_RGMII_TD3_HYS_MASK;
145+
#endif /* CONFIG_I2C_4 */
146+
51147
return 0;
52148

53149
}

0 commit comments

Comments
 (0)