samples: sdhc: add SDIO CMD52 read/write sample.

The sample performs the following:
- Initializes the SDIO interface.
- Reads a register using CMD52.
- Writes a value using CMD52.
- Verifies the write by reading back the reg.

Signed-off-by: Sara Touqan <[email protected]>

Author: ExaltZephyr

samples/drivers/sdhc/index.rst

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+.. zephyr:code-sample-category:: sdhc
+   :name:  Secure Digital Host Controller (SDHC)
+   :show-listing:
+
+   These samples demonstrate how to use the :ref:`sdhc` driver API.

samples/drivers/sdhc/sdhc_read_write/CMakeLists.txt

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+# SPDX-License-Identifier: Apache-2.0
+
+cmake_minimum_required(VERSION 3.20.0)
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(sdhc_read_write)
+
+FILE(GLOB app_sources src/*.c)
+target_sources(app PRIVATE ${app_sources})

samples/drivers/sdhc/sdhc_read_write/README.rst

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+SDHC CMD52 Read/Write Sample
+============================
+
+Overview
+--------
+
+This sample demonstrates how to use the SDIO CMD52 (direct) command to read from and write to SDIO registers using the Zephyr SDHC API.
+
+The sample performs the following:
+- Initializes the SDIO interface
+- Reads a register using CMD52
+- Writes a value using CMD52
+- Verifies the write by reading back and checking the result
+
+Requirements
+------------
+
+- A board with SDIO host (SDMMC) support.
+- A connected SDIO device (e.g., Wi-Fi module)
+- Proper DTS configuration enabling SDMMC
+
+Building and Running
+--------------------
+
+1. Navigate to the sample directory:
+
+      cd zephyr/samples/drivers/sdhc/sdhc_read_write
+
+2. Build the sample for your board:
+
+      west build -b <your_board> .
+
+3. Flash and run:
+
+      west flash
+
+Sample output
+--------------------
+Connect to the console output to observe CMD52 results.
+When the sample runs successfully, you should see output similar to the following:
+
+      I: SDIO Init Passed Successfully.
+      *** Booting Zephyr OS build v4.1.0-2351-ge261a86d79de ***
+      I: CMD52 READ passed: data = 0x40
+      I: CMD52 WRITE passed: wrote 0x01
+      I: read data after write was as expected, data = 0x41

samples/drivers/sdhc/sdhc_read_write/boards/arduino_portenta_h7_stm32h747xx_m7_1_0_0.overlay

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+sdhc: &sdmmc1 {
+	compatible = "st,stm32-sdhc";
+	hw-flow-control;
+	bus-width=<4>;
+	pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
+			&sdmmc1_d2_pc10 &sdmmc1_d3_pc11
+			&sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
+	pinctrl-names = "default";
+	status= "okay";
+	sdhi-on-gpios = <&gpioj 1 GPIO_ACTIVE_HIGH>;
+};

samples/drivers/sdhc/sdhc_read_write/prj.conf

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+CONFIG_LOG=y
+CONFIG_LOG_DEFAULT_LEVEL=3
+CONFIG_LOG_MODE_MINIMAL=y
+CONFIG_SDHC=y
+CONFIG_SDIO_STACK=y

samples/drivers/sdhc/sdhc_read_write/src/main.c

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+/*
+ * Copyright (c) 2025 EXALT Technologies.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <string.h>
+#include <stdio.h>
+#include <assert.h>
+#include <zephyr/kernel.h>
+#include <zephyr/device.h>
+#include <zephyr/sys/util.h>
+#include <zephyr/logging/log.h>
+#include <zephyr/drivers/sdhc.h>
+
+LOG_MODULE_REGISTER(sdio_sample, LOG_LEVEL_INF);
+
+int cmd52_read(const struct device *dev, struct sdhc_command *cmd, enum sdio_func_num func,
+	       uint32_t reg_addr)
+{
+	cmd->opcode = SDIO_RW_DIRECT;
+	cmd->arg = (func << SDIO_CMD_ARG_FUNC_NUM_SHIFT) |
+		   ((reg_addr & SDIO_CMD_ARG_REG_ADDR_MASK) << SDIO_CMD_ARG_REG_ADDR_SHIFT);
+	cmd->response_type = (SD_RSP_TYPE_R5);
+	cmd->timeout_ms = CONFIG_SD_CMD_TIMEOUT;
+	return sdhc_request(dev, cmd, NULL);
+}
+
+int cmd52_write(const struct device *dev, struct sdhc_command *cmd, enum sdio_func_num func,
+		uint32_t reg_addr, uint8_t data_in)
+{
+	cmd->opcode = SDIO_RW_DIRECT;
+	cmd->arg = (func << SDIO_CMD_ARG_FUNC_NUM_SHIFT) |
+		   ((reg_addr & SDIO_CMD_ARG_REG_ADDR_MASK) << SDIO_CMD_ARG_REG_ADDR_SHIFT);
+	cmd->arg |= data_in & SDIO_DIRECT_CMD_DATA_MASK;
+	cmd->arg |= BIT(SDIO_CMD_ARG_RW_SHIFT);
+	if (data_in) {
+		cmd->arg |= BIT(SDIO_DIRECT_CMD_ARG_RAW_SHIFT);
+	}
+	cmd->response_type = (SD_RSP_TYPE_R5);
+	cmd->timeout_ms = CONFIG_SD_CMD_TIMEOUT;
+	return sdhc_request(dev, cmd, NULL);
+}
+
+int main(void)
+{
+	int res;
+	uint8_t data = 1;
+	uint8_t original_data = 0, read_data = 0, expected = 0;
+	struct sdhc_command cmd = {0};
+	enum sdio_func_num func_num = SDIO_FUNC_NUM_0;
+
+	const struct device *sdmmc_dev = DEVICE_DT_GET(DT_NODELABEL(sdmmc1));
+
+	if (!device_is_ready(sdmmc_dev)) {
+		LOG_ERR("sdhc dev is not ready!\n");
+		return -1;
+	}
+
+	res = cmd52_read(sdmmc_dev, &cmd, func_num, SDIO_CCCR_BUS_IF);
+	if (res == 0) {
+		original_data = cmd.response[0U];
+		LOG_INF("CMD52 READ passed: data = 0x%02X", cmd.response[0U]);
+	} else {
+		LOG_ERR("CMD52 READ failed");
+	}
+
+	k_msleep(100);
+	res = cmd52_write(sdmmc_dev, &cmd, func_num, SDIO_CCCR_BUS_IF, data);
+	if (res == 0) {
+		LOG_INF("CMD52 WRITE passed: wrote 0x%02X", data);
+	} else {
+		LOG_ERR("CMD52 WRITE failed for data 0x%02X", data);
+	}
+
+	k_msleep(100);
+	res = cmd52_read(sdmmc_dev, &cmd, func_num, SDIO_CCCR_BUS_IF);
+	if (res == 0) {
+		expected = original_data | data;
+		read_data = cmd.response[0U];
+		if (read_data == expected) {
+			LOG_INF("read data after write was as expected, data = 0x%02X", read_data);
+		} else {
+			LOG_ERR("read data was not as expected, expected 0x%02X, got 0x%02X",
+				expected, read_data);
+		}
+	} else {
+		LOG_ERR("CMD52 READ (post-write) failed");
+	}
+
+	return 0;
+}