drivers: misc bflb updates

mostly makes things a little bit safer

Signed-off-by: Camille BAUD <[email protected]>

Author: VynDragon

drivers/clock_control/clock_control_bl60x.c

@@ -91,7 +91,7 @@ const static uint32_t clock_control_bl60x_crystal_SDMIN_table[5] = {
 
 static inline void clock_control_bl60x_clock_settle(void)
 {
-	__asm__ volatile(".rept 15 ; nop ; .endr");
+	__asm__ volatile(".rept 20 ; nop ; .endr");
 }
 
 /* 32 Mhz Oscillator: 0
@@ -848,6 +848,8 @@ static int clock_control_bl60x_init(const struct device *dev)
 
 	clock_control_bl60x_peripheral_clock_init();
 
+	clock_control_bl60x_clock_settle();
+
 	irq_unlock(key);
 
 	return 0;

drivers/syscon/syscon_bflb_efuse.c

@@ -29,7 +29,7 @@ struct efuse_bflb_config {
 
 static inline void efuse_bflb_clock_settle(void)
 {
-	__asm__ volatile (".rept 15 ; nop ; .endr");
+	__asm__ volatile (".rept 20 ; nop ; .endr");
 }
 
 /* 32 Mhz Oscillator: 0
@@ -173,6 +173,9 @@ static void efuse_bflb_cache(const struct device *dev)
 	const struct efuse_bflb_config *config = dev->config;
 	uint32_t tmp;
 	uint8_t old_clock_root;
+	uint32_t key;
+
+	key = irq_lock();
 
 	tmp = sys_read32(HBN_BASE + HBN_GLB_OFFSET);
 	old_clock_root = (tmp & HBN_ROOT_CLK_SEL_MSK) >> HBN_ROOT_CLK_SEL_POS;
@@ -193,6 +196,8 @@ static void efuse_bflb_cache(const struct device *dev)
 	efuse_bflb_set_root_clock(old_clock_root);
 	efuse_bflb_clock_settle();
 	data->cached = true;
+
+	irq_unlock(key);
 }
 
 static int efuse_bflb_read(const struct device *dev, uint16_t reg, uint32_t *val)