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boards: arm: Add support for Nucleo L432KC
Add configuration, dts and documentation for the Nucleo L432KC board based on the STM32L432KC SoC. Signed-off-by: Neil Armstrong <[email protected]>
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# Kconfig - STM32L432KC Nucleo board configuration
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#
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# Copyright (c) 2016 Open-RnD Sp. z o.o.
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# Copyright (c) 2016 BayLibre, SAS
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config BOARD_NUCLEO_L432KC
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bool "Nucleo L432KC Development Board"
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depends on SOC_STM32L432XX
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# Kconfig - STM32L432KC Nucleo board configuration
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#
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# Copyright (c) 2016 Open-RnD Sp. z o.o.
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# Copyright (c) 2016 BayLibre, SAS
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if BOARD_NUCLEO_L432KC
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config BOARD
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default nucleo_l432kc
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endif # BOARD_NUCLEO_L432KC

boards/arm/nucleo_l432kc/Makefile

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# No C files (yet)
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obj- += dummy.o

boards/arm/nucleo_l432kc/board.h

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/*
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* Copyright (c) 2015 Intel Corporation
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* Copyright (c) 2017 Linaro Limited.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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/* LD3 green LED */
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#define LD3_GPIO_PORT "GPIOB"
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#define LD3_GPIO_PIN 3
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/* Create aliases to make the basic samples work */
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#define LED0_GPIO_PORT LD3_GPIO_PORT
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#define LED0_GPIO_PIN LD3_GPIO_PIN
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#endif /* __INC_BOARD_H */
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.. _nucleo_l432kc_board:
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ST Nucleo L432KC
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################
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Overview
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********
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The Nucleo L432KC board features an ARM Cortex-M4 based STM32L432KC MCU
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with a wide range of connectivity support and configurations. Here are
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some highlights of the Nucleo L432KC board:
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- STM32 microcontroller in UFQFPN32 package
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- Arduino Uno V3 connectivity
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- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
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- Flexible board power supply:
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- USB VBUS or external source(3.3V, 5V, 7 - 12V)
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- Power management access point
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- Three LEDs: USB communication (LD1), user LED (LD2), power LED (LD3)
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- One push-button: RESET
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.. image:: img/nucleo32_ulp_logo.jpg
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:width: 250px
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:align: center
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:height: 188px
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:alt: Nucleo L432KC
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More information about the board can be found at the `Nucleo L432KC website`_.
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Hardware
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********
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The STM32L432KC SoC provides the following hardware IPs:
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- Ultra-low-power with FlexPowerControl (down to 28 nA Standby mode and 84 μA/MHz run mode)
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- Core: ARM® 32-bit Cortex®-M4 CPU with FPU, frequency up to 80 MHz, 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1)
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- Clock Sources:
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- 32 kHz crystal oscillator for RTC (LSE)
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- Internal 16 MHz factory-trimmed RC (±1%)
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- Internal low-power 32 kHz RC (±5%)
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- Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by LSE (better than ±0.25 % accuracy)
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- 2 PLLs for system clock, USB, audio, ADC
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- RTC with HW calendar, alarms and calibration
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- Up to 3 capacitive sensing channels: support touchkey, linear and rotary touch sensors
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- 11x timers:
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- 1x 16-bit advanced motor-control
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- 1x 32-bit and 2x 16-bit general purpose
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- 2x 16-bit basic
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- 2x low-power 16-bit timers (available in Stop mode)
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- 2x watchdogs
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- SysTick timer
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- Up to 26 fast I/Os, most 5 V-tolerant
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- Memories
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- Up to 256 KB single bank Flash, proprietary code readout protection
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- Up to 64 KB of SRAM including 16 KB with hardware parity check
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- Quad SPI memory interface
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- Rich analog peripherals (independent supply)
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- 1× 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 μA/MSPS
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- 2x 12-bit DAC, low-power sample and hold
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- 1x operational amplifiers with built-in PGA
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- 2x ultra-low-power comparators
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- 13x communication interfaces
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- USB OTG 2.0 full-speed crystal less solution with LPM and BCD
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- 1x SAIs (serial audio interface)
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- 2x I2C FM+(1 Mbit/s), SMBus/PMBus
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- 3x USARTs (ISO 7816, LIN, IrDA, modem)
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- 2x SPIs (3x SPIs with the Quad SPI)
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- CAN (2.0B Active)
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- SWPMI single wire protocol master I/F
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- IRTIM (Infrared interface)
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- 14-channel DMA controller
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- True random number generator
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- CRC calculation unit, 96-bit unique ID
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- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell™
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More information about STM32L432KC can be found here:
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- `STM32L432KC on www.st.com`_
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- `STM32L432 reference manual`_
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Supported Features
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==================
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The Zephyr nucleo_l432kc board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| PWM | on-chip | pwm |
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+-----------+------------+-------------------------------------+
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Other hardware features are not yet supported on this Zephyr port.
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The default configuration can be found in the defconfig file:
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``boards/arm/nucleo_l432kc/nucleo_l432kc_defconfig``
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Connections and IOs
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===================
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Nucleo L432KC Board has 6 GPIO controllers. These controllers are responsible for pin muxing,
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input/output, pull-up, etc.
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Available pins:
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---------------
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.. image:: img/nucleo_l432kc_arduino_nano.png
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:width: 960px
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:align: center
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:height: 720px
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:alt: Nucleo L432KC Arduino connectors
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For mode details please refer to `STM32 Nucleo-32 board User Manual`_.
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Default Zephyr Peripheral Mapping:
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----------------------------------
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- UART_1_TX : PA9
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- UART_1_RX : PA10
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- UART_2_TX : PA2
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- UART_2_RX : PA3
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- I2C_1_SCL : PB6
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- I2C_1_SDA : PB7
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- PWM_2_CH1 : PA0
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- LD3 : PB3
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System Clock
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------------
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Nucleo L432KC System Clock could be driven by internal or external oscillator,
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as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz,
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driven by 16MHz high speed internal oscillator.
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Serial Port
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-----------
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Nucleo L432KC board has 3 U(S)ARTs. The Zephyr console output is assigned to UART2.
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Default settings are 115200 8N1.
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Programming and Debugging
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*************************
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Flashing
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========
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Nucleo L432KC board includes an ST-LINK/V2-1 embedded debug tool interface.
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This interface is not supported by the openocd version 0.9 included by the Zephyr SDK v0.9.
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Until we update the Zephyr SDK, use openocd v0.10.0 from the openocd-stm32 project on GitHub
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to get the minimum set of scripts needed to flash and debug STM32 development boards.
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.. code-block:: console
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$ git clone https://github.com/erwango/openocd-stm32.git
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Then follow instructions in README.md
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Flashing an application to Nucleo L432KC
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----------------------------------------
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The sample application :ref:`hello_world` is being used in this tutorial:
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To build the Zephyr kernel and application, enter:
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.. code-block:: console
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$ cd <zephyr_root_path>
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$ source zephyr-env.sh
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$ cd $ZEPHYR_BASE/samples/hello_world/
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$ make BOARD=nucleo_l432kc
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Connect the Nucleo L432KC to your host computer using the USB port.
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Then, enter the following command:
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.. code-block:: console
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$ cd <openocd-stm32_path>
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$ stm32_flsh l4 $ZEPHYR_BASE/samples/hello_world/outdir/nucleo_l432kc/zephyr.bin
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Run a serial host program to connect with your Nucleo board.
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.. code-block:: console
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$ minicom -D /dev/ttyACM0
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You should see the following message:
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.. code-block:: console
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$ Hello World! arm
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Debugging
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=========
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Access gdb with the following make command:
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.. code-block:: console
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$ cd <openocd-stm32_path>
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$ stm32_dbg l4 $ZEPHYR_BASE/samples/hello_world/outdir/nucleo_l432kc/zephyr.elf
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.. _Nucleo L432KC website:
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http://www.st.com/en/evaluation-tools/nucleo-l432kc.html
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.. _STM32 Nucleo-32 board User Manual:
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http://www.st.com/resource/en/user_manual/dm00231744.pdf
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.. _STM32L432KC on www.st.com:
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http://www.st.com/en/microcontrollers/stm32l432kc.html
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.. _STM32L432 reference manual:
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http://www.st.com/resource/en/reference_manual/dm00151940.pdf
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CONFIG_ARM=y
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CONFIG_BOARD_STM32_NUCLEO_L432KC=y
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CONFIG_SOC_FAMILY_STM32=y
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CONFIG_SOC_SERIES_STM32L4X=y
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CONFIG_SOC_STM32L432XX=y
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CONFIG_CORTEX_M_SYSTICK=y
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# 80MHz system clock
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000
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# enable uart driver
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CONFIG_SERIAL=y
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CONFIG_UART_STM32=y
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CONFIG_UART_STM32_PORT_2=y
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# enable pinmux
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CONFIG_PINMUX=y
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CONFIG_PINMUX_STM32=y
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# enable GPIOs
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CONFIG_GPIO=y
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CONFIG_GPIO_STM32=y
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CONFIG_GPIO_STM32_PORTA=y
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CONFIG_GPIO_STM32_PORTB=y
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CONFIG_GPIO_STM32_PORTC=y
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CONFIG_GPIO_STM32_PORTH=y
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# clock configuration
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CONFIG_CLOCK_CONTROL=y
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CONFIG_CLOCK_CONTROL_STM32_CUBE=y
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# SYSCLK selection
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# PLL configuration
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CONFIG_CLOCK_STM32_PLL_SRC_HSI
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# produce 80MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=20
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=7
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
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CONFIG_CLOCK_STM32_PLL_R_DIVISOR=4
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=1
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CONFIG_CLOCK_STM32_APB2_PRESCALER=1
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# console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
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#enable pwm
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CONFIG_PWM=y
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CONFIG_PWM_STM32=y
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CONFIG_PWM_STM32_2=y
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#enable DTS
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CONFIG_HAS_DTS=y

dts/arm/Makefile

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dtb-$(CONFIG_BOARD_CC3200_LAUNCHXL) = cc3200_launchxl.dts_compiled
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dtb-$(CONFIG_BOARD_CC3220SF_LAUNCHXL) = cc3220sf_launchxl.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_L476RG) = nucleo_l476rg.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_L432KC) = nucleo_l432kc.dts_compiled
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dtb-$(CONFIG_BOARD_V2M_BEETLE) = v2m_beetle.dts_compiled
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dtb-$(CONFIG_BOARD_OLIMEXINO_STM32) = olimexino_stm32.dts_compiled
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dtb-$(CONFIG_BOARD_96B_CARBON) = 96b_carbon.dts_compiled

dts/arm/nucleo_l432kc.dts

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/*
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* Copyright (c) 2017 Linaro Limited
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/stm32l432.dtsi>
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/ {
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model = "STMicroelectronics STM32L432KC-NUCLEO board";
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compatible = "st,stm32l432kc-nucleo", "st,stm32l432";
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chosen {
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zephyr,console = &usart2;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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};
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&usart2 {
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current-speed = <115200>;
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status = "ok";
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};

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