From b6f057ad48420dde2181cb07b76715f815cc628f Mon Sep 17 00:00:00 2001 From: Ashish Trivedi Date: Fri, 11 Oct 2024 14:52:01 -0700 Subject: [PATCH 1/3] @FIR-204: Fix NVME changes and pushed into a repo These changes are based off of what works in Meera's repo --- arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts | 7 +++++-- .../boot/dts/intel/socfpga_agilex_pcie_root_port.dtsi | 1 + arch/arm64/configs/defconfig | 6 ++++++ drivers/nvme/host/core.c | 4 +++- drivers/nvme/host/pci.c | 4 ++++ drivers/pci/controller/pcie-altera.c | 4 ++++ 6 files changed, 23 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts index 6e06d5491f388..c221d31f2eb13 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts @@ -181,8 +181,11 @@ }; }; -/*&pcie_0_pcie_aglx { +&pcie_0_pcie_aglx { status = "okay"; compatible = "altr,pcie-root-port-3.0-f-tile"; -};*/ + /* interrupts = <0 0 0>; */ +/* interrupts = <32 IRQ_TYPE_LEVEL_HIGH>; + interupt_parent = <&intc>; */ +}; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_pcie_root_port.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex_pcie_root_port.dtsi index d8ed797d08bb6..5ffcef255b5c4 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_pcie_root_port.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_pcie_root_port.dtsi @@ -27,6 +27,7 @@ interrupt-controller; #interrupt-cells = <0x1>; device_type = "pci"; + max-link-speed = <2>; /* MM addded */ bus-range = <0x0000000 0x000000ff>; ranges = <0x82000000 0x00000000 0x00100000 0x00000000 0x10000000 0x00000000 0x0ff00000>; msi-parent = <&pcie_0_msi_irq>; diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index c6da56166e359..b7c8611c38756 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1598,3 +1598,9 @@ CONFIG_MEMTEST=y CONFIG_STRICT_DEVMEM=n CONFIG_IO_STRICT_DEVMEM=n CONFIG_HUGETLB_PAGE=y +##MM includes +CONFIG_BLK_DEV_NVME=y +CONFIG_NVME_MULTIPATH=y +CONFIG_NVME_VERBOSE_ERRORS=y +#CONFIG_NVME_HWMON=y +#CONFIG_NVME_FC=y diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c index d4564a2517eb5..0bb5e6ac81ea7 100644 --- a/drivers/nvme/host/core.c +++ b/drivers/nvme/host/core.c @@ -2317,10 +2317,12 @@ int nvme_enable_ctrl(struct nvme_ctrl *ctrl) ctrl->ctrl_config |= NVME_CC_ENABLE; ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); + dev_info(ctrl->device, "MM: PATCH nvme_wait_ready now wait for %u,previously %u\n",(timeout + 1) * 2, (timeout + 1)/2); if (ret) return ret; return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, - (timeout + 1) / 2, "initialisation"); + (timeout + 1) * 2, "initialisation"); +/*MM : PATCH (timeout + 1) / 2, "initialisation"); */ } EXPORT_SYMBOL_GPL(nvme_enable_ctrl); diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index f8e92404a6591..de9a53328614f 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -1029,6 +1029,7 @@ static inline void nvme_handle_cqe(struct nvme_queue *nvmeq, } req = nvme_find_rq(nvme_queue_tagset(nvmeq), command_id); + pr_err("MM : In nvme_handle_cqe() : command id %hu \n", command_id); if (unlikely(!req)) { dev_warn(nvmeq->dev->ctrl.device, "invalid id %d completed on queue %d\n", @@ -2270,6 +2271,9 @@ static int nvme_setup_io_queues(struct nvme_dev *dev) dev->nr_poll_queues = poll_queues; nr_io_queues = dev->nr_allocated_queues - 1; + printk("MM: nr_io_queues - %u , dev->nr_allocated_queues %u \n", nr_io_queues, dev->nr_allocated_queues); + nr_io_queues = 4; + printk("MM: nr_io_queues - %d \n", nr_io_queues); result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues); if (result < 0) return result; diff --git a/drivers/pci/controller/pcie-altera.c b/drivers/pci/controller/pcie-altera.c index 7f1d5a92b161f..e80cf4cb9e263 100644 --- a/drivers/pci/controller/pcie-altera.c +++ b/drivers/pci/controller/pcie-altera.c @@ -761,6 +761,8 @@ static void altera_pcie_retrain(struct altera_pcie *pcie) */ altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, PCI_EXP_LNKCAP, &linkcap); + printk("MM: In pcie retrain() linkstat %hu PCIE Current Link speed %x\n",linkstat,PCI_EXP_LNKSTA_CLS); ; + if ((linkcap & PCI_EXP_LNKCAP_SLS) <= PCI_EXP_LNKCAP_SLS_2_5GB) return; @@ -1019,11 +1021,13 @@ static int altera_pcie_probe(struct platform_device *pdev) cra_writel(pcie, P2A_INT_STS_ALL, P2A_INT_STATUS); /* enable all interrupts */ cra_writel(pcie, P2A_INT_ENA_ALL, P2A_INT_ENABLE); + dev_err(dev, "MM: Comes here if ALTERA_PCIE_V1 or V2 \n"); altera_pcie_host_init(pcie); } else if (pcie->pcie_data->version == ALTERA_PCIE_V3) { writel(CFG_AER, pcie->hip_base + pcie->pcie_data->port_conf_offset + pcie->pcie_data->port_irq_enable_offset); + dev_err(dev, "MM: Comes here if ALTERA_PCIE_V3 \n"); } bridge->sysdata = pcie; From 0b1f7dcc2c66cc14104ecd546ea861ba8c0c8bc0 Mon Sep 17 00:00:00 2001 From: Ashish Trivedi Date: Fri, 11 Oct 2024 16:48:20 -0700 Subject: [PATCH 2/3] @FIR-204: Remove print debug statements before main branch push This change picks up Meera's working image and is ready for main branch The change consistent of validating Meera's SSD changes work and we are forcing the IO Queues to 4 and are applying these boot params ; bridge enable 7; md 0xffd11028 1 ; mw 0xffd11028 0x00021ffe ; mw 0xffc03204 0x000c0000; ; mw 0xffc03200 0x00000000; mw 0xffc03304 0x00000013; mw 0xffc03300 0x00000010; ; setenv bootargs " ${bootargs} nvme_core.default_ps_max_latency_us=0 pcie_aspm=off nvme_core.io_timeout=60 nvme.poll_queues=4 pci=nomsi " ; run nandfitload; run nandfitboot; --- arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts | 6 +++--- drivers/nvme/host/core.c | 1 - drivers/nvme/host/pci.c | 3 --- drivers/pci/controller/pcie-altera.c | 3 --- 4 files changed, 3 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts index c221d31f2eb13..6757577c5c425 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts @@ -181,11 +181,11 @@ }; }; -&pcie_0_pcie_aglx { +/*&pcie_0_pcie_aglx { status = "okay"; - compatible = "altr,pcie-root-port-3.0-f-tile"; + compatible = "altr,pcie-root-port-3.0-f-tile";*/ /* interrupts = <0 0 0>; */ /* interrupts = <32 IRQ_TYPE_LEVEL_HIGH>; interupt_parent = <&intc>; */ -}; +/*};*/ diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c index 0bb5e6ac81ea7..d5331eee139d6 100644 --- a/drivers/nvme/host/core.c +++ b/drivers/nvme/host/core.c @@ -2317,7 +2317,6 @@ int nvme_enable_ctrl(struct nvme_ctrl *ctrl) ctrl->ctrl_config |= NVME_CC_ENABLE; ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); - dev_info(ctrl->device, "MM: PATCH nvme_wait_ready now wait for %u,previously %u\n",(timeout + 1) * 2, (timeout + 1)/2); if (ret) return ret; return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index de9a53328614f..17fbf4e95cfb6 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -1029,7 +1029,6 @@ static inline void nvme_handle_cqe(struct nvme_queue *nvmeq, } req = nvme_find_rq(nvme_queue_tagset(nvmeq), command_id); - pr_err("MM : In nvme_handle_cqe() : command id %hu \n", command_id); if (unlikely(!req)) { dev_warn(nvmeq->dev->ctrl.device, "invalid id %d completed on queue %d\n", @@ -2271,9 +2270,7 @@ static int nvme_setup_io_queues(struct nvme_dev *dev) dev->nr_poll_queues = poll_queues; nr_io_queues = dev->nr_allocated_queues - 1; - printk("MM: nr_io_queues - %u , dev->nr_allocated_queues %u \n", nr_io_queues, dev->nr_allocated_queues); nr_io_queues = 4; - printk("MM: nr_io_queues - %d \n", nr_io_queues); result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues); if (result < 0) return result; diff --git a/drivers/pci/controller/pcie-altera.c b/drivers/pci/controller/pcie-altera.c index e80cf4cb9e263..6e433ec25502a 100644 --- a/drivers/pci/controller/pcie-altera.c +++ b/drivers/pci/controller/pcie-altera.c @@ -761,7 +761,6 @@ static void altera_pcie_retrain(struct altera_pcie *pcie) */ altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, PCI_EXP_LNKCAP, &linkcap); - printk("MM: In pcie retrain() linkstat %hu PCIE Current Link speed %x\n",linkstat,PCI_EXP_LNKSTA_CLS); ; if ((linkcap & PCI_EXP_LNKCAP_SLS) <= PCI_EXP_LNKCAP_SLS_2_5GB) return; @@ -1021,13 +1020,11 @@ static int altera_pcie_probe(struct platform_device *pdev) cra_writel(pcie, P2A_INT_STS_ALL, P2A_INT_STATUS); /* enable all interrupts */ cra_writel(pcie, P2A_INT_ENA_ALL, P2A_INT_ENABLE); - dev_err(dev, "MM: Comes here if ALTERA_PCIE_V1 or V2 \n"); altera_pcie_host_init(pcie); } else if (pcie->pcie_data->version == ALTERA_PCIE_V3) { writel(CFG_AER, pcie->hip_base + pcie->pcie_data->port_conf_offset + pcie->pcie_data->port_irq_enable_offset); - dev_err(dev, "MM: Comes here if ALTERA_PCIE_V3 \n"); } bridge->sysdata = pcie; From ee379ce2fcdcbd46ebed45219c507a167f710b2c Mon Sep 17 00:00:00 2001 From: Ashish Trivedi Date: Fri, 11 Oct 2024 16:52:36 -0700 Subject: [PATCH 3/3] @FIR-204: Added changes to remove drivers/pci/controller/pcie-altera.c --- drivers/pci/controller/pcie-altera.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci/controller/pcie-altera.c b/drivers/pci/controller/pcie-altera.c index 6e433ec25502a..7f1d5a92b161f 100644 --- a/drivers/pci/controller/pcie-altera.c +++ b/drivers/pci/controller/pcie-altera.c @@ -761,7 +761,6 @@ static void altera_pcie_retrain(struct altera_pcie *pcie) */ altera_read_cap_word(pcie, pcie->root_bus_nr, RP_DEVFN, PCI_EXP_LNKCAP, &linkcap); - if ((linkcap & PCI_EXP_LNKCAP_SLS) <= PCI_EXP_LNKCAP_SLS_2_5GB) return;