Ssd patch (#5)

* @FIR-204: Fix NVME changes and pushed into a repo
These changes are based off of what works in Meera's repo

* @FIR-204: Remove print debug statements before main branch push
This change picks up Meera's working image and is ready for main branch
The change consistent of validating Meera's SSD changes work and we are
forcing the IO Queues to 4 and are applying these boot params
; bridge enable 7; md 0xffd11028 1 ; mw 0xffd11028 0x00021ffe ; mw 0xffc03204 0x000c0000;
; mw 0xffc03200 0x00000000; mw 0xffc03304 0x00000013; mw 0xffc03300 0x00000010;
; setenv bootargs " ${bootargs} nvme_core.default_ps_max_latency_us=0 pcie_aspm=off nvme_core.io_timeout=60 nvme.poll_queues=4 pci=nomsi "
; run nandfitload; run nandfitboot;

* @FIR-204: Added changes to remove drivers/pci/controller/pcie-altera.c

---------

Co-authored-by: Ashish Trivedi <[email protected]>

Author: atrivedi-tsavoritesi

arch/arm64/boot/dts/intel/socfpga_agilex_bittware.dts

@@ -183,6 +183,9 @@
 
 /*&pcie_0_pcie_aglx {
 	status = "okay";
-	compatible = "altr,pcie-root-port-3.0-f-tile";
-};*/
+	compatible = "altr,pcie-root-port-3.0-f-tile";*/
+	/* interrupts = <0 0 0>; */
+/*	interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
+	interupt_parent = <&intc>; */
+/*};*/
 

arch/arm64/boot/dts/intel/socfpga_agilex_pcie_root_port.dtsi

@@ -27,6 +27,7 @@
 			interrupt-controller;
 			#interrupt-cells = <0x1>;
 			device_type = "pci";
+			max-link-speed = <2>; /* MM addded */
 			bus-range = <0x0000000 0x000000ff>;
 			ranges = <0x82000000 0x00000000 0x00100000 0x00000000 0x10000000 0x00000000 0x0ff00000>;
 			msi-parent = <&pcie_0_msi_irq>;

arch/arm64/configs/defconfig

@@ -1598,3 +1598,9 @@ CONFIG_MEMTEST=y
 CONFIG_STRICT_DEVMEM=n
 CONFIG_IO_STRICT_DEVMEM=n
 CONFIG_HUGETLB_PAGE=y
+##MM includes
+CONFIG_BLK_DEV_NVME=y
+CONFIG_NVME_MULTIPATH=y
+CONFIG_NVME_VERBOSE_ERRORS=y
+#CONFIG_NVME_HWMON=y
+#CONFIG_NVME_FC=y

drivers/nvme/host/core.c

@@ -2320,7 +2320,8 @@ int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
 	if (ret)
 		return ret;
 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
-			       (timeout + 1) / 2, "initialisation");
+			       (timeout + 1) * 2, "initialisation");
+/*MM : PATCH                          (timeout + 1) / 2, "initialisation"); */
 }
 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
 

drivers/nvme/host/pci.c

@@ -2270,6 +2270,7 @@ static int nvme_setup_io_queues(struct nvme_dev *dev)
 	dev->nr_poll_queues = poll_queues;
 
 	nr_io_queues = dev->nr_allocated_queues - 1;
+	nr_io_queues = 4;
 	result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues);
 	if (result < 0)
 		return result;