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Merge pull request #61815 from MillerTechnologyPeru/trunk/riscv64
[stdlib] Add RISCV64 support
2 parents 145bf5f + 62b7be4 commit 0a2b10b

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16 files changed

+35
-22
lines changed

16 files changed

+35
-22
lines changed

‎cmake/modules/SwiftConfigureSDK.cmake‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -364,7 +364,7 @@ macro(configure_sdk_unix name architectures)
364364
set(SWIFT_SDK_LINUX_ARCH_${arch}_TRIPLE "${arch}-unknown-linux-gnueabi")
365365
elseif(arch MATCHES "(armv6|armv7)")
366366
set(SWIFT_SDK_LINUX_ARCH_${arch}_TRIPLE "${arch}-unknown-linux-gnueabihf")
367-
elseif(arch MATCHES "(aarch64|i686|powerpc|powerpc64|powerpc64le|s390x|x86_64)")
367+
elseif(arch MATCHES "(aarch64|i686|powerpc|powerpc64|powerpc64le|s390x|x86_64|riscv64)")
368368
set(SWIFT_SDK_LINUX_ARCH_${arch}_TRIPLE "${arch}-unknown-linux-gnu")
369369
else()
370370
message(FATAL_ERROR "unknown arch for ${prefix}: ${arch}")

‎cmake/modules/SwiftSetIfArchBitness.cmake‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,8 @@ function(set_if_arch_bitness var_name)
2525
"${SIA_ARCH}" STREQUAL "aarch64" OR
2626
"${SIA_ARCH}" STREQUAL "powerpc64" OR
2727
"${SIA_ARCH}" STREQUAL "powerpc64le" OR
28-
"${SIA_ARCH}" STREQUAL "s390x")
28+
"${SIA_ARCH}" STREQUAL "s390x" OR
29+
"${SIA_ARCH}" STREQUAL "riscv64")
2930
set("${var_name}" "${SIA_CASE_64_BIT}" PARENT_SCOPE)
3031
else()
3132
message(FATAL_ERROR "Unknown architecture: ${SIA_ARCH}")

‎lib/Basic/LangOptions.cpp‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -76,6 +76,7 @@ static const SupportedConditionalValue SupportedConditionalCompilationArches[] =
7676
"powerpc64le",
7777
"s390x",
7878
"wasm32",
79+
"riscv64",
7980
};
8081

8182
static const SupportedConditionalValue SupportedConditionalCompilationEndianness[] = {
@@ -368,6 +369,9 @@ std::pair<bool, bool> LangOptions::setTarget(llvm::Triple triple) {
368369
case llvm::Triple::ArchType::wasm32:
369370
addPlatformConditionValue(PlatformConditionKind::Arch, "wasm32");
370371
break;
372+
case llvm::Triple::ArchType::riscv64:
373+
addPlatformConditionValue(PlatformConditionKind::Arch, "riscv64");
374+
break;
371375
default:
372376
UnsupportedArch = true;
373377
}
@@ -386,6 +390,7 @@ std::pair<bool, bool> LangOptions::setTarget(llvm::Triple triple) {
386390
case llvm::Triple::ArchType::wasm32:
387391
case llvm::Triple::ArchType::x86:
388392
case llvm::Triple::ArchType::x86_64:
393+
case llvm::Triple::ArchType::riscv64:
389394
addPlatformConditionValue(PlatformConditionKind::Endianness, "little");
390395
break;
391396
case llvm::Triple::ArchType::ppc64:

‎stdlib/public/core/AtomicInt.swift.gyb‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,7 @@ internal func _swift_stdlib_atomicCompareExchangeStrongInt(
6868
#if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32) || arch(powerpc)
6969
let (oldValue, won) = Builtin.cmpxchg_seqcst_seqcst_Int32(
7070
target._rawValue, expected.pointee._value, desired._value)
71-
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
71+
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x) || arch(riscv64)
7272
let (oldValue, won) = Builtin.cmpxchg_seqcst_seqcst_Int64(
7373
target._rawValue, expected.pointee._value, desired._value)
7474
#endif
@@ -85,7 +85,7 @@ func _swift_stdlib_atomicLoadInt(
8585
#if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32) || arch(powerpc)
8686
let value = Builtin.atomicload_seqcst_Int32(target._rawValue)
8787
return Int(value)
88-
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
88+
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x) || arch(riscv64)
8989
let value = Builtin.atomicload_seqcst_Int64(target._rawValue)
9090
return Int(value)
9191
#endif
@@ -97,7 +97,7 @@ internal func _swift_stdlib_atomicStoreInt(
9797
desired: Int) {
9898
#if arch(i386) || arch(arm) || arch(arm64_32) || arch(wasm32) || arch(powerpc)
9999
Builtin.atomicstore_seqcst_Int32(target._rawValue, desired._value)
100-
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
100+
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x) || arch(riscv64)
101101
Builtin.atomicstore_seqcst_Int64(target._rawValue, desired._value)
102102
#endif
103103
}
@@ -115,7 +115,7 @@ func _swift_stdlib_atomicFetch${operation}Int(
115115
let value = _swift_stdlib_atomicFetch${operation}Int32(
116116
object: rawTarget.assumingMemoryBound(to: Int32.self),
117117
operand: Int32(operand))
118-
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
118+
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x) || arch(riscv64)
119119
let value = _swift_stdlib_atomicFetch${operation}Int64(
120120
object: rawTarget.assumingMemoryBound(to: Int64.self),
121121
operand: Int64(operand))

‎stdlib/public/runtime/HeapObject.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -70,7 +70,7 @@ static inline bool isValidPointerForNativeRetain(const void *p) {
7070
// Check the top of the second byte instead, since Android AArch64 reserves
7171
// the top byte for its own pointer tagging since Android 11.
7272
return (intptr_t)((uintptr_t)p << 8) > 0;
73-
#elif defined(__x86_64__) || defined(__arm64__) || defined(__aarch64__) || defined(_M_ARM64) || defined(__s390x__) || (defined(__powerpc64__) && defined(__LITTLE_ENDIAN__))
73+
#elif defined(__x86_64__) || defined(__arm64__) || defined(__aarch64__) || defined(_M_ARM64) || defined(__s390x__) || (defined(__riscv) && __riscv_xlen == 64) || (defined(__powerpc64__) && defined(__LITTLE_ENDIAN__))
7474
// On these platforms, except s390x, the upper half of address space is reserved for the
7575
// kernel, so we can assume that pointer values in this range are invalid.
7676
// On s390x it is theoretically possible to have high bit set but in practice

‎stdlib/public/stubs/MathStubs.cpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -64,6 +64,7 @@ extern "C" {
6464
(defined(__linux__) && defined(__aarch64__)) || \
6565
(defined(__linux__) && defined(__powerpc64__)) || \
6666
(defined(__linux__) && defined(__s390x__)) || \
67+
(defined(__linux__) && defined(__riscv) && __riscv_xlen == 64) || \
6768
(defined(__ANDROID__) && defined(__aarch64__))
6869

6970
SWIFT_RUNTIME_STDLIB_API

‎test/ClangImporter/ctypes_parse.swift‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ func testAnonEnum() {
3939
verifyIsInt(&a)
4040
#elseif arch(i386) || arch(arm) || arch(arm64_32)
4141
verifyIsUInt64(&a)
42-
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x)
42+
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64) || arch(powerpc64le) || arch(s390x) || arch(riscv64)
4343
verifyIsUInt(&a)
4444
#endif
4545
}

‎test/Inputs/clang-importer-sdk/swift-modules/CoreFoundation.swift‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ protocol _CFObject: Hashable {}
66
public struct CGFloat {
77
#if arch(i386) || arch(arm) || arch(arm64_32)
88
public typealias UnderlyingType = Float
9-
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64le) || arch(s390x)
9+
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64le) || arch(s390x) || arch(riscv64)
1010
public typealias UnderlyingType = Double
1111
#endif
1212

‎test/Inputs/clang-importer-sdk/swift-modules/CoreGraphics.swift‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ public func == (lhs: CGPoint, rhs: CGPoint) -> Bool {
99
public struct CGFloat {
1010
#if arch(i386) || arch(arm) || arch(arm64_32) || arch(powerpc)
1111
public typealias UnderlyingType = Float
12-
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64le) || arch(s390x)
12+
#elseif arch(x86_64) || arch(arm64) || arch(powerpc64le) || arch(s390x) || arch(riscv64)
1313
public typealias UnderlyingType = Double
1414
#endif
1515

‎test/Interpreter/builtin_bridge_object.swift‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,12 @@ let OBJC_TAGGED_POINTER_BITS: UInt = 0
4343
let NATIVE_SPARE_BITS: UInt = 0x0000_0000_0000_0007
4444
let OBJC_TAGGED_POINTER_BITS: UInt = 0
4545

46+
#elseif arch(riscv64)
47+
48+
// We have no ObjC tagged pointers, and three low spare bits due to alignment.
49+
let NATIVE_SPARE_BITS: UInt = 0x0000_0000_0000_0007
50+
let OBJC_TAGGED_POINTER_BITS: UInt = 0
51+
4652
#endif
4753

4854
func bitPattern(_ x: Builtin.BridgeObject) -> UInt {

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