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mgudimmgudim
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[RISCV][NFC] Precommit a test for SLP behavior...
when the subtarget has unaligned-vector-mem feature.
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‎llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll‎

Lines changed: 135 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
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; RUN: opt -S -mtriple riscv64-unknown-linux-gnu < %s --passes=slp-vectorizer -mattr=+v | FileCheck %s
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; RUN: opt -S -mtriple riscv64-unknown-linux-gnu < %s --passes=slp-vectorizer -mattr=+v -slp-threshold=-15 | FileCheck %s --check-prefix=THR15
4+
; RUN: opt -S -mtriple riscv64-unknown-linux-gnu < %s --passes=slp-vectorizer -mattr=+v,+unaligned-vector-mem | FileCheck %s --check-prefix=UNALIGNED_VEC_MEM
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define i32 @test(ptr %pix1, ptr %pix2, i64 %idx.ext, i64 %idx.ext63, ptr %add.ptr, ptr %add.ptr64) {
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; CHECK-LABEL: define i32 @test(
@@ -271,6 +272,140 @@ define i32 @test(ptr %pix1, ptr %pix2, i64 %idx.ext, i64 %idx.ext63, ptr %add.pt
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; THR15-NEXT: [[TMP114:%.*]] = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> [[TMP113]])
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; THR15-NEXT: ret i32 [[TMP114]]
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;
275+
; UNALIGNED_VEC_MEM-LABEL: define i32 @test(
276+
; UNALIGNED_VEC_MEM-SAME: ptr [[PIX1:%.*]], ptr [[PIX2:%.*]], i64 [[IDX_EXT:%.*]], i64 [[IDX_EXT63:%.*]], ptr [[ADD_PTR:%.*]], ptr [[ADD_PTR64:%.*]]) #[[ATTR0:[0-9]+]] {
277+
; UNALIGNED_VEC_MEM-NEXT: entry:
278+
; UNALIGNED_VEC_MEM-NEXT: [[ARRAYIDX3:%.*]] = getelementptr i8, ptr [[PIX1]], i64 4
279+
; UNALIGNED_VEC_MEM-NEXT: [[ARRAYIDX5:%.*]] = getelementptr i8, ptr [[PIX2]], i64 4
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; UNALIGNED_VEC_MEM-NEXT: [[ADD_PTR3:%.*]] = getelementptr i8, ptr [[PIX1]], i64 [[IDX_EXT]]
281+
; UNALIGNED_VEC_MEM-NEXT: [[ADD_PTR644:%.*]] = getelementptr i8, ptr [[PIX2]], i64 [[IDX_EXT63]]
282+
; UNALIGNED_VEC_MEM-NEXT: [[ARRAYIDX3_1:%.*]] = getelementptr i8, ptr [[ADD_PTR3]], i64 4
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; UNALIGNED_VEC_MEM-NEXT: [[ARRAYIDX5_1:%.*]] = getelementptr i8, ptr [[ADD_PTR644]], i64 4
284+
; UNALIGNED_VEC_MEM-NEXT: [[ADD_PTR_1:%.*]] = getelementptr i8, ptr [[ADD_PTR]], i64 [[IDX_EXT]]
285+
; UNALIGNED_VEC_MEM-NEXT: [[ADD_PTR64_1:%.*]] = getelementptr i8, ptr [[ADD_PTR64]], i64 [[IDX_EXT63]]
286+
; UNALIGNED_VEC_MEM-NEXT: [[ARRAYIDX3_2:%.*]] = getelementptr i8, ptr [[ADD_PTR_1]], i64 4
287+
; UNALIGNED_VEC_MEM-NEXT: [[ARRAYIDX5_2:%.*]] = getelementptr i8, ptr [[ADD_PTR64_1]], i64 4
288+
; UNALIGNED_VEC_MEM-NEXT: [[ARRAYIDX5_3:%.*]] = getelementptr i8, ptr null, i64 4
289+
; UNALIGNED_VEC_MEM-NEXT: [[TMP0:%.*]] = load i8, ptr null, align 1
290+
; UNALIGNED_VEC_MEM-NEXT: [[TMP1:%.*]] = load i8, ptr null, align 1
291+
; UNALIGNED_VEC_MEM-NEXT: [[TMP2:%.*]] = load <4 x i8>, ptr [[PIX1]], align 1
292+
; UNALIGNED_VEC_MEM-NEXT: [[TMP3:%.*]] = zext <4 x i8> [[TMP2]] to <4 x i32>
293+
; UNALIGNED_VEC_MEM-NEXT: [[TMP4:%.*]] = load <4 x i8>, ptr [[PIX2]], align 1
294+
; UNALIGNED_VEC_MEM-NEXT: [[TMP5:%.*]] = zext <4 x i8> [[TMP4]] to <4 x i32>
295+
; UNALIGNED_VEC_MEM-NEXT: [[TMP6:%.*]] = sub <4 x i32> [[TMP3]], [[TMP5]]
296+
; UNALIGNED_VEC_MEM-NEXT: [[TMP7:%.*]] = load <4 x i8>, ptr [[ARRAYIDX3]], align 1
297+
; UNALIGNED_VEC_MEM-NEXT: [[TMP8:%.*]] = zext <4 x i8> [[TMP7]] to <4 x i32>
298+
; UNALIGNED_VEC_MEM-NEXT: [[TMP9:%.*]] = load <4 x i8>, ptr [[ARRAYIDX5]], align 1
299+
; UNALIGNED_VEC_MEM-NEXT: [[TMP10:%.*]] = zext <4 x i8> [[TMP9]] to <4 x i32>
300+
; UNALIGNED_VEC_MEM-NEXT: [[TMP11:%.*]] = sub <4 x i32> [[TMP8]], [[TMP10]]
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; UNALIGNED_VEC_MEM-NEXT: [[TMP12:%.*]] = shl <4 x i32> [[TMP11]], splat (i32 16)
302+
; UNALIGNED_VEC_MEM-NEXT: [[TMP13:%.*]] = add <4 x i32> [[TMP12]], [[TMP6]]
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; UNALIGNED_VEC_MEM-NEXT: [[TMP14:%.*]] = shufflevector <4 x i32> [[TMP13]], <4 x i32> poison, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
304+
; UNALIGNED_VEC_MEM-NEXT: [[TMP15:%.*]] = add <4 x i32> [[TMP14]], [[TMP13]]
305+
; UNALIGNED_VEC_MEM-NEXT: [[TMP16:%.*]] = sub <4 x i32> [[TMP14]], [[TMP13]]
306+
; UNALIGNED_VEC_MEM-NEXT: [[TMP17:%.*]] = shufflevector <4 x i32> [[TMP15]], <4 x i32> [[TMP16]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
307+
; UNALIGNED_VEC_MEM-NEXT: [[TMP18:%.*]] = shufflevector <4 x i32> [[TMP17]], <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
308+
; UNALIGNED_VEC_MEM-NEXT: [[TMP19:%.*]] = add <4 x i32> [[TMP17]], [[TMP18]]
309+
; UNALIGNED_VEC_MEM-NEXT: [[TMP20:%.*]] = sub <4 x i32> [[TMP17]], [[TMP18]]
310+
; UNALIGNED_VEC_MEM-NEXT: [[TMP21:%.*]] = shufflevector <4 x i32> [[TMP19]], <4 x i32> [[TMP20]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
311+
; UNALIGNED_VEC_MEM-NEXT: [[TMP22:%.*]] = load <4 x i8>, ptr [[ADD_PTR3]], align 1
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; UNALIGNED_VEC_MEM-NEXT: [[TMP23:%.*]] = zext <4 x i8> [[TMP22]] to <4 x i32>
313+
; UNALIGNED_VEC_MEM-NEXT: [[TMP24:%.*]] = load <4 x i8>, ptr [[ADD_PTR644]], align 1
314+
; UNALIGNED_VEC_MEM-NEXT: [[TMP25:%.*]] = zext <4 x i8> [[TMP24]] to <4 x i32>
315+
; UNALIGNED_VEC_MEM-NEXT: [[TMP26:%.*]] = sub <4 x i32> [[TMP23]], [[TMP25]]
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; UNALIGNED_VEC_MEM-NEXT: [[TMP27:%.*]] = load <4 x i8>, ptr [[ARRAYIDX3_1]], align 1
317+
; UNALIGNED_VEC_MEM-NEXT: [[TMP28:%.*]] = zext <4 x i8> [[TMP27]] to <4 x i32>
318+
; UNALIGNED_VEC_MEM-NEXT: [[TMP29:%.*]] = load <4 x i8>, ptr [[ARRAYIDX5_1]], align 1
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; UNALIGNED_VEC_MEM-NEXT: [[TMP30:%.*]] = zext <4 x i8> [[TMP29]] to <4 x i32>
320+
; UNALIGNED_VEC_MEM-NEXT: [[TMP31:%.*]] = sub <4 x i32> [[TMP28]], [[TMP30]]
321+
; UNALIGNED_VEC_MEM-NEXT: [[TMP32:%.*]] = shl <4 x i32> [[TMP31]], splat (i32 16)
322+
; UNALIGNED_VEC_MEM-NEXT: [[TMP33:%.*]] = add <4 x i32> [[TMP32]], [[TMP26]]
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; UNALIGNED_VEC_MEM-NEXT: [[TMP34:%.*]] = shufflevector <4 x i32> [[TMP33]], <4 x i32> poison, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
324+
; UNALIGNED_VEC_MEM-NEXT: [[TMP35:%.*]] = add <4 x i32> [[TMP34]], [[TMP33]]
325+
; UNALIGNED_VEC_MEM-NEXT: [[TMP36:%.*]] = sub <4 x i32> [[TMP34]], [[TMP33]]
326+
; UNALIGNED_VEC_MEM-NEXT: [[TMP37:%.*]] = shufflevector <4 x i32> [[TMP35]], <4 x i32> [[TMP36]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
327+
; UNALIGNED_VEC_MEM-NEXT: [[TMP38:%.*]] = shufflevector <4 x i32> [[TMP37]], <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
328+
; UNALIGNED_VEC_MEM-NEXT: [[TMP39:%.*]] = add <4 x i32> [[TMP37]], [[TMP38]]
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; UNALIGNED_VEC_MEM-NEXT: [[TMP40:%.*]] = sub <4 x i32> [[TMP37]], [[TMP38]]
330+
; UNALIGNED_VEC_MEM-NEXT: [[TMP41:%.*]] = shufflevector <4 x i32> [[TMP39]], <4 x i32> [[TMP40]], <4 x i32> <i32 4, i32 5, i32 2, i32 3>
331+
; UNALIGNED_VEC_MEM-NEXT: [[TMP42:%.*]] = load <4 x i8>, ptr [[ADD_PTR_1]], align 1
332+
; UNALIGNED_VEC_MEM-NEXT: [[TMP43:%.*]] = zext <4 x i8> [[TMP42]] to <4 x i32>
333+
; UNALIGNED_VEC_MEM-NEXT: [[TMP44:%.*]] = load <4 x i8>, ptr [[ADD_PTR64_1]], align 1
334+
; UNALIGNED_VEC_MEM-NEXT: [[TMP45:%.*]] = zext <4 x i8> [[TMP44]] to <4 x i32>
335+
; UNALIGNED_VEC_MEM-NEXT: [[TMP46:%.*]] = sub <4 x i32> [[TMP43]], [[TMP45]]
336+
; UNALIGNED_VEC_MEM-NEXT: [[TMP47:%.*]] = load <4 x i8>, ptr [[ARRAYIDX3_2]], align 1
337+
; UNALIGNED_VEC_MEM-NEXT: [[TMP48:%.*]] = zext <4 x i8> [[TMP47]] to <4 x i32>
338+
; UNALIGNED_VEC_MEM-NEXT: [[TMP49:%.*]] = load <4 x i8>, ptr [[ARRAYIDX5_2]], align 1
339+
; UNALIGNED_VEC_MEM-NEXT: [[TMP50:%.*]] = zext <4 x i8> [[TMP49]] to <4 x i32>
340+
; UNALIGNED_VEC_MEM-NEXT: [[TMP51:%.*]] = sub <4 x i32> [[TMP48]], [[TMP50]]
341+
; UNALIGNED_VEC_MEM-NEXT: [[TMP52:%.*]] = shl <4 x i32> [[TMP51]], splat (i32 16)
342+
; UNALIGNED_VEC_MEM-NEXT: [[TMP53:%.*]] = add <4 x i32> [[TMP52]], [[TMP46]]
343+
; UNALIGNED_VEC_MEM-NEXT: [[TMP54:%.*]] = shufflevector <4 x i32> [[TMP53]], <4 x i32> poison, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
344+
; UNALIGNED_VEC_MEM-NEXT: [[TMP55:%.*]] = add <4 x i32> [[TMP54]], [[TMP53]]
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; UNALIGNED_VEC_MEM-NEXT: [[TMP56:%.*]] = sub <4 x i32> [[TMP54]], [[TMP53]]
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; UNALIGNED_VEC_MEM-NEXT: [[TMP57:%.*]] = shufflevector <4 x i32> [[TMP55]], <4 x i32> [[TMP56]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
347+
; UNALIGNED_VEC_MEM-NEXT: [[TMP58:%.*]] = shufflevector <4 x i32> [[TMP57]], <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
348+
; UNALIGNED_VEC_MEM-NEXT: [[TMP59:%.*]] = add <4 x i32> [[TMP57]], [[TMP58]]
349+
; UNALIGNED_VEC_MEM-NEXT: [[TMP60:%.*]] = sub <4 x i32> [[TMP57]], [[TMP58]]
350+
; UNALIGNED_VEC_MEM-NEXT: [[TMP61:%.*]] = shufflevector <4 x i32> [[TMP59]], <4 x i32> [[TMP60]], <4 x i32> <i32 2, i32 3, i32 4, i32 5>
351+
; UNALIGNED_VEC_MEM-NEXT: [[TMP62:%.*]] = call <2 x i8> @llvm.experimental.vp.strided.load.v2i8.p0.i64(ptr align 1 null, i64 4, <2 x i1> splat (i1 true), i32 2)
352+
; UNALIGNED_VEC_MEM-NEXT: [[TMP63:%.*]] = load <4 x i8>, ptr null, align 1
353+
; UNALIGNED_VEC_MEM-NEXT: [[TMP64:%.*]] = zext <4 x i8> [[TMP63]] to <4 x i32>
354+
; UNALIGNED_VEC_MEM-NEXT: [[TMP65:%.*]] = load <4 x i8>, ptr null, align 1
355+
; UNALIGNED_VEC_MEM-NEXT: [[TMP66:%.*]] = zext <4 x i8> [[TMP65]] to <4 x i32>
356+
; UNALIGNED_VEC_MEM-NEXT: [[TMP67:%.*]] = sub <4 x i32> [[TMP64]], [[TMP66]]
357+
; UNALIGNED_VEC_MEM-NEXT: [[TMP68:%.*]] = shufflevector <4 x i32> [[TMP67]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
358+
; UNALIGNED_VEC_MEM-NEXT: [[TMP69:%.*]] = insertelement <4 x i8> poison, i8 [[TMP1]], i32 0
359+
; UNALIGNED_VEC_MEM-NEXT: [[TMP70:%.*]] = insertelement <4 x i8> [[TMP69]], i8 [[TMP0]], i32 1
360+
; UNALIGNED_VEC_MEM-NEXT: [[TMP71:%.*]] = shufflevector <2 x i8> [[TMP62]], <2 x i8> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
361+
; UNALIGNED_VEC_MEM-NEXT: [[TMP72:%.*]] = shufflevector <4 x i8> [[TMP70]], <4 x i8> [[TMP71]], <4 x i32> <i32 0, i32 1, i32 4, i32 5>
362+
; UNALIGNED_VEC_MEM-NEXT: [[TMP73:%.*]] = zext <4 x i8> [[TMP72]] to <4 x i32>
363+
; UNALIGNED_VEC_MEM-NEXT: [[TMP74:%.*]] = load <4 x i8>, ptr [[ARRAYIDX5_3]], align 1
364+
; UNALIGNED_VEC_MEM-NEXT: [[TMP75:%.*]] = zext <4 x i8> [[TMP74]] to <4 x i32>
365+
; UNALIGNED_VEC_MEM-NEXT: [[TMP76:%.*]] = shufflevector <4 x i32> [[TMP75]], <4 x i32> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
366+
; UNALIGNED_VEC_MEM-NEXT: [[TMP77:%.*]] = sub <4 x i32> [[TMP73]], [[TMP76]]
367+
; UNALIGNED_VEC_MEM-NEXT: [[TMP78:%.*]] = shl <4 x i32> [[TMP77]], splat (i32 16)
368+
; UNALIGNED_VEC_MEM-NEXT: [[TMP79:%.*]] = add <4 x i32> [[TMP78]], [[TMP68]]
369+
; UNALIGNED_VEC_MEM-NEXT: [[TMP80:%.*]] = shufflevector <4 x i32> [[TMP79]], <4 x i32> poison, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
370+
; UNALIGNED_VEC_MEM-NEXT: [[TMP81:%.*]] = add <4 x i32> [[TMP79]], [[TMP80]]
371+
; UNALIGNED_VEC_MEM-NEXT: [[TMP82:%.*]] = sub <4 x i32> [[TMP79]], [[TMP80]]
372+
; UNALIGNED_VEC_MEM-NEXT: [[TMP83:%.*]] = shufflevector <4 x i32> [[TMP81]], <4 x i32> [[TMP82]], <4 x i32> <i32 0, i32 5, i32 2, i32 7>
373+
; UNALIGNED_VEC_MEM-NEXT: [[TMP84:%.*]] = shufflevector <4 x i32> [[TMP83]], <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
374+
; UNALIGNED_VEC_MEM-NEXT: [[TMP85:%.*]] = add <4 x i32> [[TMP83]], [[TMP84]]
375+
; UNALIGNED_VEC_MEM-NEXT: [[TMP86:%.*]] = sub <4 x i32> [[TMP83]], [[TMP84]]
376+
; UNALIGNED_VEC_MEM-NEXT: [[TMP87:%.*]] = shufflevector <4 x i32> [[TMP85]], <4 x i32> [[TMP86]], <4 x i32> <i32 0, i32 1, i32 6, i32 7>
377+
; UNALIGNED_VEC_MEM-NEXT: [[TMP88:%.*]] = shufflevector <4 x i32> [[TMP41]], <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
378+
; UNALIGNED_VEC_MEM-NEXT: [[TMP89:%.*]] = shufflevector <4 x i32> [[TMP21]], <4 x i32> poison, <4 x i32> <i32 2, i32 3, i32 0, i32 1>
379+
; UNALIGNED_VEC_MEM-NEXT: [[TMP90:%.*]] = add <4 x i32> [[TMP88]], [[TMP89]]
380+
; UNALIGNED_VEC_MEM-NEXT: [[TMP91:%.*]] = sub <4 x i32> [[TMP21]], [[TMP41]]
381+
; UNALIGNED_VEC_MEM-NEXT: [[TMP92:%.*]] = shufflevector <4 x i32> [[TMP91]], <4 x i32> [[TMP90]], <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 4, i32 5, i32 6, i32 7>
382+
; UNALIGNED_VEC_MEM-NEXT: [[TMP93:%.*]] = add <4 x i32> [[TMP87]], [[TMP61]]
383+
; UNALIGNED_VEC_MEM-NEXT: [[TMP94:%.*]] = sub <4 x i32> [[TMP61]], [[TMP87]]
384+
; UNALIGNED_VEC_MEM-NEXT: [[TMP95:%.*]] = shufflevector <4 x i32> [[TMP94]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
385+
; UNALIGNED_VEC_MEM-NEXT: [[TMP96:%.*]] = shufflevector <4 x i32> [[TMP93]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
386+
; UNALIGNED_VEC_MEM-NEXT: [[TMP97:%.*]] = shufflevector <8 x i32> [[TMP95]], <8 x i32> [[TMP96]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
387+
; UNALIGNED_VEC_MEM-NEXT: [[TMP98:%.*]] = add <8 x i32> [[TMP97]], [[TMP92]]
388+
; UNALIGNED_VEC_MEM-NEXT: [[TMP99:%.*]] = sub <8 x i32> [[TMP92]], [[TMP97]]
389+
; UNALIGNED_VEC_MEM-NEXT: [[TMP100:%.*]] = shufflevector <8 x i32> [[TMP98]], <8 x i32> [[TMP99]], <16 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7, i32 12, i32 8, i32 13, i32 9, i32 14, i32 10, i32 15, i32 11>
390+
; UNALIGNED_VEC_MEM-NEXT: [[TMP101:%.*]] = shufflevector <4 x i32> [[TMP57]], <4 x i32> [[TMP64]], <16 x i32> <i32 2, i32 4, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
391+
; UNALIGNED_VEC_MEM-NEXT: [[TMP102:%.*]] = shufflevector <4 x i32> [[TMP43]], <4 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
392+
; UNALIGNED_VEC_MEM-NEXT: [[TMP103:%.*]] = shufflevector <16 x i32> [[TMP101]], <16 x i32> [[TMP102]], <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
393+
; UNALIGNED_VEC_MEM-NEXT: [[TMP104:%.*]] = shufflevector <4 x i32> [[TMP23]], <4 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
394+
; UNALIGNED_VEC_MEM-NEXT: [[TMP105:%.*]] = shufflevector <16 x i32> [[TMP103]], <16 x i32> [[TMP104]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 18, i32 poison, i32 poison, i32 poison>
395+
; UNALIGNED_VEC_MEM-NEXT: [[TMP106:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
396+
; UNALIGNED_VEC_MEM-NEXT: [[TMP107:%.*]] = shufflevector <16 x i32> [[TMP105]], <16 x i32> [[TMP106]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 16, i32 17, i32 poison, i32 poison, i32 poison, i32 poison, i32 12, i32 poison, i32 18, i32 19>
397+
; UNALIGNED_VEC_MEM-NEXT: [[TMP108:%.*]] = shufflevector <4 x i32> [[TMP37]], <4 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
398+
; UNALIGNED_VEC_MEM-NEXT: [[TMP109:%.*]] = shufflevector <16 x i32> [[TMP107]], <16 x i32> [[TMP108]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 18, i32 poison, i32 19, i32 poison, i32 12, i32 poison, i32 14, i32 15>
399+
; UNALIGNED_VEC_MEM-NEXT: [[TMP110:%.*]] = shufflevector <4 x i32> [[TMP17]], <4 x i32> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
400+
; UNALIGNED_VEC_MEM-NEXT: [[TMP111:%.*]] = shufflevector <16 x i32> [[TMP109]], <16 x i32> [[TMP110]], <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 18, i32 10, i32 19, i32 12, i32 16, i32 14, i32 15>
401+
; UNALIGNED_VEC_MEM-NEXT: [[TMP112:%.*]] = lshr <16 x i32> [[TMP111]], splat (i32 15)
402+
; UNALIGNED_VEC_MEM-NEXT: [[TMP113:%.*]] = and <16 x i32> [[TMP112]], splat (i32 65537)
403+
; UNALIGNED_VEC_MEM-NEXT: [[TMP114:%.*]] = mul <16 x i32> [[TMP113]], splat (i32 65535)
404+
; UNALIGNED_VEC_MEM-NEXT: [[TMP115:%.*]] = add <16 x i32> [[TMP114]], [[TMP100]]
405+
; UNALIGNED_VEC_MEM-NEXT: [[TMP116:%.*]] = xor <16 x i32> [[TMP115]], [[TMP111]]
406+
; UNALIGNED_VEC_MEM-NEXT: [[TMP117:%.*]] = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> [[TMP116]])
407+
; UNALIGNED_VEC_MEM-NEXT: ret i32 [[TMP117]]
408+
;
274409
entry:
275410
%0 = load i8, ptr %pix1, align 1
276411
%conv = zext i8 %0 to i32

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