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[MC] .reloc: move FirstLiteralRelocationKind check to evaluateFixup
Target shouldForceRelocation checks `FirstLiteralRelocationKind` to determine whether a relocation is forced due to the .reloc directive. We should move the code to evaluateFixup so that many targets don't need to override shouldForceRelocation.
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11 files changed

+5
-52
lines changed

11 files changed

+5
-52
lines changed

‎llvm/lib/MC/MCAssembler.cpp‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -220,9 +220,10 @@ bool MCAssembler::evaluateFixup(const MCFixup &Fixup, const MCFragment *DF,
220220
Value -= Offset;
221221
}
222222

223-
// Let the backend force a relocation if needed.
223+
// .reloc directive and the backend might force the relocation.
224224
if (IsResolved &&
225-
getBackend().shouldForceRelocation(*this, Fixup, Target, Value, STI)) {
225+
(Fixup.getKind() >= FirstLiteralRelocationKind ||
226+
getBackend().shouldForceRelocation(*this, Fixup, Target, Value, STI))) {
226227
IsResolved = false;
227228
WasForced = true;
228229
}

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp‎

Lines changed: 1 addition & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -522,10 +522,6 @@ bool AArch64AsmBackend::shouldForceRelocation(const MCAssembler &Asm,
522522
const MCValue &Target,
523523
const uint64_t,
524524
const MCSubtargetInfo *STI) {
525-
unsigned Kind = Fixup.getKind();
526-
if (Kind >= FirstLiteralRelocationKind)
527-
return true;
528-
529525
// The ADRP instruction adds some multiple of 0x1000 to the current PC &
530526
// ~0xfff. This means that the required offset to reach a symbol can vary by
531527
// up to one step depending on where the ADRP is in memory. For example:
@@ -538,10 +534,7 @@ bool AArch64AsmBackend::shouldForceRelocation(const MCAssembler &Asm,
538534
// same page as the ADRP and the instruction should encode 0x0. Assuming the
539535
// section isn't 0x1000-aligned, we therefore need to delegate this decision
540536
// to the linker -- a relocation!
541-
if (Kind == AArch64::fixup_aarch64_pcrel_adrp_imm21)
542-
return true;
543-
544-
return false;
537+
return Fixup.getTargetKind() == AArch64::fixup_aarch64_pcrel_adrp_imm21;
545538
}
546539

547540
namespace {

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp‎

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -52,9 +52,6 @@ class AMDGPUAsmBackend : public MCAsmBackend {
5252

5353
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
5454
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
55-
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
56-
const MCValue &Target, uint64_t Value,
57-
const MCSubtargetInfo *STI) override;
5855
};
5956

6057
} //End anonymous namespace
@@ -194,13 +191,6 @@ const MCFixupKindInfo &AMDGPUAsmBackend::getFixupKindInfo(
194191
return Infos[Kind - FirstTargetFixupKind];
195192
}
196193

197-
bool AMDGPUAsmBackend::shouldForceRelocation(const MCAssembler &,
198-
const MCFixup &Fixup,
199-
const MCValue &, const uint64_t,
200-
const MCSubtargetInfo *STI) {
201-
return Fixup.getKind() >= FirstLiteralRelocationKind;
202-
}
203-
204194
unsigned AMDGPUAsmBackend::getMinimumNopSize() const {
205195
return 4;
206196
}

‎llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -960,8 +960,6 @@ bool ARMAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
960960
const MCSymbolRefExpr *A = Target.getSymA();
961961
const MCSymbol *Sym = A ? &A->getSymbol() : nullptr;
962962
const unsigned FixupKind = Fixup.getKind();
963-
if (FixupKind >= FirstLiteralRelocationKind)
964-
return true;
965963
if (FixupKind == ARM::fixup_arm_thumb_bl) {
966964
assert(Sym && "How did we resolve this?");
967965

‎llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -253,8 +253,6 @@ bool LoongArchAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
253253
const MCValue &Target,
254254
const uint64_t,
255255
const MCSubtargetInfo *STI) {
256-
if (Fixup.getKind() >= FirstLiteralRelocationKind)
257-
return true;
258256
switch (Fixup.getTargetKind()) {
259257
default:
260258
return STI->hasFeature(LoongArch::FeatureRelax);

‎llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -563,8 +563,6 @@ bool MipsAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
563563
const MCValue &Target,
564564
const uint64_t,
565565
const MCSubtargetInfo *STI) {
566-
if (Fixup.getKind() >= FirstLiteralRelocationKind)
567-
return true;
568566
const unsigned FixupKind = Fixup.getKind();
569567
switch (FixupKind) {
570568
default:

‎llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -166,7 +166,7 @@ class PPCAsmBackend : public MCAsmBackend {
166166
MCFixupKind Kind = Fixup.getKind();
167167
switch ((unsigned)Kind) {
168168
default:
169-
return Kind >= FirstLiteralRelocationKind;
169+
return false;
170170
case PPC::fixup_ppc_br24:
171171
case PPC::fixup_ppc_br24abs:
172172
case PPC::fixup_ppc_br24_notoc:

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -117,8 +117,6 @@ bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
117117
const MCValue &Target,
118118
const uint64_t,
119119
const MCSubtargetInfo *STI) {
120-
if (Fixup.getKind() >= FirstLiteralRelocationKind)
121-
return true;
122120
switch (Fixup.getTargetKind()) {
123121
default:
124122
break;

‎llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -275,8 +275,6 @@ namespace {
275275
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
276276
const MCValue &Target, const uint64_t,
277277
const MCSubtargetInfo *STI) override {
278-
if (Fixup.getKind() >= FirstLiteralRelocationKind)
279-
return true;
280278
switch ((Sparc::Fixups)Fixup.getKind()) {
281279
default:
282280
return false;

‎llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp‎

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -115,9 +115,6 @@ class SystemZMCAsmBackend : public MCAsmBackend {
115115
}
116116
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
117117
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
118-
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
119-
const MCValue &Target, const uint64_t Value,
120-
const MCSubtargetInfo *STI) override;
121118
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
122119
const MCValue &Target, MutableArrayRef<char> Data,
123120
uint64_t Value, bool IsResolved,
@@ -159,13 +156,6 @@ SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
159156
return SystemZ::MCFixupKindInfos[Kind - FirstTargetFixupKind];
160157
}
161158

162-
bool SystemZMCAsmBackend::shouldForceRelocation(const MCAssembler &,
163-
const MCFixup &Fixup,
164-
const MCValue &, const uint64_t,
165-
const MCSubtargetInfo *STI) {
166-
return Fixup.getKind() >= FirstLiteralRelocationKind;
167-
}
168-
169159
void SystemZMCAsmBackend::applyFixup(const MCAssembler &Asm,
170160
const MCFixup &Fixup,
171161
const MCValue &Target,

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