@@ -47591,27 +47591,19 @@ static SDValue combineVSelectToBLENDV(SDNode *N, SelectionDAG &DAG,
4759147591static SDValue combineLogicBlendIntoConditionalNegate(
4759247592 EVT VT, SDValue Mask, SDValue X, SDValue Y, const SDLoc &DL,
4759347593 SelectionDAG &DAG, const X86Subtarget &Subtarget) {
47594+ using namespace SDPatternMatch;
4759447595 EVT MaskVT = Mask.getValueType();
4759547596 assert(MaskVT.isInteger() &&
4759647597 DAG.ComputeNumSignBits(Mask) == MaskVT.getScalarSizeInBits() &&
4759747598 "Mask must be zero/all-bits");
4759847599
47599- if (X.getValueType() != MaskVT || Y.getValueType() != MaskVT)
47600- return SDValue();
47601- if (!DAG.getTargetLoweringInfo().isOperationLegal(ISD::SUB, MaskVT))
47600+ if (X.getValueType() != MaskVT || Y.getValueType() != MaskVT ||
47601+ !DAG.getTargetLoweringInfo().isOperationLegal(ISD::SUB, MaskVT))
4760247602 return SDValue();
4760347603
47604- auto IsNegV = [](SDNode *N, SDValue V) {
47605- return N->getOpcode() == ISD::SUB && N->getOperand(1) == V &&
47606- ISD::isBuildVectorAllZeros(N->getOperand(0).getNode());
47607- };
47608-
4760947604 SDValue V;
47610- if (IsNegV(Y.getNode(), X))
47611- V = X;
47612- else if (IsNegV(X.getNode(), Y))
47613- V = Y;
47614- else
47605+ if (!sd_match(Y, m_Neg(m_AllOf(m_Specific(X), m_Value(V)))) &&
47606+ !sd_match(X, m_Neg(m_AllOf(m_Specific(Y), m_Value(V)))))
4761547607 return SDValue();
4761647608
4761747609 SDValue SubOp1 = DAG.getNode(ISD::XOR, DL, MaskVT, V, Mask);
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