@@ -9996,17 +9996,24 @@ static void ReplaceReductionResults(SDNode *N,
99969996 Results.push_back (SplitVal);
99979997}
99989998
9999+ static std::pair<SDValue, SDValue> splitInt128 (SDValue N, SelectionDAG &DAG) {
10000+ SDLoc DL (N);
10001+ SDValue Lo = DAG.getNode (ISD::TRUNCATE, DL, MVT::i64 , N);
10002+ SDValue Hi = DAG.getNode (ISD::TRUNCATE, DL, MVT::i64 ,
10003+ DAG.getNode (ISD::SRL, DL, MVT::i128 , N,
10004+ DAG.getConstant (64 , DL, MVT::i64 )));
10005+ return std::make_pair (Lo, Hi);
10006+ }
10007+
999910008static void ReplaceCMP_SWAP_128Results (SDNode *N,
1000010009 SmallVectorImpl<SDValue> & Results,
1000110010 SelectionDAG &DAG) {
1000210011 assert (N->getValueType (0 ) == MVT::i128 &&
1000310012 " AtomicCmpSwap on types less than 128 should be legal" );
10004- SDValue Ops[] = {N->getOperand (1 ),
10005- N->getOperand (2 )->getOperand (0 ),
10006- N->getOperand (2 )->getOperand (1 ),
10007- N->getOperand (3 )->getOperand (0 ),
10008- N->getOperand (3 )->getOperand (1 ),
10009- N->getOperand (0 )};
10013+ auto Desired = splitInt128 (N->getOperand (2 ), DAG);
10014+ auto New = splitInt128 (N->getOperand (3 ), DAG);
10015+ SDValue Ops[] = {N->getOperand (1 ), Desired.first , Desired.second ,
10016+ New.first , New.second , N->getOperand (0 )};
1001010017 SDNode *CmpSwap = DAG.getMachineNode (
1001110018 AArch64::CMP_SWAP_128, SDLoc (N),
1001210019 DAG.getVTList (MVT::i64 , MVT::i64 , MVT::i32 , MVT::Other), Ops);
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