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Added system clock config
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variants/STM32F4xx/F413V(G-H)T_F423VHT/generic_clock.c

Lines changed: 43 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,8 +21,49 @@
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*/
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WEAK void SystemClock_Config(void)
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{
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/* SystemClock_Config can be generated by STM32CubeMX */
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#warning "SystemClock_Config() is empty. Default clock at reset is used."
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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// Configure the main internal regulator output voltage
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__HAL_RCC_PWR_CLK_ENABLE();
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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// Initialize the RCC Oscillators according to the specified parameters
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// Using HSI (16 MHz internal oscillator)
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
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// PLL Configuration for 96 MHz system clock and 48 MHz USB clock
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// HSI = 16 MHz
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// VCO = (16 MHz / PLLM) * PLLN = (16 / 8) * 192 = 384 MHz
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// SYSCLK = VCO / PLLP = 384 / 4 = 96 MHz
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// USB Clock = VCO / PLLQ = 384 / 8 = 48 MHz (required for USB)
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RCC_OscInitStruct.PLL.PLLM = 8;
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RCC_OscInitStruct.PLL.PLLN = 192;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
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RCC_OscInitStruct.PLL.PLLQ = 8;
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RCC_OscInitStruct.PLL.PLLR = 2;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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Error_Handler();
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}
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// Initialize the CPU, AHB and APB buses clocks
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 96 MHz
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 48 MHz (max 50 MHz)
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 96 MHz (max 100 MHz)
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
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{
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Error_Handler();
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}
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}
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#endif /* ARDUINO_GENERIC_* */

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