|
21 | 21 | */ |
22 | 22 | WEAK void SystemClock_Config(void) |
23 | 23 | { |
24 | | - /* SystemClock_Config can be generated by STM32CubeMX */ |
25 | | -#warning "SystemClock_Config() is empty. Default clock at reset is used." |
| 24 | + RCC_OscInitTypeDef RCC_OscInitStruct = {}; |
| 25 | + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; |
| 26 | + |
| 27 | + // Configure the main internal regulator output voltage |
| 28 | + __HAL_RCC_PWR_CLK_ENABLE(); |
| 29 | + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); |
| 30 | + |
| 31 | + // Initialize the RCC Oscillators according to the specified parameters |
| 32 | + // Using HSI (16 MHz internal oscillator) |
| 33 | + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; |
| 34 | + RCC_OscInitStruct.HSIState = RCC_HSI_ON; |
| 35 | + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; |
| 36 | + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
| 37 | + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; |
| 38 | + |
| 39 | + // PLL Configuration for 96 MHz system clock and 48 MHz USB clock |
| 40 | + // HSI = 16 MHz |
| 41 | + // VCO = (16 MHz / PLLM) * PLLN = (16 / 8) * 192 = 384 MHz |
| 42 | + // SYSCLK = VCO / PLLP = 384 / 4 = 96 MHz |
| 43 | + // USB Clock = VCO / PLLQ = 384 / 8 = 48 MHz (required for USB) |
| 44 | + RCC_OscInitStruct.PLL.PLLM = 8; |
| 45 | + RCC_OscInitStruct.PLL.PLLN = 192; |
| 46 | + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; |
| 47 | + RCC_OscInitStruct.PLL.PLLQ = 8; |
| 48 | + RCC_OscInitStruct.PLL.PLLR = 2; |
| 49 | + |
| 50 | + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) |
| 51 | + { |
| 52 | + Error_Handler(); |
| 53 | + } |
| 54 | + |
| 55 | + // Initialize the CPU, AHB and APB buses clocks |
| 56 | + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
| 57 | + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; |
| 58 | + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
| 59 | + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 96 MHz |
| 60 | + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 48 MHz (max 50 MHz) |
| 61 | + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 96 MHz (max 100 MHz) |
| 62 | + |
| 63 | + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) |
| 64 | + { |
| 65 | + Error_Handler(); |
| 66 | + } |
26 | 67 | } |
27 | 68 |
|
28 | 69 | #endif /* ARDUINO_GENERIC_* */ |
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