From ea7aaae19ff54584217bb11ce939ceba760d711c Mon Sep 17 00:00:00 2001 From: gnzlbg Date: Fri, 9 Nov 2018 18:38:32 +0100 Subject: [PATCH 1/6] test windows on travis --- .travis.yml | 110 +++++++++++++++++++++++++++++----------------------- 1 file changed, 61 insertions(+), 49 deletions(-) diff --git a/.travis.yml b/.travis.yml index 6b21652456..c72c6a79f9 100644 --- a/.travis.yml +++ b/.travis.yml @@ -5,57 +5,69 @@ rust: nightly matrix: fast_finish: true include: - - env: TARGET=i586-unknown-linux-gnu - - env: TARGET=i686-unknown-linux-gnu - - env: TARGET=x86_64-unknown-linux-gnu NO_ADD=1 - - env: TARGET=x86_64-unknown-linux-gnu-emulated NO_ADD=1 STDSIMD_TEST_EVERYTHING=1 - - env: TARGET=x86_64-linux-android - - env: TARGET=arm-unknown-linux-gnueabihf - - env: TARGET=arm-linux-androideabi - - env: TARGET=armv7-unknown-linux-gnueabihf - - env: TARGET=aarch64-unknown-linux-gnu - - env: TARGET=mips-unknown-linux-gnu NORUN=1 - - env: TARGET=mipsel-unknown-linux-gnu NORUN=1 - - env: TARGET=mips64-unknown-linux-gnuabi64 NORUN=1 - - env: TARGET=mips64el-unknown-linux-gnuabi64 NORUN=1 - - env: TARGET=aarch64-linux-android - - env: TARGET=powerpc-unknown-linux-gnu - - env: TARGET=powerpc64-unknown-linux-gnu - - env: TARGET=powerpc64le-unknown-linux-gnu - - env: TARGET=s390x-unknown-linux-gnu NORUN=1 - - os: osx - env: TARGET=i686-apple-darwin + - env: TARGET=x86_64-pc-windows-msvc NO_ADD=1 + os: windows script: ci/run.sh - - os: osx - env: TARGET=x86_64-apple-darwin NO_ADD=1 + - env: TARGET=x86_64-pc-windows-gnu + os: windows script: ci/run.sh - - env: TARGET=wasm32-unknown-unknown - - env: TARGET=thumbv6m-none-eabi NOSTD=1 - - env: TARGET=thumbv7m-none-eabi NOSTD=1 - - env: TARGET=thumbv7em-none-eabi NOSTD=1 - - env: TARGET=thumbv7em-none-eabihf NOSTD=1 - - env: DOCUMENTATION - install: true - script: ci/dox.sh - - env: VERIFY_X86 - script: cargo test --manifest-path crates/stdsimd-verify/Cargo.toml - install: true - - env: RUSTFMT=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 - before_script: - - rustup component add rustfmt-preview - script: - - cargo fmt --all -- --check - - env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 - script: | - cargo install clippy - cargo clippy --all -- -D clippy-pedantic - allow_failures: - - env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 - - env: RUSTFMT=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 - -before_install: - # FIXME (travis-ci/travis-ci#8920) shouldn't be necessary... - - python -c "import fcntl; fcntl.fcntl(1, fcntl.F_SETFL, 0)" + - env: TARGET=i686-pc-windows-msvc + os: windows + script: ci/run.sh + - env: TARGET=i686-pc-windows-gnu + os: windows + script: ci/run.sh + #- env: TARGET=i586-unknown-linux-gnu + #- env: TARGET=i686-unknown-linux-gnu + #- env: TARGET=x86_64-unknown-linux-gnu NO_ADD=1 + #- env: TARGET=x86_64-unknown-linux-gnu-emulated NO_ADD=1 STDSIMD_TEST_EVERYTHING=1 + #- env: TARGET=x86_64-linux-android + #- env: TARGET=arm-unknown-linux-gnueabihf + #- env: TARGET=arm-linux-androideabi + #- env: TARGET=armv7-unknown-linux-gnueabihf + #- env: TARGET=aarch64-unknown-linux-gnu + #- env: TARGET=mips-unknown-linux-gnu NORUN=1 + #- env: TARGET=mipsel-unknown-linux-gnu NORUN=1 + #- env: TARGET=mips64-unknown-linux-gnuabi64 NORUN=1 + #- env: TARGET=mips64el-unknown-linux-gnuabi64 NORUN=1 + #- env: TARGET=aarch64-linux-android + #- env: TARGET=powerpc-unknown-linux-gnu + #- env: TARGET=powerpc64-unknown-linux-gnu + #- env: TARGET=powerpc64le-unknown-linux-gnu + #- env: TARGET=s390x-unknown-linux-gnu NORUN=1 + #- os: osx + # env: TARGET=i686-apple-darwin + # script: ci/run.sh + #- os: osx + # env: TARGET=x86_64-apple-darwin NO_ADD=1 + # script: ci/run.sh + #- env: TARGET=wasm32-unknown-unknown + #- env: TARGET=thumbv6m-none-eabi NOSTD=1 + #- env: TARGET=thumbv7m-none-eabi NOSTD=1 + #- env: TARGET=thumbv7em-none-eabi NOSTD=1 + #- env: TARGET=thumbv7em-none-eabihf NOSTD=1 + #- env: DOCUMENTATION + # install: true + # script: ci/dox.sh + #- env: VERIFY_X86 + # script: cargo test --manifest-path crates/stdsimd-verify/Cargo.toml + # install: true + #- env: RUSTFMT=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 + # before_script: + # - rustup component add rustfmt-preview + # script: + # - cargo fmt --all -- --check + #- env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 + # script: | + # cargo install clippy + # cargo clippy --all -- -D clippy-pedantic + #allow_failures: + #- env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 + #- env: RUSTFMT=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 + #- env: TARGET=x86_64-pc-windows-msvc + #- env: TARGET=x86_64-pc-windows-gnu + #- env: TARGET=i686-pc-windows-msvc + #- env: TARGET=i686-pc-windows-gnu install: - if [ "$NO_ADD" == "" ]; then rustup target add $TARGET; fi From 361c5ea6ddb262f7399cad99a9c8d70afa51c9af Mon Sep 17 00:00:00 2001 From: gnzlbg Date: Fri, 9 Nov 2018 22:00:32 +0100 Subject: [PATCH 2/6] remove register ordering from fma assert_instr --- coresimd/x86/fma.rs | 60 ++++++++++++++++++++++----------------------- 1 file changed, 30 insertions(+), 30 deletions(-) diff --git a/coresimd/x86/fma.rs b/coresimd/x86/fma.rs index 92309c0a83..f13742a6bd 100644 --- a/coresimd/x86/fma.rs +++ b/coresimd/x86/fma.rs @@ -29,7 +29,7 @@ use stdsimd_test::assert_instr; /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fmadd_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmadd213pd))] +#[cfg_attr(test, assert_instr(vfmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fmadd_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { vfmaddpd(a, b, c) @@ -41,7 +41,7 @@ pub unsafe fn _mm_fmadd_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_fmadd_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmadd213pd))] +#[cfg_attr(test, assert_instr(vfmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_fmadd_pd(a: __m256d, b: __m256d, c: __m256d) -> __m256d { vfmaddpd256(a, b, c) @@ -53,7 +53,7 @@ pub unsafe fn _mm256_fmadd_pd(a: __m256d, b: __m256d, c: __m256d) -> __m256d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fmadd_ps) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmadd213ps))] +#[cfg_attr(test, assert_instr(vfmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fmadd_ps(a: __m128, b: __m128, c: __m128) -> __m128 { vfmaddps(a, b, c) @@ -65,7 +65,7 @@ pub unsafe fn _mm_fmadd_ps(a: __m128, b: __m128, c: __m128) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_fmadd_ps) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmadd213ps))] +#[cfg_attr(test, assert_instr(vfmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_fmadd_ps(a: __m256, b: __m256, c: __m256) -> __m256 { vfmaddps256(a, b, c) @@ -79,7 +79,7 @@ pub unsafe fn _mm256_fmadd_ps(a: __m256, b: __m256, c: __m256) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fmadd_sd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmadd213sd))] +#[cfg_attr(test, assert_instr(vfmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fmadd_sd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { vfmaddsd(a, b, c) @@ -93,7 +93,7 @@ pub unsafe fn _mm_fmadd_sd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fmadd_ss) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmadd213ss))] +#[cfg_attr(test, assert_instr(vfmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fmadd_ss(a: __m128, b: __m128, c: __m128) -> __m128 { vfmaddss(a, b, c) @@ -106,7 +106,7 @@ pub unsafe fn _mm_fmadd_ss(a: __m128, b: __m128, c: __m128) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fmaddsub_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmaddsub213pd))] +#[cfg_attr(test, assert_instr(vfmaddsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fmaddsub_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { vfmaddsubpd(a, b, c) @@ -119,7 +119,7 @@ pub unsafe fn _mm_fmaddsub_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_fmaddsub_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmaddsub213pd))] +#[cfg_attr(test, assert_instr(vfmaddsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_fmaddsub_pd( a: __m256d, b: __m256d, c: __m256d, @@ -134,7 +134,7 @@ pub unsafe fn _mm256_fmaddsub_pd( /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fmaddsub_ps) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmaddsub213ps))] +#[cfg_attr(test, assert_instr(vfmaddsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fmaddsub_ps(a: __m128, b: __m128, c: __m128) -> __m128 { vfmaddsubps(a, b, c) @@ -147,7 +147,7 @@ pub unsafe fn _mm_fmaddsub_ps(a: __m128, b: __m128, c: __m128) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_fmaddsub_ps) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmaddsub213ps))] +#[cfg_attr(test, assert_instr(vfmaddsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_fmaddsub_ps(a: __m256, b: __m256, c: __m256) -> __m256 { vfmaddsubps256(a, b, c) @@ -159,7 +159,7 @@ pub unsafe fn _mm256_fmaddsub_ps(a: __m256, b: __m256, c: __m256) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fmsub_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmsub213pd))] +#[cfg_attr(test, assert_instr(vfmsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fmsub_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { vfmsubpd(a, b, c) @@ -171,7 +171,7 @@ pub unsafe fn _mm_fmsub_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_fmsub_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmsub213pd))] +#[cfg_attr(test, assert_instr(vfmsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_fmsub_pd(a: __m256d, b: __m256d, c: __m256d) -> __m256d { vfmsubpd256(a, b, c) @@ -209,7 +209,7 @@ pub unsafe fn _mm256_fmsub_ps(a: __m256, b: __m256, c: __m256) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fmsub_sd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmsub213sd))] +#[cfg_attr(test, assert_instr(vfmsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fmsub_sd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { vfmsubsd(a, b, c) @@ -223,7 +223,7 @@ pub unsafe fn _mm_fmsub_sd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fmsub_ss) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmsub213ss))] +#[cfg_attr(test, assert_instr(vfmsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fmsub_ss(a: __m128, b: __m128, c: __m128) -> __m128 { vfmsubss(a, b, c) @@ -236,7 +236,7 @@ pub unsafe fn _mm_fmsub_ss(a: __m128, b: __m128, c: __m128) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fmsubadd_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmsubadd213pd))] +#[cfg_attr(test, assert_instr(vfmsubadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fmsubadd_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { vfmsubaddpd(a, b, c) @@ -249,7 +249,7 @@ pub unsafe fn _mm_fmsubadd_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_fmsubadd_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmsubadd213pd))] +#[cfg_attr(test, assert_instr(vfmsubadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_fmsubadd_pd( a: __m256d, b: __m256d, c: __m256d, @@ -264,7 +264,7 @@ pub unsafe fn _mm256_fmsubadd_pd( /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fmsubadd_ps) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmsubadd213ps))] +#[cfg_attr(test, assert_instr(vfmsubadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fmsubadd_ps(a: __m128, b: __m128, c: __m128) -> __m128 { vfmsubaddps(a, b, c) @@ -277,7 +277,7 @@ pub unsafe fn _mm_fmsubadd_ps(a: __m128, b: __m128, c: __m128) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_fmsubadd_ps) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfmsubadd213ps))] +#[cfg_attr(test, assert_instr(vfmsubadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_fmsubadd_ps(a: __m256, b: __m256, c: __m256) -> __m256 { vfmsubaddps256(a, b, c) @@ -289,7 +289,7 @@ pub unsafe fn _mm256_fmsubadd_ps(a: __m256, b: __m256, c: __m256) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fnmadd_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmadd213pd))] +#[cfg_attr(test, assert_instr(vfnmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fnmadd_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { vfnmaddpd(a, b, c) @@ -301,7 +301,7 @@ pub unsafe fn _mm_fnmadd_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_fnmadd_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmadd213pd))] +#[cfg_attr(test, assert_instr(vfnmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_fnmadd_pd(a: __m256d, b: __m256d, c: __m256d) -> __m256d { vfnmaddpd256(a, b, c) @@ -313,7 +313,7 @@ pub unsafe fn _mm256_fnmadd_pd(a: __m256d, b: __m256d, c: __m256d) -> __m256d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fnmadd_ps) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmadd213ps))] +#[cfg_attr(test, assert_instr(vfnmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fnmadd_ps(a: __m128, b: __m128, c: __m128) -> __m128 { vfnmaddps(a, b, c) @@ -325,7 +325,7 @@ pub unsafe fn _mm_fnmadd_ps(a: __m128, b: __m128, c: __m128) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_fnmadd_ps) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmadd213ps))] +#[cfg_attr(test, assert_instr(vfnmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_fnmadd_ps(a: __m256, b: __m256, c: __m256) -> __m256 { vfnmaddps256(a, b, c) @@ -339,7 +339,7 @@ pub unsafe fn _mm256_fnmadd_ps(a: __m256, b: __m256, c: __m256) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fnmadd_sd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmadd213sd))] +#[cfg_attr(test, assert_instr(vfnmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fnmadd_sd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { vfnmaddsd(a, b, c) @@ -353,7 +353,7 @@ pub unsafe fn _mm_fnmadd_sd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fnmadd_ss) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmadd213ss))] +#[cfg_attr(test, assert_instr(vfnmadd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fnmadd_ss(a: __m128, b: __m128, c: __m128) -> __m128 { vfnmaddss(a, b, c) @@ -366,7 +366,7 @@ pub unsafe fn _mm_fnmadd_ss(a: __m128, b: __m128, c: __m128) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fnmsub_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmsub213pd))] +#[cfg_attr(test, assert_instr(vfnmsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fnmsub_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { vfnmsubpd(a, b, c) @@ -379,7 +379,7 @@ pub unsafe fn _mm_fnmsub_pd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_fnmsub_pd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmsub213pd))] +#[cfg_attr(test, assert_instr(vfnmsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_fnmsub_pd(a: __m256d, b: __m256d, c: __m256d) -> __m256d { vfnmsubpd256(a, b, c) @@ -392,7 +392,7 @@ pub unsafe fn _mm256_fnmsub_pd(a: __m256d, b: __m256d, c: __m256d) -> __m256d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fnmsub_ps) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmsub213ps))] +#[cfg_attr(test, assert_instr(vfnmsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fnmsub_ps(a: __m128, b: __m128, c: __m128) -> __m128 { vfnmsubps(a, b, c) @@ -405,7 +405,7 @@ pub unsafe fn _mm_fnmsub_ps(a: __m128, b: __m128, c: __m128) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_fnmsub_ps) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmsub213ps))] +#[cfg_attr(test, assert_instr(vfnmsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_fnmsub_ps(a: __m256, b: __m256, c: __m256) -> __m256 { vfnmsubps256(a, b, c) @@ -420,7 +420,7 @@ pub unsafe fn _mm256_fnmsub_ps(a: __m256, b: __m256, c: __m256) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fnmsub_sd) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmsub213sd))] +#[cfg_attr(test, assert_instr(vfnmsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fnmsub_sd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { vfnmsubsd(a, b, c) @@ -435,7 +435,7 @@ pub unsafe fn _mm_fnmsub_sd(a: __m128d, b: __m128d, c: __m128d) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_fnmsub_ss) #[inline] #[target_feature(enable = "fma")] -#[cfg_attr(test, assert_instr(vfnmsub213ss))] +#[cfg_attr(test, assert_instr(vfnmsub))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_fnmsub_ss(a: __m128, b: __m128, c: __m128) -> __m128 { vfnmsubss(a, b, c) From fecab7b5d48fa58b579ad47413bc4dc75b895424 Mon Sep 17 00:00:00 2001 From: gnzlbg Date: Fri, 9 Nov 2018 22:14:07 +0100 Subject: [PATCH 3/6] skip some assert_instr on windows --- coresimd/x86/avx.rs | 18 ++++++++++++------ coresimd/x86/avx2.rs | 6 ++++-- coresimd/x86/sse.rs | 10 ++++++---- coresimd/x86/sse2.rs | 16 ++++++++++------ coresimd/x86/sse41.rs | 8 ++++---- coresimd/x86_64/sse41.rs | 4 ++-- 6 files changed, 38 insertions(+), 24 deletions(-) diff --git a/coresimd/x86/avx.rs b/coresimd/x86/avx.rs index 8f5ab2b70c..6987427286 100644 --- a/coresimd/x86/avx.rs +++ b/coresimd/x86/avx.rs @@ -1078,7 +1078,8 @@ pub unsafe fn _mm256_cvttps_epi32(a: __m256) -> __m256i { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_extractf128_ps) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr(test, assert_instr(vextractf128, imm8 = 1))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(vextractf128, imm8 = 1))] #[rustc_args_required_const(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_extractf128_ps(a: __m256, imm8: i32) -> __m128 { @@ -1094,7 +1095,8 @@ pub unsafe fn _mm256_extractf128_ps(a: __m256, imm8: i32) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_extractf128_pd) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr(test, assert_instr(vextractf128, imm8 = 1))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(vextractf128, imm8 = 1))] #[rustc_args_required_const(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_extractf128_pd(a: __m256d, imm8: i32) -> __m128d { @@ -1109,7 +1111,8 @@ pub unsafe fn _mm256_extractf128_pd(a: __m256d, imm8: i32) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_extractf128_si256) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr(test, assert_instr(vextractf128, imm8 = 1))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(vextractf128, imm8 = 1))] #[rustc_args_required_const(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_extractf128_si256(a: __m256i, imm8: i32) -> __m128i { @@ -1510,7 +1513,8 @@ pub unsafe fn _mm256_broadcast_pd(a: &__m128d) -> __m256d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_insertf128_ps) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr(test, assert_instr(vinsertf128, imm8 = 1))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(vinsertf128, imm8 = 1))] #[rustc_args_required_const(2)] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_insertf128_ps(a: __m256, b: __m128, imm8: i32) -> __m256 { @@ -1528,7 +1532,8 @@ pub unsafe fn _mm256_insertf128_ps(a: __m256, b: __m128, imm8: i32) -> __m256 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_insertf128_pd) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr(test, assert_instr(vinsertf128, imm8 = 1))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(vinsertf128, imm8 = 1))] #[rustc_args_required_const(2)] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_insertf128_pd( @@ -1546,7 +1551,8 @@ pub unsafe fn _mm256_insertf128_pd( /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_insertf128_si256) #[inline] #[target_feature(enable = "avx")] -#[cfg_attr(test, assert_instr(vinsertf128, imm8 = 1))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(vinsertf128, imm8 = 1))] #[rustc_args_required_const(2)] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_insertf128_si256( diff --git a/coresimd/x86/avx2.rs b/coresimd/x86/avx2.rs index c4ead715ae..cda092c203 100644 --- a/coresimd/x86/avx2.rs +++ b/coresimd/x86/avx2.rs @@ -1030,7 +1030,8 @@ pub unsafe fn _mm256_cvtepu8_epi64(a: __m128i) -> __m256i { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_extracti128_si256) #[inline] #[target_feature(enable = "avx2")] -#[cfg_attr(test, assert_instr(vextractf128, imm8 = 1))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(vextractf128, imm8 = 1))] #[rustc_args_required_const(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_extracti128_si256(a: __m256i, imm8: i32) -> __m128i { @@ -1945,7 +1946,8 @@ pub unsafe fn _mm256_mask_i64gather_pd( /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_inserti128_si256) #[inline] #[target_feature(enable = "avx2")] -#[cfg_attr(test, assert_instr(vinsertf128, imm8 = 1))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(vinsertf128, imm8 = 1))] #[rustc_args_required_const(2)] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm256_inserti128_si256( diff --git a/coresimd/x86/sse.rs b/coresimd/x86/sse.rs index 9349bf8f73..ea37a19d5b 100644 --- a/coresimd/x86/sse.rs +++ b/coresimd/x86/sse.rs @@ -1073,7 +1073,7 @@ pub unsafe fn _mm_unpacklo_ps(a: __m128, b: __m128) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_movehl_ps) #[inline] #[target_feature(enable = "sse")] -#[cfg_attr(test, assert_instr(movhlps))] +#[cfg_attr(all(test, not(target_os = "windows")), assert_instr(movhlps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_movehl_ps(a: __m128, b: __m128) -> __m128 { // TODO; figure why this is a different instruction on Windows? @@ -1086,7 +1086,7 @@ pub unsafe fn _mm_movehl_ps(a: __m128, b: __m128) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_movelh_ps) #[inline] #[target_feature(enable = "sse")] -#[cfg_attr(test, assert_instr(movlhps))] +#[cfg_attr(all(test, not(target_os = "windows")), assert_instr(movlhps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_movelh_ps(a: __m128, b: __m128) -> __m128 { simd_shuffle4(a, b, [0, 1, 4, 5]) @@ -1347,7 +1347,8 @@ pub unsafe fn _mm_loadr_ps(p: *const f32) -> __m128 { // fine. // On i586 (no SSE2) it just generates plain MOV instructions. #[cfg_attr( - all(test, any(target_arch = "x86_64", target_feature = "sse2")), + all(test, any(target_arch = "x86_64", target_feature = "sse2"), + not(target_os = "windows")), // assert_instr(movhpd) assert_instr(movhps) // LLVM7 prefers single-precision instructions )] @@ -1378,7 +1379,8 @@ pub unsafe fn _mm_storeh_pi(p: *mut __m64, a: __m128) { #[target_feature(enable = "sse")] // On i586 the codegen just generates plane MOVs. No need to test for that. #[cfg_attr( - all(test, any(target_arch = "x86_64", target_feature = "sse2")), + all(test, any(target_arch = "x86_64", target_feature = "sse2"), + not(target_os = "windows")), assert_instr(movlps) )] pub unsafe fn _mm_storel_pi(p: *mut __m64, a: __m128) { diff --git a/coresimd/x86/sse2.rs b/coresimd/x86/sse2.rs index 5e6c9e2986..82b91c48ea 100644 --- a/coresimd/x86/sse2.rs +++ b/coresimd/x86/sse2.rs @@ -973,7 +973,8 @@ pub unsafe fn _mm_cvtsi32_si128(a: i32) -> __m128i { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_cvtsi128_si32) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(test, assert_instr(movd))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(movd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_cvtsi128_si32(a: __m128i) -> i32 { simd_extract(a.as_i32x4(), 0) @@ -1664,7 +1665,8 @@ pub unsafe fn _mm_unpacklo_epi32(a: __m128i, b: __m128i) -> __m128i { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_unpacklo_epi64) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(test, assert_instr(movlhps))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(movlhps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_unpacklo_epi64(a: __m128i, b: __m128i) -> __m128i { mem::transmute::(simd_shuffle2( @@ -2582,7 +2584,8 @@ pub unsafe fn _mm_stream_pd(mem_addr: *mut f64, a: __m128d) { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_store_sd) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(test, assert_instr(movlps))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(movlps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_store_sd(mem_addr: *mut f64, a: __m128d) { *mem_addr = simd_extract(a, 0) @@ -2660,7 +2663,8 @@ pub unsafe fn _mm_storer_pd(mem_addr: *mut f64, a: __m128d) { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_storeh_pd) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(test, assert_instr(movhpd))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(movhpd))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_storeh_pd(mem_addr: *mut f64, a: __m128d) { *mem_addr = simd_extract(a, 1); @@ -2672,7 +2676,7 @@ pub unsafe fn _mm_storeh_pd(mem_addr: *mut f64, a: __m128d) { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_storel_pd) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(test, assert_instr(movlps))] // FIXME movlpd +#[cfg_attr(all(test, not(target_os = "windows")), assert_instr(movlps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_storel_pd(mem_addr: *mut f64, a: __m128d) { *mem_addr = simd_extract(a, 0); @@ -2879,7 +2883,7 @@ pub unsafe fn _mm_unpackhi_pd(a: __m128d, b: __m128d) -> __m128d { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_unpacklo_pd) #[inline] #[target_feature(enable = "sse2")] -#[cfg_attr(test, assert_instr(movlhps))] +#[cfg_attr(all(test, not(target_os = "windows")), assert_instr(movlhps))] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_unpacklo_pd(a: __m128d, b: __m128d) -> __m128d { simd_shuffle2(a, b, [0, 2]) diff --git a/coresimd/x86/sse41.rs b/coresimd/x86/sse41.rs index 91722507da..ec4a64e283 100644 --- a/coresimd/x86/sse41.rs +++ b/coresimd/x86/sse41.rs @@ -166,8 +166,8 @@ pub unsafe fn _mm_blend_ps(a: __m128, b: __m128, imm4: i32) -> __m128 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_extract_ps) #[inline] #[target_feature(enable = "sse4.1")] -// TODO: Add test for Windows -#[cfg_attr(test, assert_instr(extractps, imm8 = 0))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(extractps, imm8 = 0))] #[rustc_args_required_const(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_extract_ps(a: __m128, imm8: i32) -> i32 { @@ -195,8 +195,8 @@ pub unsafe fn _mm_extract_epi8(a: __m128i, imm8: i32) -> i32 { /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_extract_epi32) #[inline] #[target_feature(enable = "sse4.1")] -// TODO: Add test for Windows -#[cfg_attr(test, assert_instr(extractps, imm8 = 1))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(extractps, imm8 = 1))] #[rustc_args_required_const(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_extract_epi32(a: __m128i, imm8: i32) -> i32 { diff --git a/coresimd/x86_64/sse41.rs b/coresimd/x86_64/sse41.rs index 301b87b15e..f1db012f4b 100644 --- a/coresimd/x86_64/sse41.rs +++ b/coresimd/x86_64/sse41.rs @@ -12,8 +12,8 @@ use stdsimd_test::assert_instr; /// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_extract_epi64) #[inline] #[target_feature(enable = "sse4.1")] -// TODO: Add test for Windows -#[cfg_attr(test, assert_instr(pextrq, imm8 = 1))] +#[cfg_attr(all(test, not(target_os = "windows")), + assert_instr(pextrq, imm8 = 1))] #[rustc_args_required_const(1)] #[stable(feature = "simd_x86", since = "1.27.0")] pub unsafe fn _mm_extract_epi64(a: __m128i, imm8: i32) -> i64 { From bfcdfd209d62bdd6f6252196c9a0e7e4a842768b Mon Sep 17 00:00:00 2001 From: gnzlbg Date: Fri, 9 Nov 2018 22:15:08 +0100 Subject: [PATCH 4/6] allow i686-pc-windows-gnu to fail on travis --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index c72c6a79f9..f0e159f8e3 100644 --- a/.travis.yml +++ b/.travis.yml @@ -67,7 +67,7 @@ matrix: #- env: TARGET=x86_64-pc-windows-msvc #- env: TARGET=x86_64-pc-windows-gnu #- env: TARGET=i686-pc-windows-msvc - #- env: TARGET=i686-pc-windows-gnu + - env: TARGET=i686-pc-windows-gnu install: - if [ "$NO_ADD" == "" ]; then rustup target add $TARGET; fi From fcc74762d8a30cdf66dfc35fcc9b9dd7cf73a40a Mon Sep 17 00:00:00 2001 From: gnzlbg Date: Fri, 9 Nov 2018 22:42:08 +0100 Subject: [PATCH 5/6] don't run assert_instr on unsupported windows toolchains --- .travis.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.travis.yml b/.travis.yml index f0e159f8e3..d937ccaeb3 100644 --- a/.travis.yml +++ b/.travis.yml @@ -8,10 +8,10 @@ matrix: - env: TARGET=x86_64-pc-windows-msvc NO_ADD=1 os: windows script: ci/run.sh - - env: TARGET=x86_64-pc-windows-gnu + - env: TARGET=x86_64-pc-windows-gnu STDSIMD_DISABLE_ASSERT_INSTR=1 os: windows script: ci/run.sh - - env: TARGET=i686-pc-windows-msvc + - env: TARGET=i686-pc-windows-msvc STDSIMD_DISABLE_ASSERT_INSTR=1 os: windows script: ci/run.sh - env: TARGET=i686-pc-windows-gnu From ea33190fd73b194f1dd92d709092ee9111357c0e Mon Sep 17 00:00:00 2001 From: gnzlbg Date: Fri, 9 Nov 2018 22:43:46 +0100 Subject: [PATCH 6/6] re-enable buildbots --- .travis.yml | 97 ++++++++++++++++++++++++++--------------------------- 1 file changed, 47 insertions(+), 50 deletions(-) diff --git a/.travis.yml b/.travis.yml index d937ccaeb3..ee8042b903 100644 --- a/.travis.yml +++ b/.travis.yml @@ -5,6 +5,35 @@ rust: nightly matrix: fast_finish: true include: + - env: TARGET=i586-unknown-linux-gnu + - env: TARGET=i686-unknown-linux-gnu + - env: TARGET=x86_64-unknown-linux-gnu NO_ADD=1 + - env: TARGET=x86_64-unknown-linux-gnu-emulated NO_ADD=1 STDSIMD_TEST_EVERYTHING=1 + - env: TARGET=x86_64-linux-android + - env: TARGET=arm-unknown-linux-gnueabihf + - env: TARGET=arm-linux-androideabi + - env: TARGET=armv7-unknown-linux-gnueabihf + - env: TARGET=aarch64-unknown-linux-gnu + - env: TARGET=mips-unknown-linux-gnu NORUN=1 + - env: TARGET=mipsel-unknown-linux-gnu NORUN=1 + - env: TARGET=mips64-unknown-linux-gnuabi64 NORUN=1 + - env: TARGET=mips64el-unknown-linux-gnuabi64 NORUN=1 + - env: TARGET=aarch64-linux-android + - env: TARGET=powerpc-unknown-linux-gnu + - env: TARGET=powerpc64-unknown-linux-gnu + - env: TARGET=powerpc64le-unknown-linux-gnu + - env: TARGET=s390x-unknown-linux-gnu NORUN=1 + - os: osx + env: TARGET=i686-apple-darwin + script: ci/run.sh + - os: osx + env: TARGET=x86_64-apple-darwin NO_ADD=1 + script: ci/run.sh + - env: TARGET=wasm32-unknown-unknown + - env: TARGET=thumbv6m-none-eabi NOSTD=1 + - env: TARGET=thumbv7m-none-eabi NOSTD=1 + - env: TARGET=thumbv7em-none-eabi NOSTD=1 + - env: TARGET=thumbv7em-none-eabihf NOSTD=1 - env: TARGET=x86_64-pc-windows-msvc NO_ADD=1 os: windows script: ci/run.sh @@ -17,56 +46,24 @@ matrix: - env: TARGET=i686-pc-windows-gnu os: windows script: ci/run.sh - #- env: TARGET=i586-unknown-linux-gnu - #- env: TARGET=i686-unknown-linux-gnu - #- env: TARGET=x86_64-unknown-linux-gnu NO_ADD=1 - #- env: TARGET=x86_64-unknown-linux-gnu-emulated NO_ADD=1 STDSIMD_TEST_EVERYTHING=1 - #- env: TARGET=x86_64-linux-android - #- env: TARGET=arm-unknown-linux-gnueabihf - #- env: TARGET=arm-linux-androideabi - #- env: TARGET=armv7-unknown-linux-gnueabihf - #- env: TARGET=aarch64-unknown-linux-gnu - #- env: TARGET=mips-unknown-linux-gnu NORUN=1 - #- env: TARGET=mipsel-unknown-linux-gnu NORUN=1 - #- env: TARGET=mips64-unknown-linux-gnuabi64 NORUN=1 - #- env: TARGET=mips64el-unknown-linux-gnuabi64 NORUN=1 - #- env: TARGET=aarch64-linux-android - #- env: TARGET=powerpc-unknown-linux-gnu - #- env: TARGET=powerpc64-unknown-linux-gnu - #- env: TARGET=powerpc64le-unknown-linux-gnu - #- env: TARGET=s390x-unknown-linux-gnu NORUN=1 - #- os: osx - # env: TARGET=i686-apple-darwin - # script: ci/run.sh - #- os: osx - # env: TARGET=x86_64-apple-darwin NO_ADD=1 - # script: ci/run.sh - #- env: TARGET=wasm32-unknown-unknown - #- env: TARGET=thumbv6m-none-eabi NOSTD=1 - #- env: TARGET=thumbv7m-none-eabi NOSTD=1 - #- env: TARGET=thumbv7em-none-eabi NOSTD=1 - #- env: TARGET=thumbv7em-none-eabihf NOSTD=1 - #- env: DOCUMENTATION - # install: true - # script: ci/dox.sh - #- env: VERIFY_X86 - # script: cargo test --manifest-path crates/stdsimd-verify/Cargo.toml - # install: true - #- env: RUSTFMT=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 - # before_script: - # - rustup component add rustfmt-preview - # script: - # - cargo fmt --all -- --check - #- env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 - # script: | - # cargo install clippy - # cargo clippy --all -- -D clippy-pedantic - #allow_failures: - #- env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 - #- env: RUSTFMT=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 - #- env: TARGET=x86_64-pc-windows-msvc - #- env: TARGET=x86_64-pc-windows-gnu - #- env: TARGET=i686-pc-windows-msvc + - env: DOCUMENTATION + install: true + script: ci/dox.sh + - env: VERIFY_X86 + script: cargo test --manifest-path crates/stdsimd-verify/Cargo.toml + install: true + - env: RUSTFMT=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 + before_script: + - rustup component add rustfmt-preview + script: + - cargo fmt --all -- --check + - env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 + script: | + cargo install clippy + cargo clippy --all -- -D clippy-pedantic + allow_failures: + - env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 + - env: RUSTFMT=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1 - env: TARGET=i686-pc-windows-gnu install: