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AmanieuAmanieu
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Tweak constant for ARM vext instruction tests
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‎crates/core_arch/src/arm_shared/neon/generated.rs‎

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -3929,8 +3929,8 @@ pub unsafe fn vext_s8<const N: i32>(a: int8x8_t, b: int8x8_t) -> int8x8_t {
39293929
#[inline]
39303930
#[target_feature(enable = "neon")]
39313931
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3932-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 8))]
3933-
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 8))]
3932+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 3))]
3933+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 3))]
39343934
#[rustc_legacy_const_generics(2)]
39353935
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
39363936
pub unsafe fn vextq_s8<const N: i32>(a: int8x16_t, b: int8x16_t) -> int8x16_t {
@@ -3983,8 +3983,8 @@ pub unsafe fn vext_s16<const N: i32>(a: int16x4_t, b: int16x4_t) -> int16x4_t {
39833983
#[inline]
39843984
#[target_feature(enable = "neon")]
39853985
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3986-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 4))]
3987-
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 4))]
3986+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 3))]
3987+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 3))]
39883988
#[rustc_legacy_const_generics(2)]
39893989
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
39903990
pub unsafe fn vextq_s16<const N: i32>(a: int16x8_t, b: int16x8_t) -> int16x8_t {
@@ -4027,8 +4027,8 @@ pub unsafe fn vext_s32<const N: i32>(a: int32x2_t, b: int32x2_t) -> int32x2_t {
40274027
#[inline]
40284028
#[target_feature(enable = "neon")]
40294029
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4030-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 2))]
4031-
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 2))]
4030+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 3))]
4031+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 3))]
40324032
#[rustc_legacy_const_generics(2)]
40334033
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
40344034
pub unsafe fn vextq_s32<const N: i32>(a: int32x4_t, b: int32x4_t) -> int32x4_t {
@@ -4073,8 +4073,8 @@ pub unsafe fn vext_u8<const N: i32>(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
40734073
#[inline]
40744074
#[target_feature(enable = "neon")]
40754075
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4076-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 8))]
4077-
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 8))]
4076+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 3))]
4077+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 3))]
40784078
#[rustc_legacy_const_generics(2)]
40794079
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
40804080
pub unsafe fn vextq_u8<const N: i32>(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
@@ -4127,8 +4127,8 @@ pub unsafe fn vext_u16<const N: i32>(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t
41274127
#[inline]
41284128
#[target_feature(enable = "neon")]
41294129
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4130-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 4))]
4131-
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 4))]
4130+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 3))]
4131+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 3))]
41324132
#[rustc_legacy_const_generics(2)]
41334133
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
41344134
pub unsafe fn vextq_u16<const N: i32>(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
@@ -4171,8 +4171,8 @@ pub unsafe fn vext_u32<const N: i32>(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t
41714171
#[inline]
41724172
#[target_feature(enable = "neon")]
41734173
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4174-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 2))]
4175-
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 2))]
4174+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 3))]
4175+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 3))]
41764176
#[rustc_legacy_const_generics(2)]
41774177
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
41784178
pub unsafe fn vextq_u32<const N: i32>(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
@@ -4217,8 +4217,8 @@ pub unsafe fn vext_p8<const N: i32>(a: poly8x8_t, b: poly8x8_t) -> poly8x8_t {
42174217
#[inline]
42184218
#[target_feature(enable = "neon")]
42194219
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4220-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 8))]
4221-
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 8))]
4220+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 3))]
4221+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 3))]
42224222
#[rustc_legacy_const_generics(2)]
42234223
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
42244224
pub unsafe fn vextq_p8<const N: i32>(a: poly8x16_t, b: poly8x16_t) -> poly8x16_t {
@@ -4271,8 +4271,8 @@ pub unsafe fn vext_p16<const N: i32>(a: poly16x4_t, b: poly16x4_t) -> poly16x4_t
42714271
#[inline]
42724272
#[target_feature(enable = "neon")]
42734273
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4274-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 4))]
4275-
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 4))]
4274+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 3))]
4275+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 3))]
42764276
#[rustc_legacy_const_generics(2)]
42774277
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
42784278
pub unsafe fn vextq_p16<const N: i32>(a: poly16x8_t, b: poly16x8_t) -> poly16x8_t {
@@ -4353,8 +4353,8 @@ pub unsafe fn vext_f32<const N: i32>(a: float32x2_t, b: float32x2_t) -> float32x
43534353
#[inline]
43544354
#[target_feature(enable = "neon")]
43554355
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4356-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 2))]
4357-
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 2))]
4356+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vext.8", N = 3))]
4357+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ext, N = 3))]
43584358
#[rustc_legacy_const_generics(2)]
43594359
#[cfg_attr(target_arch = "aarch64", stable(feature = "neon_intrinsics", since = "1.59.0"))]
43604360
pub unsafe fn vextq_f32<const N: i32>(a: float32x4_t, b: float32x4_t) -> float32x4_t {

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