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sayantnsayantn
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Fix names of several tests
Rewrote `_mm_cvtps_ph` and `_mm_cvtph_ps` tests
1 parent cf10e91 commit 211c94c

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9 files changed

+52
-57
lines changed

9 files changed

+52
-57
lines changed

‎crates/core_arch/src/x86/eflags.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@ mod tests {
7373
#[test]
7474
#[cfg_attr(miri, ignore)] // Uses inline assembly
7575
#[allow(deprecated)]
76-
fn test_eflags() {
76+
fn test_readeflags() {
7777
unsafe {
7878
// reads eflags, writes them back, reads them again,
7979
// and compare for equality:

‎crates/core_arch/src/x86/f16c.rs‎

Lines changed: 37 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -98,23 +98,48 @@ mod tests {
9898
use crate::{core_arch::x86::*, mem::transmute};
9999
use stdarch_test::simd_test;
100100

101+
const F16_ONE: i16 = 0x3c00;
102+
const F16_TWO: i16 = 0x4000;
103+
const F16_THREE: i16 = 0x4200;
104+
const F16_FOUR: i16 = 0x4400;
105+
const F16_FIVE: i16 = 0x4500;
106+
const F16_SIX: i16 = 0x4600;
107+
const F16_SEVEN: i16 = 0x4700;
108+
const F16_EIGHT: i16 = 0x4800;
109+
101110
#[simd_test(enable = "f16c")]
102111
unsafe fn test_mm_cvtph_ps() {
103-
let array = [1_f32, 2_f32, 3_f32, 4_f32];
104-
let float_vec: __m128 = transmute(array);
105-
let halfs: __m128i = _mm_cvtps_ph::<0>(float_vec);
106-
let floats: __m128 = _mm_cvtph_ps(halfs);
107-
let result: [f32; 4] = transmute(floats);
108-
assert_eq!(result, array);
112+
let a = _mm_set_epi16(0, 0, 0, 0, F16_ONE, F16_TWO, F16_THREE, F16_FOUR);
113+
let r = _mm_cvtph_ps(a);
114+
let e = _mm_set_ps(1.0, 2.0, 3.0, 4.0);
115+
assert_eq_m128(r, e);
109116
}
110117

111118
#[simd_test(enable = "f16c")]
112119
unsafe fn test_mm256_cvtph_ps() {
113-
let array = [1_f32, 2_f32, 3_f32, 4_f32, 5_f32, 6_f32, 7_f32, 8_f32];
114-
let float_vec: __m256 = transmute(array);
115-
let halfs: __m128i = _mm256_cvtps_ph::<0>(float_vec);
116-
let floats: __m256 = _mm256_cvtph_ps(halfs);
117-
let result: [f32; 8] = transmute(floats);
118-
assert_eq!(result, array);
120+
let a = _mm_set_epi16(
121+
F16_ONE, F16_TWO, F16_THREE, F16_FOUR, F16_FIVE, F16_SIX, F16_SEVEN, F16_EIGHT,
122+
);
123+
let r = _mm256_cvtph_ps(a);
124+
let e = _mm256_set_ps(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
125+
assert_eq_m256(r, e);
126+
}
127+
128+
#[simd_test(enable = "f16c")]
129+
unsafe fn test_mm_cvtps_ph() {
130+
let a = _mm_set_ps(1.0, 2.0, 3.0, 4.0);
131+
let r = _mm_cvtps_ph::<_MM_FROUND_CUR_DIRECTION>(a);
132+
let e = _mm_set_epi16(0, 0, 0, 0, F16_ONE, F16_TWO, F16_THREE, F16_FOUR);
133+
assert_eq_m128i(r, e);
134+
}
135+
136+
#[simd_test(enable = "f16c")]
137+
unsafe fn test_mm256_cvtps_ph() {
138+
let a = _mm256_set_ps(1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0);
139+
let r = _mm256_cvtps_ph::<_MM_FROUND_CUR_DIRECTION>(a);
140+
let e = _mm_set_epi16(
141+
F16_ONE, F16_TWO, F16_THREE, F16_FOUR, F16_FIVE, F16_SIX, F16_SEVEN, F16_EIGHT,
142+
);
143+
assert_eq_m128i(r, e);
119144
}
120145
}

‎crates/core_arch/src/x86/rdtsc.rs‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -63,15 +63,15 @@ mod tests {
6363
use stdarch_test::simd_test;
6464

6565
#[simd_test(enable = "sse2")]
66-
unsafe fn _rdtsc() {
67-
let r = rdtsc::_rdtsc();
66+
unsafe fn test_rdtsc() {
67+
let r = _rdtsc();
6868
assert_ne!(r, 0); // The chances of this being 0 are infinitesimal
6969
}
7070

7171
#[simd_test(enable = "sse2")]
72-
unsafe fn _rdtscp() {
72+
unsafe fn test_rdtscp() {
7373
let mut aux = 0;
74-
let r = rdtsc::__rdtscp(&mut aux);
74+
let r = __rdtscp(&mut aux);
7575
assert_ne!(r, 0); // The chances of this being 0 are infinitesimal
7676
}
7777
}

‎crates/core_arch/src/x86/rtm.rs‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -120,13 +120,13 @@ mod tests {
120120
use crate::core_arch::x86::*;
121121

122122
#[simd_test(enable = "rtm")]
123-
unsafe fn test_xbegin_xend() {
123+
unsafe fn test_xbegin() {
124124
let mut x = 0;
125125
for _ in 0..10 {
126-
let code = rtm::_xbegin();
126+
let code = _xbegin();
127127
if code == _XBEGIN_STARTED {
128128
x += 1;
129-
rtm::_xend();
129+
_xend();
130130
assert_eq!(x, 1);
131131
break;
132132
}

‎crates/core_arch/src/x86/sse41.rs‎

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1310,7 +1310,7 @@ mod tests {
13101310
}
13111311

13121312
#[simd_test(enable = "sse4.1")]
1313-
unsafe fn test_mm_min_epi8_1() {
1313+
unsafe fn test_mm_min_epi8() {
13141314
#[rustfmt::skip]
13151315
let a = _mm_setr_epi8(
13161316
1, 4, 5, 8, 9, 12, 13, 16,
@@ -1328,10 +1328,7 @@ mod tests {
13281328
17, 19, 21, 23, 25, 27, 29, 31,
13291329
);
13301330
assert_eq_m128i(r, e);
1331-
}
13321331

1333-
#[simd_test(enable = "sse4.1")]
1334-
unsafe fn test_mm_min_epi8_2() {
13351332
#[rustfmt::skip]
13361333
let a = _mm_setr_epi8(
13371334
1, -4, -5, 8, -9, -12, 13, -16,
@@ -1361,16 +1358,13 @@ mod tests {
13611358
}
13621359

13631360
#[simd_test(enable = "sse4.1")]
1364-
unsafe fn test_mm_min_epi32_1() {
1361+
unsafe fn test_mm_min_epi32() {
13651362
let a = _mm_setr_epi32(1, 4, 5, 8);
13661363
let b = _mm_setr_epi32(2, 3, 6, 7);
13671364
let r = _mm_min_epi32(a, b);
13681365
let e = _mm_setr_epi32(1, 3, 5, 7);
13691366
assert_eq_m128i(r, e);
1370-
}
13711367

1372-
#[simd_test(enable = "sse4.1")]
1373-
unsafe fn test_mm_min_epi32_2() {
13741368
let a = _mm_setr_epi32(-1, 4, 5, -7);
13751369
let b = _mm_setr_epi32(-2, 3, -6, 8);
13761370
let r = _mm_min_epi32(a, b);

‎crates/core_arch/src/x86/xsave.rs‎

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -185,10 +185,6 @@ mod tests {
185185
}
186186
}
187187

188-
// We cannot test for `_xsave`, `xrstor`, `_xsetbv`, `_xsaveopt`, `_xsaves`, `_xrstors` as they
189-
// are privileged instructions and will need access to kernel mode to execute and test them.
190-
// see https://github.com/rust-lang/stdarch/issues/209
191-
192188
#[cfg_attr(stdarch_intel_sde, ignore)]
193189
#[simd_test(enable = "xsave")]
194190
#[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri

‎crates/core_arch/src/x86_64/tbm.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -206,7 +206,7 @@ mod tests {
206206
}
207207

208208
#[simd_test(enable = "tbm")]
209-
unsafe fn test_t1mksc_u64() {
209+
unsafe fn test_t1mskc_u64() {
210210
assert_eq!(
211211
_t1mskc_u64(0b0101_0111u64),
212212
0b1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1111_1000u64

‎crates/core_arch/src/x86_64/xsave.rs‎

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -149,10 +149,6 @@ mod tests {
149149
}
150150
}
151151

152-
// We cannot test `_xsave64`, `_xrstor64`, `_xsaveopt64`, `_xsaves64` and `_xrstors64` directly
153-
// as they are privileged instructions and will need access to the kernel to run and test them.
154-
// See https://github.com/rust-lang/stdarch/issues/209
155-
156152
#[cfg_attr(stdarch_intel_sde, ignore)]
157153
#[simd_test(enable = "xsave")]
158154
#[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri

‎crates/stdarch-verify/tests/x86-intel.rs‎

Lines changed: 4 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -181,12 +181,7 @@ fn verify_all_signatures() {
181181
if !rust.has_test {
182182
// FIXME: this list should be almost empty
183183
let skip = [
184-
// EFLAGS
185-
"__readeflags",
186-
"__readeflags",
187-
"__writeeflags",
188-
"__writeeflags",
189-
// MXCSR - deprecated
184+
// MXCSR - deprecated, immediate UB
190185
"_mm_getcsr",
191186
"_mm_setcsr",
192187
"_MM_GET_EXCEPTION_MASK",
@@ -207,14 +202,6 @@ fn verify_all_signatures() {
207202
"_xrstors",
208203
"_xsaves64",
209204
"_xrstors64",
210-
// TSC
211-
"_rdtsc",
212-
"__rdtscp",
213-
// TBM
214-
"_t1mskc_u64",
215-
// RTM
216-
"_xbegin",
217-
"_xend",
218205
// RDRAND
219206
"_rdrand16_step",
220207
"_rdrand32_step",
@@ -250,16 +237,13 @@ fn verify_all_signatures() {
250237
"_mm256_unpacklo_epi32",
251238
"_mm256_unpackhi_epi64",
252239
"_mm256_unpacklo_epi64",
253-
// Has tests with different name
254-
"_mm_min_epi8",
255-
"_mm_min_epi32",
240+
// Has tests with some other intrinsic
241+
"__writeeflags",
256242
"_xrstor",
257243
"_xrstor64",
258244
"_fxrstor",
259245
"_fxrstor64",
260-
// Needs `f16` to test
261-
"_mm_cvtps_ph",
262-
"_mm256_cvtps_ph",
246+
"_xend",
263247
// Aliases
264248
"_mm_comige_ss",
265249
"_mm_cvt_ss2si",

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