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TheRealMDoerr
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8269672: C1: Remove unaligned move on all architectures
Co-authored-by: Martin Doerr <[email protected]> Reviewed-by: thartmann
1 parent 2926769 commit df0e11b

19 files changed

+39
-66
lines changed

‎src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -784,7 +784,7 @@ void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type, bool po
784784
}
785785

786786

787-
void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide, bool /* unaligned */) {
787+
void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool wide) {
788788
LIR_Address* to_addr = dest->as_address_ptr();
789789
PatchingStub* patch = NULL;
790790
Register compressed_src = rscratch1;
@@ -941,7 +941,7 @@ void LIR_Assembler::stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type) {
941941
}
942942

943943

944-
void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide, bool /* unaligned */) {
944+
void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide) {
945945
LIR_Address* addr = src->as_address_ptr();
946946
LIR_Address* from_addr = src->as_address_ptr();
947947

@@ -2907,7 +2907,7 @@ void LIR_Assembler::rt_call(LIR_Opr result, address dest, const LIR_OprList* arg
29072907
void LIR_Assembler::volatile_move_op(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info) {
29082908
if (dest->is_address() || src->is_address()) {
29092909
move_op(src, dest, type, lir_patch_none, info,
2910-
/*pop_fpu_stack*/false, /*unaligned*/false, /*wide*/false);
2910+
/*pop_fpu_stack*/false, /*wide*/false);
29112911
} else {
29122912
ShouldNotReachHere();
29132913
}

‎src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -343,7 +343,7 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
343343
Register pre_val_reg = stub->pre_val()->as_register();
344344

345345
if (stub->do_load()) {
346-
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
346+
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
347347
}
348348
__ cbz(pre_val_reg, *stub->continuation());
349349
ce->store_parameter(stub->pre_val()->as_register(), 0);

‎src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -613,7 +613,7 @@ void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, Shen
613613
Register pre_val_reg = stub->pre_val()->as_register();
614614

615615
if (stub->do_load()) {
616-
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
616+
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
617617
}
618618
__ cbz(pre_val_reg, *stub->continuation());
619619
ce->store_parameter(stub->pre_val()->as_register(), 0);

‎src/hotspot/cpu/arm/c1_LIRAssembler_arm.cpp‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -494,8 +494,7 @@ void LIR_Assembler::reg2stack(LIR_Opr src, LIR_Opr dest, BasicType type, bool po
494494

495495
void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type,
496496
LIR_PatchCode patch_code, CodeEmitInfo* info,
497-
bool pop_fpu_stack, bool wide,
498-
bool unaligned) {
497+
bool pop_fpu_stack, bool wide) {
499498
LIR_Address* to_addr = dest->as_address_ptr();
500499
Register base_reg = to_addr->base()->as_pointer_register();
501500
const bool needs_patching = (patch_code != lir_patch_none);
@@ -695,7 +694,7 @@ void LIR_Assembler::stack2stack(LIR_Opr src, LIR_Opr dest, BasicType type) {
695694

696695
void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type,
697696
LIR_PatchCode patch_code, CodeEmitInfo* info,
698-
bool wide, bool unaligned) {
697+
bool wide) {
699698
assert(src->is_address(), "should not call otherwise");
700699
assert(dest->is_register(), "should not call otherwise");
701700
LIR_Address* addr = src->as_address_ptr();

‎src/hotspot/cpu/arm/gc/g1/g1BarrierSetAssembler_arm.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -332,7 +332,7 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
332332
Register pre_val_reg = stub->pre_val()->as_register();
333333

334334
if (stub->do_load()) {
335-
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
335+
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
336336
}
337337

338338
__ cbz(pre_val_reg, *stub->continuation());

‎src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.cpp‎

Lines changed: 10 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -714,7 +714,7 @@ void LIR_Assembler::explicit_null_check(Register addr, CodeEmitInfo* info) {
714714

715715

716716
// Attention: caller must encode oop if needed
717-
int LIR_Assembler::store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide, bool unaligned) {
717+
int LIR_Assembler::store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide) {
718718
int store_offset;
719719
if (!Assembler::is_simm16(offset)) {
720720
// For offsets larger than a simm16 we setup the offset.
@@ -794,7 +794,7 @@ int LIR_Assembler::store(LIR_Opr from_reg, Register base, Register disp, BasicTy
794794
}
795795

796796

797-
int LIR_Assembler::load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide, bool unaligned) {
797+
int LIR_Assembler::load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide) {
798798
int load_offset;
799799
if (!Assembler::is_simm16(offset)) {
800800
// For offsets larger than a simm16 we setup the offset.
@@ -965,7 +965,7 @@ void LIR_Assembler::const2mem(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmi
965965
offset = store(tmp, base, addr->index()->as_pointer_register(), type, wide);
966966
} else {
967967
assert(Assembler::is_simm16(addr->disp()), "can't handle larger addresses");
968-
offset = store(tmp, base, addr->disp(), type, wide, false);
968+
offset = store(tmp, base, addr->disp(), type, wide);
969969
}
970970

971971
if (info != NULL) {
@@ -1120,7 +1120,7 @@ Address LIR_Assembler::as_Address_lo(LIR_Address* addr) {
11201120

11211121

11221122
void LIR_Assembler::mem2reg(LIR_Opr src_opr, LIR_Opr dest, BasicType type,
1123-
LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide, bool unaligned) {
1123+
LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide) {
11241124

11251125
assert(type != T_METADATA, "load of metadata ptr not supported");
11261126
LIR_Address* addr = src_opr->as_address_ptr();
@@ -1170,7 +1170,7 @@ void LIR_Assembler::mem2reg(LIR_Opr src_opr, LIR_Opr dest, BasicType type,
11701170

11711171
if (disp_reg == noreg) {
11721172
assert(Assembler::is_simm16(disp_value), "should have set this up");
1173-
offset = load(src, disp_value, to_reg, type, wide, unaligned);
1173+
offset = load(src, disp_value, to_reg, type, wide);
11741174
} else {
11751175
offset = load(src, disp_reg, to_reg, type, wide);
11761176
}
@@ -1192,8 +1192,7 @@ void LIR_Assembler::stack2reg(LIR_Opr src, LIR_Opr dest, BasicType type) {
11921192
addr = frame_map()->address_for_double_slot(src->double_stack_ix());
11931193
}
11941194

1195-
bool unaligned = addr.disp() % 8 != 0;
1196-
load(addr.base(), addr.disp(), dest, dest->type(), true /*wide*/, unaligned);
1195+
load(addr.base(), addr.disp(), dest, dest->type(), true /*wide*/);
11971196
}
11981197

11991198

@@ -1204,8 +1203,8 @@ void LIR_Assembler::reg2stack(LIR_Opr from_reg, LIR_Opr dest, BasicType type, bo
12041203
} else if (dest->is_double_word()) {
12051204
addr = frame_map()->address_for_slot(dest->double_stack_ix());
12061205
}
1207-
bool unaligned = addr.disp() % 8 != 0;
1208-
store(from_reg, addr.base(), addr.disp(), from_reg->type(), true /*wide*/, unaligned);
1206+
1207+
store(from_reg, addr.base(), addr.disp(), from_reg->type(), true /*wide*/);
12091208
}
12101209

12111210

@@ -1241,7 +1240,7 @@ void LIR_Assembler::reg2reg(LIR_Opr from_reg, LIR_Opr to_reg) {
12411240

12421241
void LIR_Assembler::reg2mem(LIR_Opr from_reg, LIR_Opr dest, BasicType type,
12431242
LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack,
1244-
bool wide, bool unaligned) {
1243+
bool wide) {
12451244
assert(type != T_METADATA, "store of metadata ptr not supported");
12461245
LIR_Address* addr = dest->as_address_ptr();
12471246

@@ -1298,7 +1297,7 @@ void LIR_Assembler::reg2mem(LIR_Opr from_reg, LIR_Opr dest, BasicType type,
12981297

12991298
if (disp_reg == noreg) {
13001299
assert(Assembler::is_simm16(disp_value), "should have set this up");
1301-
offset = store(from_reg, src, disp_value, type, wide, unaligned);
1300+
offset = store(from_reg, src, disp_value, type, wide);
13021301
} else {
13031302
offset = store(from_reg, src, disp_reg, type, wide);
13041303
}

‎src/hotspot/cpu/ppc/c1_LIRAssembler_ppc.hpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -38,10 +38,10 @@
3838

3939
void explicit_null_check(Register addr, CodeEmitInfo* info);
4040

41-
int store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide, bool unaligned);
41+
int store(LIR_Opr from_reg, Register base, int offset, BasicType type, bool wide);
4242
int store(LIR_Opr from_reg, Register base, Register disp, BasicType type, bool wide);
4343

44-
int load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide, bool unaligned);
44+
int load(Register base, int offset, LIR_Opr to_reg, BasicType type, bool wide);
4545
int load(Register base, Register disp, LIR_Opr to_reg, BasicType type, bool wide);
4646

4747
int shift_amount(BasicType t);

‎src/hotspot/cpu/ppc/c1_LIRGenerator_ppc.cpp‎

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -309,12 +309,7 @@ bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result
309309
void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {
310310
BasicType t = item->type();
311311
LIR_Opr sp_opr = FrameMap::SP_opr;
312-
if ((t == T_LONG || t == T_DOUBLE) &&
313-
(in_bytes(offset_from_sp) % 8 != 0)) {
314-
__ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
315-
} else {
316-
__ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
317-
}
312+
__ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
318313
}
319314

320315

‎src/hotspot/cpu/ppc/gc/g1/g1BarrierSetAssembler_ppc.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -393,7 +393,7 @@ void G1BarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrier
393393
Register pre_val_reg = stub->pre_val()->as_register();
394394

395395
if (stub->do_load()) {
396-
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
396+
ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/);
397397
}
398398

399399
__ cmpdi(CCR0, pre_val_reg, 0);

‎src/hotspot/cpu/s390/c1_LIRAssembler_s390.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -879,7 +879,7 @@ Address LIR_Assembler::as_Address_lo(LIR_Address* addr) {
879879
}
880880

881881
void LIR_Assembler::mem2reg(LIR_Opr src_opr, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code,
882-
CodeEmitInfo* info, bool wide, bool unaligned) {
882+
CodeEmitInfo* info, bool wide) {
883883

884884
assert(type != T_METADATA, "load of metadata ptr not supported");
885885
LIR_Address* addr = src_opr->as_address_ptr();
@@ -1079,7 +1079,7 @@ void LIR_Assembler::reg2reg(LIR_Opr from_reg, LIR_Opr to_reg) {
10791079

10801080
void LIR_Assembler::reg2mem(LIR_Opr from, LIR_Opr dest_opr, BasicType type,
10811081
LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack,
1082-
bool wide, bool unaligned) {
1082+
bool wide) {
10831083
assert(type != T_METADATA, "store of metadata ptr not supported");
10841084
LIR_Address* addr = dest_opr->as_address_ptr();
10851085

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