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8265263: AArch64: Combine vneg with right shift count #7724

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8265263: AArch64: Combine vneg with right shift count #7724

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9 changes: 9 additions & 0 deletions src/hotspot/cpu/aarch64/aarch64.ad
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Original file line number Diff line number Diff line change
Expand Up @@ -1311,6 +1311,9 @@ public:
// predicate controlling translation of CompareAndSwapX
bool needs_acquiring_load_exclusive(const Node *load);

// Assert that the given node is not a variable shift.
bool assert_not_var_shift(const Node* n);

// predicate controlling addressing modes
bool size_fits_all_mem_uses(AddPNode* addp, int shift);
%}
Expand Down Expand Up @@ -1725,6 +1728,12 @@ bool needs_acquiring_load_exclusive(const Node *n)
return true;
}

// Assert that the given node is not a variable shift.
bool assert_not_var_shift(const Node* n) {
assert(!n->as_ShiftV()->is_var_shift(), "illegal variable shift");
return true;
}

#define __ _masm.

// advance declarations for helper functions to convert register
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