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Jatin Bhateja
committed
8345472: Fix incorrect format instruction for floating point max/min patterns
Reviewed-by: kvn
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‎src/hotspot/cpu/x86/x86_64.ad‎

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -4424,21 +4424,21 @@ instruct maxF_reg(legRegF dst, legRegF a, legRegF b, legRegF tmp, legRegF atmp,
44244424
predicate(UseAVX > 0 && !VLoopReductions::is_reduction(n));
44254425
match(Set dst (MaxF a b));
44264426
effect(USE a, USE b, TEMP tmp, TEMP atmp, TEMP btmp);
4427-
format %{ "maxF $dst, $a, $b \t! using tmp, atmp and btmp as TEMP" %}
4427+
format %{ "maxF $dst, $a, $b \t! using $tmp, $atmp and $btmp as TEMP" %}
44284428
ins_encode %{
44294429
__ vminmax_fp(Op_MaxV, T_FLOAT, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $tmp$$XMMRegister, $atmp$$XMMRegister, $btmp$$XMMRegister, Assembler::AVX_128bit);
44304430
%}
44314431
ins_pipe( pipe_slow );
44324432
%}
44334433

4434-
instruct maxF_reduction_reg(legRegF dst, legRegF a, legRegF b, legRegF xmmt, rRegI tmp, rFlagsReg cr) %{
4434+
instruct maxF_reduction_reg(legRegF dst, legRegF a, legRegF b, legRegF xtmp, rRegI rtmp, rFlagsReg cr) %{
44354435
predicate(UseAVX > 0 && VLoopReductions::is_reduction(n));
44364436
match(Set dst (MaxF a b));
4437-
effect(USE a, USE b, TEMP xmmt, TEMP tmp, KILL cr);
4437+
effect(USE a, USE b, TEMP xtmp, TEMP rtmp, KILL cr);
44384438

4439-
format %{ "$dst = max($a, $b)\t# intrinsic (float)" %}
4439+
format %{ "maxF_reduction $dst, $a, $b \t!using $xtmp and $rtmp as TEMP" %}
44404440
ins_encode %{
4441-
emit_fp_min_max(masm, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $xmmt$$XMMRegister, $tmp$$Register,
4441+
emit_fp_min_max(masm, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $xtmp$$XMMRegister, $rtmp$$Register,
44424442
false /*min*/, true /*single*/);
44434443
%}
44444444
ins_pipe( pipe_slow );
@@ -4449,21 +4449,21 @@ instruct maxD_reg(legRegD dst, legRegD a, legRegD b, legRegD tmp, legRegD atmp,
44494449
predicate(UseAVX > 0 && !VLoopReductions::is_reduction(n));
44504450
match(Set dst (MaxD a b));
44514451
effect(USE a, USE b, TEMP atmp, TEMP btmp, TEMP tmp);
4452-
format %{ "maxD $dst, $a, $b \t! using tmp, atmp and btmp as TEMP" %}
4452+
format %{ "maxD $dst, $a, $b \t! using $tmp, $atmp and $btmp as TEMP" %}
44534453
ins_encode %{
44544454
__ vminmax_fp(Op_MaxV, T_DOUBLE, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $tmp$$XMMRegister, $atmp$$XMMRegister, $btmp$$XMMRegister, Assembler::AVX_128bit);
44554455
%}
44564456
ins_pipe( pipe_slow );
44574457
%}
44584458

4459-
instruct maxD_reduction_reg(legRegD dst, legRegD a, legRegD b, legRegD xmmt, rRegL tmp, rFlagsReg cr) %{
4459+
instruct maxD_reduction_reg(legRegD dst, legRegD a, legRegD b, legRegD xtmp, rRegL rtmp, rFlagsReg cr) %{
44604460
predicate(UseAVX > 0 && VLoopReductions::is_reduction(n));
44614461
match(Set dst (MaxD a b));
4462-
effect(USE a, USE b, TEMP xmmt, TEMP tmp, KILL cr);
4462+
effect(USE a, USE b, TEMP xtmp, TEMP rtmp, KILL cr);
44634463

4464-
format %{ "$dst = max($a, $b)\t# intrinsic (double)" %}
4464+
format %{ "maxD_reduction $dst, $a, $b \t! using $xtmp and $rtmp as TEMP" %}
44654465
ins_encode %{
4466-
emit_fp_min_max(masm, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $xmmt$$XMMRegister, $tmp$$Register,
4466+
emit_fp_min_max(masm, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $xtmp$$XMMRegister, $rtmp$$Register,
44674467
false /*min*/, false /*single*/);
44684468
%}
44694469
ins_pipe( pipe_slow );
@@ -4474,21 +4474,21 @@ instruct minF_reg(legRegF dst, legRegF a, legRegF b, legRegF tmp, legRegF atmp,
44744474
predicate(UseAVX > 0 && !VLoopReductions::is_reduction(n));
44754475
match(Set dst (MinF a b));
44764476
effect(USE a, USE b, TEMP tmp, TEMP atmp, TEMP btmp);
4477-
format %{ "minF $dst, $a, $b \t! using tmp, atmp and btmp as TEMP" %}
4477+
format %{ "minF $dst, $a, $b \t! using $tmp, $atmp and $btmp as TEMP" %}
44784478
ins_encode %{
44794479
__ vminmax_fp(Op_MinV, T_FLOAT, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $tmp$$XMMRegister, $atmp$$XMMRegister, $btmp$$XMMRegister, Assembler::AVX_128bit);
44804480
%}
44814481
ins_pipe( pipe_slow );
44824482
%}
44834483

4484-
instruct minF_reduction_reg(legRegF dst, legRegF a, legRegF b, legRegF xmmt, rRegI tmp, rFlagsReg cr) %{
4484+
instruct minF_reduction_reg(legRegF dst, legRegF a, legRegF b, legRegF xtmp, rRegI rtmp, rFlagsReg cr) %{
44854485
predicate(UseAVX > 0 && VLoopReductions::is_reduction(n));
44864486
match(Set dst (MinF a b));
4487-
effect(USE a, USE b, TEMP xmmt, TEMP tmp, KILL cr);
4487+
effect(USE a, USE b, TEMP xtmp, TEMP rtmp, KILL cr);
44884488

4489-
format %{ "$dst = min($a, $b)\t# intrinsic (float)" %}
4489+
format %{ "minF_reduction $dst, $a, $b \t! using $xtmp and $rtmp as TEMP" %}
44904490
ins_encode %{
4491-
emit_fp_min_max(masm, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $xmmt$$XMMRegister, $tmp$$Register,
4491+
emit_fp_min_max(masm, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $xtmp$$XMMRegister, $rtmp$$Register,
44924492
true /*min*/, true /*single*/);
44934493
%}
44944494
ins_pipe( pipe_slow );
@@ -4499,21 +4499,21 @@ instruct minD_reg(legRegD dst, legRegD a, legRegD b, legRegD tmp, legRegD atmp,
44994499
predicate(UseAVX > 0 && !VLoopReductions::is_reduction(n));
45004500
match(Set dst (MinD a b));
45014501
effect(USE a, USE b, TEMP tmp, TEMP atmp, TEMP btmp);
4502-
format %{ "minD $dst, $a, $b \t! using tmp, atmp and btmp as TEMP" %}
4502+
format %{ "minD $dst, $a, $b \t! using $tmp, $atmp and $btmp as TEMP" %}
45034503
ins_encode %{
45044504
__ vminmax_fp(Op_MinV, T_DOUBLE, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $tmp$$XMMRegister, $atmp$$XMMRegister, $btmp$$XMMRegister, Assembler::AVX_128bit);
45054505
%}
45064506
ins_pipe( pipe_slow );
45074507
%}
45084508

4509-
instruct minD_reduction_reg(legRegD dst, legRegD a, legRegD b, legRegD xmmt, rRegL tmp, rFlagsReg cr) %{
4509+
instruct minD_reduction_reg(legRegD dst, legRegD a, legRegD b, legRegD xtmp, rRegL rtmp, rFlagsReg cr) %{
45104510
predicate(UseAVX > 0 && VLoopReductions::is_reduction(n));
45114511
match(Set dst (MinD a b));
4512-
effect(USE a, USE b, TEMP xmmt, TEMP tmp, KILL cr);
4512+
effect(USE a, USE b, TEMP xtmp, TEMP rtmp, KILL cr);
45134513

4514-
format %{ "$dst = min($a, $b)\t# intrinsic (double)" %}
4514+
format %{ "maxD_reduction $dst, $a, $b \t! using $xtmp and $rtmp as TEMP" %}
45154515
ins_encode %{
4516-
emit_fp_min_max(masm, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $xmmt$$XMMRegister, $tmp$$Register,
4516+
emit_fp_min_max(masm, $dst$$XMMRegister, $a$$XMMRegister, $b$$XMMRegister, $xtmp$$XMMRegister, $rtmp$$Register,
45174517
true /*min*/, false /*single*/);
45184518
%}
45194519
ins_pipe( pipe_slow );

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