@@ -182,11 +182,11 @@ alloc_class chunk0(
182182alloc_class chunk1(
183183 R_S16, R_S17, R_S18, R_S19, R_S20, R_S21, R_S22, R_S23,
184184 R_S24, R_S25, R_S26, R_S27, R_S28, R_S29, R_S30, R_S31,
185- R_S0, R_S1, R_S2, R_S3, R_S4, R_S5, R_S6, R_S7,
185+ R_S0, R_S1, R_S2, R_S3, R_S4, R_S5, R_S6, R_S7,
186186 R_S8, R_S9, R_S10, R_S11, R_S12, R_S13, R_S14, R_S15,
187- R_D16, R_D16x,R_D17, R_D17x,R_D18, R_D18x,R_D19, R_D19x,
188- R_D20, R_D20x,R_D21, R_D21x,R_D22, R_D22x,R_D23, R_D23x,
189- R_D24, R_D24x,R_D25, R_D25x,R_D26, R_D26x,R_D27, R_D27x,
187+ R_D16, R_D16x,R_D17, R_D17x,R_D18, R_D18x,R_D19, R_D19x,
188+ R_D20, R_D20x,R_D21, R_D21x,R_D22, R_D22x,R_D23, R_D23x,
189+ R_D24, R_D24x,R_D25, R_D25x,R_D26, R_D26x,R_D27, R_D27x,
190190 R_D28, R_D28x,R_D29, R_D29x,R_D30, R_D30x,R_D31, R_D31x
191191);
192192
@@ -196,8 +196,7 @@ alloc_class chunk2(APSR, FPSCR);
196196// Several register classes are automatically defined based upon information in
197197// this architecture description.
198198// 1) reg_class inline_cache_reg ( as defined in frame section )
199- // 2) reg_class interpreter_method_reg ( as defined in frame section )
200- // 3) reg_class stack_slots( /* one chunk of stack-based "registers" */ )
199+ // 2) reg_class stack_slots( /* one chunk of stack-based "registers" */ )
201200//
202201
203202// ----------------------------
@@ -223,7 +222,6 @@ reg_class ptr_reg(R_R0, R_R1, R_R2, R_R3, R_R4, R_R5, R_R6, R_R7, R_R8, R_R9, R_
223222reg_class sp_ptr_reg(R_R0, R_R1, R_R2, R_R3, R_R4, R_R5, R_R6, R_R7, R_R8, R_R9, R_R11, R_R12, R_R14, R_R10 /* TLS*/, R_R13 /* SP*/);
224223
225224#define R_Ricklass R_R8
226- #define R_Rmethod R_R9
227225#define R_Rthread R_R10
228226#define R_Rexception_obj R_R4
229227
@@ -237,7 +235,6 @@ reg_class R9_regP(R_R9);
237235reg_class R12_regP(R_R12);
238236reg_class Rexception_regP(R_Rexception_obj);
239237reg_class Ricklass_regP(R_Ricklass);
240- reg_class Rmethod_regP(R_Rmethod);
241238reg_class Rthread_regP(R_Rthread);
242239reg_class IP_regP(R_R12);
243240reg_class SP_regP(R_R13);
@@ -442,7 +439,7 @@ int MachCallStaticJavaNode::ret_addr_offset() {
442439int MachCallDynamicJavaNode::ret_addr_offset() {
443440 bool far = !cache_reachable();
444441 // mov_oop is always 2 words
445- return (2 + (far ? 3 : 1)) * NativeInstruction::instruction_size;
442+ return (2 + (far ? 3 : 1)) * NativeInstruction::instruction_size;
446443}
447444
448445int MachCallRuntimeNode::ret_addr_offset() {
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