From 632a7a44b60643b3afc617a48dd221f9f49c7d17 Mon Sep 17 00:00:00 2001 From: Joseph Oster Date: Wed, 12 Aug 2020 16:06:58 -0700 Subject: [PATCH 1/5] Updating License file to no date in the title /* * Copyright (c) 2020 Intel Corporation * * This program and the accompanying materials are made available under the * terms of the The MIT License which is available at * https://opensource.org/licenses/MIT. * * SPDX-License-Identifier: MIT */ --- .../C++/CombinationalLogic/MandelbrotOMP/license.txt | 2 +- .../C++/CompilerInfrastructure/Intrinsics/license.txt | 2 +- DirectProgramming/C++/GraphTraversal/MergesortOMP/license.txt | 2 +- .../DPC++/CombinationalLogic/mandelbrot/License.txt | 2 +- .../DPC++/CombinationalLogic/sepia-filter/License.txt | 2 +- .../DPC++/DenseLinearAlgebra/complex_mult/License.txt | 2 +- .../DPC++/DenseLinearAlgebra/matrix_mul/License.txt | 2 +- .../DPC++/DenseLinearAlgebra/simple-add/License.txt | 2 +- .../DPC++/DenseLinearAlgebra/vector-add/License.txt | 2 +- DirectProgramming/DPC++/GraphTraversal/bitonic-sort/License.txt | 2 +- .../DPC++/SpectralMethods/DiscreteCosineTransform/license.txt | 2 +- .../DPC++/StructuredGrids/1d_HeatTransfer/License.txt | 2 +- .../DPC++/StructuredGrids/iso2dfd_dpcpp/License.txt | 2 +- .../DPC++/StructuredGrids/iso3dfd_dpcpp/License.txt | 2 +- .../DPC++/StructuredGrids/particle-diffusion/License.txt | 2 +- DirectProgramming/Fortran/openmp_samples/License.txt | 2 +- DirectProgramming/Fortran/optimize_samples/License.txt | 2 +- DirectProgramming/Fortran/vec_samples/License.txt | 2 +- Libraries/oneDPL/gamma-correction/License.txt | 2 +- Libraries/oneDPL/stable_sort_by_key/License.txt | 2 +- License.txt | 2 +- Tools/SystemDebug/system_debug_sample/License.txt | 2 +- Tools/SystemDebug/system_debug_sample_build/License.txt | 2 +- 23 files changed, 23 insertions(+), 23 deletions(-) diff --git a/DirectProgramming/C++/CombinationalLogic/MandelbrotOMP/license.txt b/DirectProgramming/C++/CombinationalLogic/MandelbrotOMP/license.txt index 65315c87a4..9cde07f558 100644 --- a/DirectProgramming/C++/CombinationalLogic/MandelbrotOMP/license.txt +++ b/DirectProgramming/C++/CombinationalLogic/MandelbrotOMP/license.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/C++/CompilerInfrastructure/Intrinsics/license.txt b/DirectProgramming/C++/CompilerInfrastructure/Intrinsics/license.txt index 65315c87a4..9cde07f558 100644 --- a/DirectProgramming/C++/CompilerInfrastructure/Intrinsics/license.txt +++ b/DirectProgramming/C++/CompilerInfrastructure/Intrinsics/license.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/C++/GraphTraversal/MergesortOMP/license.txt b/DirectProgramming/C++/GraphTraversal/MergesortOMP/license.txt index 65315c87a4..9cde07f558 100644 --- a/DirectProgramming/C++/GraphTraversal/MergesortOMP/license.txt +++ b/DirectProgramming/C++/GraphTraversal/MergesortOMP/license.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/CombinationalLogic/mandelbrot/License.txt b/DirectProgramming/DPC++/CombinationalLogic/mandelbrot/License.txt index 8f608e972a..9cde07f558 100644 --- a/DirectProgramming/DPC++/CombinationalLogic/mandelbrot/License.txt +++ b/DirectProgramming/DPC++/CombinationalLogic/mandelbrot/License.txt @@ -1,4 +1,4 @@ -Copyright 2019 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/CombinationalLogic/sepia-filter/License.txt b/DirectProgramming/DPC++/CombinationalLogic/sepia-filter/License.txt index da5f7c1888..e63c6e13dc 100644 --- a/DirectProgramming/DPC++/CombinationalLogic/sepia-filter/License.txt +++ b/DirectProgramming/DPC++/CombinationalLogic/sepia-filter/License.txt @@ -1,4 +1,4 @@ -Copyright 2019 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/DenseLinearAlgebra/complex_mult/License.txt b/DirectProgramming/DPC++/DenseLinearAlgebra/complex_mult/License.txt index 65315c87a4..9cde07f558 100644 --- a/DirectProgramming/DPC++/DenseLinearAlgebra/complex_mult/License.txt +++ b/DirectProgramming/DPC++/DenseLinearAlgebra/complex_mult/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/DenseLinearAlgebra/matrix_mul/License.txt b/DirectProgramming/DPC++/DenseLinearAlgebra/matrix_mul/License.txt index 65315c87a4..9cde07f558 100644 --- a/DirectProgramming/DPC++/DenseLinearAlgebra/matrix_mul/License.txt +++ b/DirectProgramming/DPC++/DenseLinearAlgebra/matrix_mul/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/DenseLinearAlgebra/simple-add/License.txt b/DirectProgramming/DPC++/DenseLinearAlgebra/simple-add/License.txt index 65315c87a4..9cde07f558 100644 --- a/DirectProgramming/DPC++/DenseLinearAlgebra/simple-add/License.txt +++ b/DirectProgramming/DPC++/DenseLinearAlgebra/simple-add/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/DenseLinearAlgebra/vector-add/License.txt b/DirectProgramming/DPC++/DenseLinearAlgebra/vector-add/License.txt index 8f608e972a..9cde07f558 100644 --- a/DirectProgramming/DPC++/DenseLinearAlgebra/vector-add/License.txt +++ b/DirectProgramming/DPC++/DenseLinearAlgebra/vector-add/License.txt @@ -1,4 +1,4 @@ -Copyright 2019 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/GraphTraversal/bitonic-sort/License.txt b/DirectProgramming/DPC++/GraphTraversal/bitonic-sort/License.txt index 6e9524bd74..415025cf03 100644 --- a/DirectProgramming/DPC++/GraphTraversal/bitonic-sort/License.txt +++ b/DirectProgramming/DPC++/GraphTraversal/bitonic-sort/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/SpectralMethods/DiscreteCosineTransform/license.txt b/DirectProgramming/DPC++/SpectralMethods/DiscreteCosineTransform/license.txt index 65315c87a4..9cde07f558 100644 --- a/DirectProgramming/DPC++/SpectralMethods/DiscreteCosineTransform/license.txt +++ b/DirectProgramming/DPC++/SpectralMethods/DiscreteCosineTransform/license.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/StructuredGrids/1d_HeatTransfer/License.txt b/DirectProgramming/DPC++/StructuredGrids/1d_HeatTransfer/License.txt index 0578223382..415025cf03 100644 --- a/DirectProgramming/DPC++/StructuredGrids/1d_HeatTransfer/License.txt +++ b/DirectProgramming/DPC++/StructuredGrids/1d_HeatTransfer/License.txt @@ -1,4 +1,4 @@ -Copyright 2019 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/StructuredGrids/iso2dfd_dpcpp/License.txt b/DirectProgramming/DPC++/StructuredGrids/iso2dfd_dpcpp/License.txt index 6e9524bd74..415025cf03 100644 --- a/DirectProgramming/DPC++/StructuredGrids/iso2dfd_dpcpp/License.txt +++ b/DirectProgramming/DPC++/StructuredGrids/iso2dfd_dpcpp/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/StructuredGrids/iso3dfd_dpcpp/License.txt b/DirectProgramming/DPC++/StructuredGrids/iso3dfd_dpcpp/License.txt index 148940418d..e63c6e13dc 100644 --- a/DirectProgramming/DPC++/StructuredGrids/iso3dfd_dpcpp/License.txt +++ b/DirectProgramming/DPC++/StructuredGrids/iso3dfd_dpcpp/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/DPC++/StructuredGrids/particle-diffusion/License.txt b/DirectProgramming/DPC++/StructuredGrids/particle-diffusion/License.txt index 148940418d..e63c6e13dc 100644 --- a/DirectProgramming/DPC++/StructuredGrids/particle-diffusion/License.txt +++ b/DirectProgramming/DPC++/StructuredGrids/particle-diffusion/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/Fortran/openmp_samples/License.txt b/DirectProgramming/Fortran/openmp_samples/License.txt index 6e9524bd74..415025cf03 100644 --- a/DirectProgramming/Fortran/openmp_samples/License.txt +++ b/DirectProgramming/Fortran/openmp_samples/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/Fortran/optimize_samples/License.txt b/DirectProgramming/Fortran/optimize_samples/License.txt index 6e9524bd74..415025cf03 100644 --- a/DirectProgramming/Fortran/optimize_samples/License.txt +++ b/DirectProgramming/Fortran/optimize_samples/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/DirectProgramming/Fortran/vec_samples/License.txt b/DirectProgramming/Fortran/vec_samples/License.txt index 6e9524bd74..415025cf03 100644 --- a/DirectProgramming/Fortran/vec_samples/License.txt +++ b/DirectProgramming/Fortran/vec_samples/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/Libraries/oneDPL/gamma-correction/License.txt b/Libraries/oneDPL/gamma-correction/License.txt index 8f608e972a..9cde07f558 100644 --- a/Libraries/oneDPL/gamma-correction/License.txt +++ b/Libraries/oneDPL/gamma-correction/License.txt @@ -1,4 +1,4 @@ -Copyright 2019 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/Libraries/oneDPL/stable_sort_by_key/License.txt b/Libraries/oneDPL/stable_sort_by_key/License.txt index 8f608e972a..9cde07f558 100644 --- a/Libraries/oneDPL/stable_sort_by_key/License.txt +++ b/Libraries/oneDPL/stable_sort_by_key/License.txt @@ -1,4 +1,4 @@ -Copyright 2019 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/License.txt b/License.txt index da5f7c1888..e63c6e13dc 100644 --- a/License.txt +++ b/License.txt @@ -1,4 +1,4 @@ -Copyright 2019 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/Tools/SystemDebug/system_debug_sample/License.txt b/Tools/SystemDebug/system_debug_sample/License.txt index 65315c87a4..9cde07f558 100644 --- a/Tools/SystemDebug/system_debug_sample/License.txt +++ b/Tools/SystemDebug/system_debug_sample/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: diff --git a/Tools/SystemDebug/system_debug_sample_build/License.txt b/Tools/SystemDebug/system_debug_sample_build/License.txt index 65315c87a4..9cde07f558 100644 --- a/Tools/SystemDebug/system_debug_sample_build/License.txt +++ b/Tools/SystemDebug/system_debug_sample_build/License.txt @@ -1,4 +1,4 @@ -Copyright 2020 Intel Corporation +Copyright Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: From 0032b0b04e82722e040a7cee8472a3ee524f8d49 Mon Sep 17 00:00:00 2001 From: JoeOster <52936608+JoeOster@users.noreply.github.com> Date: Wed, 19 Aug 2020 13:33:11 -0700 Subject: [PATCH 2/5] Update README.md --- README.md | 85 +++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 83 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 1fe987a98d..e5b25795c2 100644 --- a/README.md +++ b/README.md @@ -1,2 +1,83 @@ -oneAPI-samples -This is the readme. +|Code sample name |Supported Intel(r) Architecture(s) |Description | +|-----------------------|-------------------------------------------|---------------| +|DirectPrograming/ | +|../DPC++/CombinationalLogic/Mandelbrot |GPU, CPU |Example of a fractal in mathematics | +|../DPC++/CombinationalLogic/Sepia-filter |GPU, CPU |Color image conversion using 1D range | +|../DPC++/DenseLinearAlgebra/Complex_mult |GPU, CPU |Complex number Multiplication | +|../DPC++/DenseLinearAlgebra/Matrix_mul |GPU, CPU |Simple program that multiplies two large matrices in parallel using DPC++, OpenMP and MKL | +|../DPC++/DenseLinearAlgebra/Simple-add |FPGA, GPU, CPU |Simple Add program | +|../DPC++/DenseLinearAlgebra/Vector-add |FPGA, GPU, CPU |Simple Vector add program | +|../DPC++/GraphTraversal/Bitonic-sort |GPU, CPU |Implementation of bitonic sort using DPC++. | +|../DPC++/ParallelPatterns/Dpc_reduce |GPU, CPU |A simple program that calculates pi, implemented using C++ and DPC++. | +|../DPC++/SpectralMethods/Discrete-cosine-transform |GPU, CPU |Image processing algorithm used in JPEG compression | +|../DPC++/StructuredGrids/1d_HeatTransfer |GPU, CPU |A simulation of one dimensional heat transfer process using DPC++. | +|../DPC++/StructuredGrids/ISO2DFD_DPCPP |GPU, CPU |A simple finite difference stencil kernel for solving 2D acoustic isotropic wave equation using DPC++ | +|../DPC++/StructuredGrids/ISO3DFD_DPCPP |GPU, CPU |A finite difference stencil kernel for solving 3D acoustic isotropic wave equation using DPC++ | +|../DPC++/StructuredGrids/Particle-diffusion |GPU, CPU |A simple implementation of a Monte Carlo simulation of the diffusion of water molecules in tissue | +|../C++/CombinationalLogic/Mandelbrot |CPU |Demonstrates how to accelerate Mandelbrot performance with SIMD and parallelization using OpenMP*. | +|../C++/CompilerInfrastructure/Intrinsics |CPU |Shows how to utilize the intrinsics supported by C++ compiler in a variety of applications. | +|../C++/GraphTraversal/Mergesort |CPU |Shows how to accelerate scalar merge sort program using OpenMP tasks | +|../FPGA/FPGATutorials/BestPractices/double_buffering |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/BestPractices/local_memory_cache |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/BestPractices/n_way_buffering |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/BestPractices/remove_loop_carried_dependency |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/BestPractices/triangular_loop |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/Compilation/compile_flow |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/Compilation/device_link |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/Compilation/use_library |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/FPGAExtensions/LoopAttributes/loop_ivdep |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/FPGAExtensions/LoopAttributes/loop_unroll |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/FPGAExtensions/LoopAttributes/max_concurrency |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/FPGAExtensions/Other/fpga_register |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/FPGAExtensions/Other/no_accessor_aliasing |FPGA, CPU |See details under FPGA Tutorials | +|../FPGA/FPGATutorials/FPGAExtensions/Other/system_profiling |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/FPGAExtensions/MemoryAttributes/memory_attributes_overview |FPGA, CPU |See details under FPGATutorials | +|../FPGA/FPGATutorials/FPGAExtensions/Pipes/pipe_array |FPGA |See details under FPGATutorials | +|../FPGA/FPGATutorials/FPGAExtensions/Pipes/pipes |FPGA |See details under FPGATutorials | +|../FPGA/FPGAExampleDesigns/crr |FPGA, CPU |See details under FPGAExampleDesigns | +|../FPGA/FPGAExampleDesigns/gzip |FPGA |See details under FPGAExampleDesigns | +|../FPGA/FPGAExampleDesigns/grd |FPGA, CPU |See details under FPGAExampleDesigns | +|Libraries | +|../oneDPL/Gamma-correction |GPU, CPU |gamma correction using Parallel STL | +|../oneDPL/Stable_sort_by_key |GPU, CPU |stable sort by key using counting_iterator and zip_iterator | +|../oneVPL/hello-decode |CPU |shows how to use oneVPL to perform a simple video decode | +|../oneVPL/hello-encode |CPU |shows how to use oneVPL to perform a simple video encode | +|Tools | +|../ApplicationDebugger/Debugger/array-transform |GPU, CPU |Array transform | +|../IoTConnectionTools/Analog-in |CPU |Analog pin input example using Eclipse* MRAA | +|../IoTConnectionTools/Digital In |CPU |GPIO pin input example using Eclipse* MRAA | +|../IoTConnectionTools/Digital Out |CPU |GPIO pin output example using Eclipse* MRAA | +|../IoTConnectionTools/Hello IoT World |CPU |Basic example that prints the compiler used during build | +|../IoTConnectionTools/Interrupt |CPU |Interrupt Service Routine example using Eclipse* MRAA | +|../IoTConnectionTools/Onboard Blink |CPU |Built-in LED blink for common IoT boards using Eclipse* MRAA | +|../IoTConnectionTools/PWM |CPU |Pulse Width Modulation pin output using Eclipse* MRAA | +|../IoTConnectionTools/Up2 LEDs |CPU |Built-in LED example for UP* Squared using Eclipse* MRAA | +|../SystemDebug/System Debug Sample Build |UEFI |Basic example that showcases the features of the Intel® System Debugger | + +#License + +The code samples are licensed under MIT license + +#Known issues or limitations + +##On Windows Platform +1. If you are using Visual Studio 2019, Visual Studio 2019 version 16.3.0 or newer is required. +2. To build samples on Windows, the required Windows SDK is ver. 10.0.17763.0. + + 1. If the SDK is not installed, use the following instructions below to avoid build failure: + + 1. Open the "code sample's" .sln from within Visual Studio 2017 or 2019, + 2. Right-click on the project name in "Solution Explorer" and select "Properties" + + 2. The project property dialog opens. + + 1. Select the "General" tab on the left, + 2. Select on the right side of the dialog box "Windows SDK Version"(2nd Item". + 3. Click on the drop-down icon to select a version that is installed on your system. + 4. click on [Ok] to save. + +3. Now you should be able to build the code sample. +4. For beta, FPGA samples support Windows through FPGA-emulator. +5. If you encounter a compilation error like below when building a sample program, one reason is that the directory path of the sample is too long; the work around is to move the sample to a directory like "c:\temp\sample_name". + * Error MSB6003 The specified task executable "dpcpp-cl.exe" could not be run ...... + From dadbdab1956969a3abd099a1e88f6ae7f5f62c46 Mon Sep 17 00:00:00 2001 From: akertesz <67655634+akertesz@users.noreply.github.com> Date: Wed, 19 Aug 2020 18:19:49 -0400 Subject: [PATCH 3/5] Fix FPGA entries --- README.md | 44 +++++++++++++++++++++++--------------------- 1 file changed, 23 insertions(+), 21 deletions(-) diff --git a/README.md b/README.md index e5b25795c2..9d1937f790 100644 --- a/README.md +++ b/README.md @@ -1,4 +1,4 @@ -|Code sample name |Supported Intel(r) Architecture(s) |Description | +|Code Sample |Supported Intel(r) Architecture(s) |Description | |-----------------------|-------------------------------------------|---------------| |DirectPrograming/ | |../DPC++/CombinationalLogic/Mandelbrot |GPU, CPU |Example of a fractal in mathematics | @@ -14,29 +14,31 @@ |../DPC++/StructuredGrids/ISO2DFD_DPCPP |GPU, CPU |A simple finite difference stencil kernel for solving 2D acoustic isotropic wave equation using DPC++ | |../DPC++/StructuredGrids/ISO3DFD_DPCPP |GPU, CPU |A finite difference stencil kernel for solving 3D acoustic isotropic wave equation using DPC++ | |../DPC++/StructuredGrids/Particle-diffusion |GPU, CPU |A simple implementation of a Monte Carlo simulation of the diffusion of water molecules in tissue | +|../DPC++FPGA/ReferenceDesigns/crr |FPGA |High-performance CRR binomial tree option pricing model using DPC++ on FPGA| +|../DPC++FPGA/ReferenceDesigns/gzip |FPGA |High-performance GZIP compression using DPC++ on FPGA| +|../DPC++FPGA/ReferenceDesigns/qrd |FPGA |High-performance QR decomposition of matrices using DPC++ on FPGA| +|../DPC++FPGA/Tutorials/GettingStarted/fpga_compile |FPGA |Tutorial introducing how to compile DPC++ for FPGA | +|../DPC++FPGA/Tutorials/GettingStarted/fast_recompile |FPGA |Tutorial introducing host-only recompile to save DPC++ development time on FPGA | +|../DPC++FPGA/Tutorials/Tools/use_library |FPGA |Tutorial showing how to use cross-language libraries in DPC++ on FPGA | +|../DPC++FPGA/Tutorials/Tools/system_profiling |FPGA |Tutorial showing how to use the OpenCL Intercept Layer to profile DPC++ designs running on FPGA | +|../DPC++FPGA/Tutorials/DesignPatterns/double_buffering |FPGA |Tutorial demonstrating how to overlap kernel execution with buffer transfers and host processing | +|../DPC++FPGA/Tutorials/DesignPatterns/n_way_buffering |FPGA |Tutorial demonstrating an extension of double buffering to n-way buffering | +|../DPC++FPGA/Tutorials/DesignPatterns/onchip_memory_cache |FPGA |Tutorial demonstrating the caching of on-chip memory to reduce loop initiation interval on FPGA | +|../DPC++FPGA/Tutorials/DesignPatterns/pipe_array |FPGA |Tutorial demonstrating how to create an array of pipes | +|../DPC++FPGA/Tutorials/DesignPatterns/remove_loop_carried_dependency |FPGA |Tutorial demonstrating a technique to optimize performance by removing loop carried dependencies | +|../DPC++FPGA/Tutorials/DesignPatterns/triangular_loop |FPGA |Tutorial demonstrating an advanced FPGA optimization technique for triangular loops | +|../DPC++FPGA/Tutorials/Features/fpga_reg |FPGA |Tutorial demonstrating the use of the DPC++ FPGA power user extension intel::fpga_reg | +|../DPC++FPGA/Tutorials/Features/kernel_args_restrict |FPGA |Tutorial demonstrating how to avoid performance penalties due to kernel argument aliasing | +|../DPC++FPGA/Tutorials/Features/loop_coalesce |FPGA |Tutorial demonstrating the DPC++ FPGA loop_coalesce attribute | +|../DPC++FPGA/Tutorials/Features/loop_ivdep |FPGA |Tutorial demonstrating the use of the loop ivdep attribute | +|../DPC++FPGA/Tutorials/Features/loop_unroll |FPGA |Tutorial demonstrating the DPC++ unroll pragma and its performance trade-offs on FPGA | +|../DPC++FPGA/Tutorials/Features/max_concurrency |FPGA |Tutorial demonstrating the DPC++ FPGA max_concurrency attribute | +|../DPC++FPGA/Tutorials/Features/memory_attributes |FPGA |Tutorial demonstrating how to use DPC++ FPGA memory attributes | +|../DPC++FPGA/Tutorials/Features/pipes |FPGA |Tutorial demonstrating the DPC++ FPGA pipes extension to transfer data between kernels | +|../DPC++FPGA/Tutorials/Features/speculated_iterations |FPGA |Tutorial demonstrating the DPC++ FPGA speculated_iterations attribute | |../C++/CombinationalLogic/Mandelbrot |CPU |Demonstrates how to accelerate Mandelbrot performance with SIMD and parallelization using OpenMP*. | |../C++/CompilerInfrastructure/Intrinsics |CPU |Shows how to utilize the intrinsics supported by C++ compiler in a variety of applications. | |../C++/GraphTraversal/Mergesort |CPU |Shows how to accelerate scalar merge sort program using OpenMP tasks | -|../FPGA/FPGATutorials/BestPractices/double_buffering |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/BestPractices/local_memory_cache |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/BestPractices/n_way_buffering |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/BestPractices/remove_loop_carried_dependency |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/BestPractices/triangular_loop |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/Compilation/compile_flow |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/Compilation/device_link |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/Compilation/use_library |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/FPGAExtensions/LoopAttributes/loop_ivdep |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/FPGAExtensions/LoopAttributes/loop_unroll |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/FPGAExtensions/LoopAttributes/max_concurrency |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/FPGAExtensions/Other/fpga_register |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/FPGAExtensions/Other/no_accessor_aliasing |FPGA, CPU |See details under FPGA Tutorials | -|../FPGA/FPGATutorials/FPGAExtensions/Other/system_profiling |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/FPGAExtensions/MemoryAttributes/memory_attributes_overview |FPGA, CPU |See details under FPGATutorials | -|../FPGA/FPGATutorials/FPGAExtensions/Pipes/pipe_array |FPGA |See details under FPGATutorials | -|../FPGA/FPGATutorials/FPGAExtensions/Pipes/pipes |FPGA |See details under FPGATutorials | -|../FPGA/FPGAExampleDesigns/crr |FPGA, CPU |See details under FPGAExampleDesigns | -|../FPGA/FPGAExampleDesigns/gzip |FPGA |See details under FPGAExampleDesigns | -|../FPGA/FPGAExampleDesigns/grd |FPGA, CPU |See details under FPGAExampleDesigns | |Libraries | |../oneDPL/Gamma-correction |GPU, CPU |gamma correction using Parallel STL | |../oneDPL/Stable_sort_by_key |GPU, CPU |stable sort by key using counting_iterator and zip_iterator | From 11fdd3b55d3fa56278ea65ab79997fcfd97f5edb Mon Sep 17 00:00:00 2001 From: JoeOster <52936608+JoeOster@users.noreply.github.com> Date: Thu, 20 Aug 2020 12:57:12 -0700 Subject: [PATCH 4/5] Update README.md Updates per request of sranikonda --- README.md | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/README.md b/README.md index 9d1937f790..8af0181245 100644 --- a/README.md +++ b/README.md @@ -63,23 +63,10 @@ The code samples are licensed under MIT license #Known issues or limitations ##On Windows Platform -1. If you are using Visual Studio 2019, Visual Studio 2019 version 16.3.0 or newer is required. +1. If you are using Visual Studio 2019, Visual Studio 2019 version 16.4.0 or newer is required. 2. To build samples on Windows, the required Windows SDK is ver. 10.0.17763.0. - - 1. If the SDK is not installed, use the following instructions below to avoid build failure: - - 1. Open the "code sample's" .sln from within Visual Studio 2017 or 2019, - 2. Right-click on the project name in "Solution Explorer" and select "Properties" - - 2. The project property dialog opens. - - 1. Select the "General" tab on the left, - 2. Select on the right side of the dialog box "Windows SDK Version"(2nd Item". - 3. Click on the drop-down icon to select a version that is installed on your system. - 4. click on [Ok] to save. - 3. Now you should be able to build the code sample. 4. For beta, FPGA samples support Windows through FPGA-emulator. 5. If you encounter a compilation error like below when building a sample program, one reason is that the directory path of the sample is too long; the work around is to move the sample to a directory like "c:\temp\sample_name". - * Error MSB6003 The specified task executable "dpcpp-cl.exe" could not be run ...... + * Error MSB6003 The specified task executable "dpcpp.exe" could not be run ...... From c9f8629a26fb2562927fd4c27a75eea09a2a5b10 Mon Sep 17 00:00:00 2001 From: JoeOster <52936608+JoeOster@users.noreply.github.com> Date: Sun, 23 Aug 2020 07:52:06 -0700 Subject: [PATCH 5/5] Update README.md --- README.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/README.md b/README.md index 8af0181245..ee7e072fe3 100644 --- a/README.md +++ b/README.md @@ -56,13 +56,13 @@ |../IoTConnectionTools/Up2 LEDs |CPU |Built-in LED example for UP* Squared using Eclipse* MRAA | |../SystemDebug/System Debug Sample Build |UEFI |Basic example that showcases the features of the Intel® System Debugger | -#License +# License The code samples are licensed under MIT license -#Known issues or limitations +# Known issues or limitations -##On Windows Platform +## On Windows Platform 1. If you are using Visual Studio 2019, Visual Studio 2019 version 16.4.0 or newer is required. 2. To build samples on Windows, the required Windows SDK is ver. 10.0.17763.0. 3. Now you should be able to build the code sample.