From 84906681f378dd374c1e7db9ac0a394ad3b718b8 Mon Sep 17 00:00:00 2001 From: Jay Foad Date: Tue, 21 May 2024 13:12:18 +0100 Subject: [PATCH] [AMDGPU] Remove #if 0 code for buffer stores in SIInsertWaitcnts --- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp index 5577ce9eb1282..89076c110e46e 100644 --- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp +++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp @@ -900,18 +900,6 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII, } } } -#if 0 // TODO: check if this is handled by MUBUF code above. - } else if (Inst.getOpcode() == AMDGPU::BUFFER_STORE_DWORD || - Inst.getOpcode() == AMDGPU::BUFFER_STORE_DWORDX2 || - Inst.getOpcode() == AMDGPU::BUFFER_STORE_DWORDX4) { - MachineOperand *MO = TII->getNamedOperand(Inst, AMDGPU::OpName::data); - unsigned OpNo;//TODO: find the OpNo for this operand; - RegInterval Interval = getRegInterval(&Inst, MRI, TRI, OpNo); - for (int RegNo = Interval.first; RegNo < Interval.second; - ++RegNo) { - setRegScore(RegNo + NUM_ALL_VGPRS, t, CurrScore); - } -#endif } else /* LGKM_CNT || EXP_CNT || VS_CNT || NUM_INST_CNTS */ { // Match the score to the destination registers. for (unsigned I = 0, E = Inst.getNumOperands(); I != E; ++I) {