From d60bb01ae557b310719b8eecdc8694c48948efa9 Mon Sep 17 00:00:00 2001 From: Rose Date: Thu, 2 May 2024 13:31:20 -0400 Subject: [PATCH 1/2] [InstCombine] Pre-commit tests (NFC) --- llvm/test/Transforms/InstCombine/add.ll | 29 ++++++++++++++++++++----- 1 file changed, 23 insertions(+), 6 deletions(-) diff --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll index 239e14682c306..54c64c3f02f88 100644 --- a/llvm/test/Transforms/InstCombine/add.ll +++ b/llvm/test/Transforms/InstCombine/add.ll @@ -1435,11 +1435,26 @@ define i32 @and31_add_sexts(i1 %x, i1 %y) { ret i32 %r } -; Negative test - extra use - define i32 @lshr_add_use_sexts(i1 %x, i1 %y, ptr %p) { ; CHECK-LABEL: @lshr_add_use_sexts( ; CHECK-NEXT: [[XS:%.*]] = sext i1 [[X:%.*]] to i32 +; CHECK-NEXT: [[YS:%.*]] = sext i1 [[Y:%.*]] to i32 +; CHECK-NEXT: store i32 [[YS]], ptr [[P:%.*]], align 4 +; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[XS]], [[YS]] +; CHECK-NEXT: [[R:%.*]] = lshr i32 [[SUB]], 31 +; CHECK-NEXT: ret i32 [[R]] +; + %xs = sext i1 %x to i32 + %ys = sext i1 %y to i32 + store i32 %ys, ptr %p + %sub = add i32 %xs, %ys + %r = lshr i32 %sub, 31 + ret i32 %r +} + +define i32 @lshr_add_use_sexts_2(i1 %x, i1 %y, ptr %p) { +; CHECK-LABEL: @lshr_add_use_sexts_2( +; CHECK-NEXT: [[XS:%.*]] = sext i1 [[X:%.*]] to i32 ; CHECK-NEXT: store i32 [[XS]], ptr [[P:%.*]], align 4 ; CHECK-NEXT: [[YS:%.*]] = sext i1 [[Y:%.*]] to i32 ; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[XS]], [[YS]] @@ -1456,18 +1471,20 @@ define i32 @lshr_add_use_sexts(i1 %x, i1 %y, ptr %p) { ; Negative test - extra use -define i32 @lshr_add_use2_sexts(i1 %x, i1 %y, ptr %p) { -; CHECK-LABEL: @lshr_add_use2_sexts( +declare void @use_sexts(i32, i32) + +define i32 @lshr_add_use_sexts_both(i1 %x, i1 %y) { +; CHECK-LABEL: @lshr_add_use_sexts_both( ; CHECK-NEXT: [[XS:%.*]] = sext i1 [[X:%.*]] to i32 ; CHECK-NEXT: [[YS:%.*]] = sext i1 [[Y:%.*]] to i32 -; CHECK-NEXT: store i32 [[YS]], ptr [[P:%.*]], align 4 +; CHECK-NEXT: call void @use_sexts(i32 [[XS]], i32 [[YS]]) ; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[XS]], [[YS]] ; CHECK-NEXT: [[R:%.*]] = lshr i32 [[SUB]], 31 ; CHECK-NEXT: ret i32 [[R]] ; %xs = sext i1 %x to i32 %ys = sext i1 %y to i32 - store i32 %ys, ptr %p + call void @use_sexts(i32 %xs, i32 %ys) %sub = add i32 %xs, %ys %r = lshr i32 %sub, 31 ret i32 %r From 03c8939ed832d2bf946973e21b58822bdbffdd92 Mon Sep 17 00:00:00 2001 From: Rose Date: Sun, 5 May 2024 22:13:50 -0400 Subject: [PATCH 2/2] [InstCombine] Remove one-use requirement for add iN (sext i1 X), (sext i1 Y) --> sext (X | Y) to iN Since these remove instructions, we can forgo the one-use check, as long as at least ONE of the two sexts are one-use. --- .../InstCombine/InstCombineSimplifyDemanded.cpp | 8 ++++---- llvm/test/Transforms/InstCombine/add.ll | 10 ++++------ 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp index 35425c5d0882e..bfe5db3547cd5 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp @@ -499,10 +499,10 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask, } // add iN (sext i1 X), (sext i1 Y) --> sext (X | Y) to iN - // TODO: Relax the one-use checks because we are removing an instruction? - if (match(I, m_Add(m_OneUse(m_SExt(m_Value(X))), - m_OneUse(m_SExt(m_Value(Y))))) && - X->getType()->isIntOrIntVectorTy(1) && X->getType() == Y->getType()) { + if (match(I, m_Add(m_SExt(m_Value(X)), m_SExt(m_Value(Y)))) && + X->getType()->isIntOrIntVectorTy(1) && X->getType() == Y->getType() && + (I->getOperand(0)->hasOneUse() || I->getOperand(1)->hasOneUse())) { + // Truth table for inputs and output signbits: // X:0 | X:1 // ----------- diff --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll index 54c64c3f02f88..8b3ecaf25cd9d 100644 --- a/llvm/test/Transforms/InstCombine/add.ll +++ b/llvm/test/Transforms/InstCombine/add.ll @@ -1437,11 +1437,10 @@ define i32 @and31_add_sexts(i1 %x, i1 %y) { define i32 @lshr_add_use_sexts(i1 %x, i1 %y, ptr %p) { ; CHECK-LABEL: @lshr_add_use_sexts( -; CHECK-NEXT: [[XS:%.*]] = sext i1 [[X:%.*]] to i32 ; CHECK-NEXT: [[YS:%.*]] = sext i1 [[Y:%.*]] to i32 ; CHECK-NEXT: store i32 [[YS]], ptr [[P:%.*]], align 4 -; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[XS]], [[YS]] -; CHECK-NEXT: [[R:%.*]] = lshr i32 [[SUB]], 31 +; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[X:%.*]], [[Y]] +; CHECK-NEXT: [[R:%.*]] = zext i1 [[TMP1]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %xs = sext i1 %x to i32 @@ -1456,9 +1455,8 @@ define i32 @lshr_add_use_sexts_2(i1 %x, i1 %y, ptr %p) { ; CHECK-LABEL: @lshr_add_use_sexts_2( ; CHECK-NEXT: [[XS:%.*]] = sext i1 [[X:%.*]] to i32 ; CHECK-NEXT: store i32 [[XS]], ptr [[P:%.*]], align 4 -; CHECK-NEXT: [[YS:%.*]] = sext i1 [[Y:%.*]] to i32 -; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[XS]], [[YS]] -; CHECK-NEXT: [[R:%.*]] = lshr i32 [[SUB]], 31 +; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[X]], [[Y:%.*]] +; CHECK-NEXT: [[R:%.*]] = zext i1 [[TMP1]] to i32 ; CHECK-NEXT: ret i32 [[R]] ; %xs = sext i1 %x to i32