From bcdfa80ff5082a32a6c0eb89b4cd818ce5288658 Mon Sep 17 00:00:00 2001 From: Eleanor Bonnici Date: Tue, 5 Dec 2023 17:13:22 +0000 Subject: [PATCH 1/5] [llvm][MC][ARM] Don't autoresolve fixups Removes logic that caused some fixups to be marked as resolved in the assembler without actually resolving them. Sometimes to resolve these fixups a relocation was needed, which was not generated, resulting in invalid code. Now in situations when the fixup cannot be resolved by the assembler, either a relocation is generated, or an error is produced. This was partially addressed previously (https://github.com/llvm/llvm-project/pull/72873/, https://github.com/llvm/llvm-project/pull/73834) specifically for LDRx and ADR instructions, This patch expands it LDRD and VLDR, which should cover all instructions affected. --- .../Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 20 +++--- .../Target/ARM/MCTargetDesc/ARMFixupKinds.h | 2 +- llvm/test/MC/ARM/pcrel-arm-ldrd-relocs.s | 30 +++++++++ llvm/test/MC/ARM/pcrel-global.s | 6 +- llvm/test/MC/ARM/pcrel-ldr-relocs.s | 8 +-- llvm/test/MC/ARM/pcrel-ldrd-same-section.s | 39 ++++++++++++ llvm/test/MC/ARM/pcrel-thumb-ldrd-relocs.s | 6 ++ llvm/test/MC/ARM/pcrel-vldr-diff-section.s | 15 +++++ llvm/test/MC/ARM/pcrel-vldr-same-section.s | 62 +++++++++++++++++++ 9 files changed, 169 insertions(+), 19 deletions(-) create mode 100644 llvm/test/MC/ARM/pcrel-arm-ldrd-relocs.s create mode 100644 llvm/test/MC/ARM/pcrel-ldrd-same-section.s create mode 100644 llvm/test/MC/ARM/pcrel-thumb-ldrd-relocs.s create mode 100644 llvm/test/MC/ARM/pcrel-vldr-diff-section.s create mode 100644 llvm/test/MC/ARM/pcrel-vldr-same-section.s diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp index 534434fef5ac8..1d17bb349f24b 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp @@ -67,8 +67,6 @@ ARMAsmBackendELF::getFixupKind(StringRef Name) const { } const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const { - unsigned IsPCRelConstant = - MCFixupKindInfo::FKF_IsPCRel | MCFixupKindInfo::FKF_Constant; const static MCFixupKindInfo InfosLE[ARM::NumTargetFixupKinds] = { // This table *must* be in the order that the fixup_* kinds are defined in // ARMFixupKinds.h. @@ -79,13 +77,14 @@ const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const { MCFixupKindInfo::FKF_IsPCRel | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, {"fixup_arm_pcrel_10_unscaled", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, - {"fixup_arm_pcrel_10", 0, 32, IsPCRelConstant}, + {"fixup_arm_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, {"fixup_t2_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, {"fixup_arm_pcrel_9", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, {"fixup_t2_pcrel_9", 0, 32, - IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, + MCFixupKindInfo::FKF_IsPCRel | + MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, {"fixup_arm_ldst_abs_12", 0, 32, 0}, {"fixup_thumb_adr_pcrel_10", 0, 8, MCFixupKindInfo::FKF_IsPCRel | @@ -140,19 +139,22 @@ const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const { MCFixupKindInfo::FKF_IsPCRel | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, {"fixup_arm_pcrel_10_unscaled", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, - {"fixup_arm_pcrel_10", 0, 32, IsPCRelConstant}, + {"fixup_arm_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, {"fixup_t2_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, {"fixup_arm_pcrel_9", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, {"fixup_t2_pcrel_9", 0, 32, - IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, + MCFixupKindInfo::FKF_IsPCRel | + MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, {"fixup_arm_ldst_abs_12", 0, 32, 0}, {"fixup_thumb_adr_pcrel_10", 8, 8, - IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, - {"fixup_arm_adr_pcrel_12", 0, 32, IsPCRelConstant}, + MCFixupKindInfo::FKF_IsPCRel | + MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, + {"fixup_arm_adr_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, {"fixup_t2_adr_pcrel_12", 0, 32, - IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, + MCFixupKindInfo::FKF_IsPCRel | + MCFixupKindInfo::FKF_IsAlignedDownTo32Bits}, {"fixup_arm_condbranch", 8, 24, MCFixupKindInfo::FKF_IsPCRel}, {"fixup_arm_uncondbranch", 8, 24, MCFixupKindInfo::FKF_IsPCRel}, {"fixup_t2_condbranch", 0, 32, MCFixupKindInfo::FKF_IsPCRel}, diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h index 3bcea577b9b63..003d5414fab44 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h @@ -28,7 +28,7 @@ enum Fixups { // immediate). fixup_arm_pcrel_10, // Equivalent to fixup_arm_pcrel_10, accounting for the short-swapped encoding - // of Thumb2 instructions. + // of Thumb2 instructions. Also used by LDRD in Thumb mode. fixup_t2_pcrel_10, // 9-bit PC relative relocation for symbol addresses used in VFP instructions // where bit 0 not encoded (so it's encoded as an 8-bit immediate). diff --git a/llvm/test/MC/ARM/pcrel-arm-ldrd-relocs.s b/llvm/test/MC/ARM/pcrel-arm-ldrd-relocs.s new file mode 100644 index 0000000000000..ab217a9effa6e --- /dev/null +++ b/llvm/test/MC/ARM/pcrel-arm-ldrd-relocs.s @@ -0,0 +1,30 @@ +@ RUN: llvm-mc -filetype=obj -triple=armv7 %s -o %t +@ RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=ARM +@ RUN: llvm-objdump -d --triple=armv7 %t | FileCheck %s --check-prefix=ARM_ADDEND +@ RUN: llvm-mc -filetype=obj -triple=armebv7 %s -o %t +@ RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=ARM +@ RUN: llvm-objdump -d --triple=armebv7 %t | FileCheck %s --check-prefix=ARM_ADDEND + + .section .text.bar, "ax" + .balign 4 + .global bar + .type bar, %function + +bar: + ldrd r0, r1, foo1 @ arm_pcrel_10_unscaled + ldrd r0, r1, foo2-8 @ arm_pcrel_10_unscaled + bx lr + + .section .data.foo, "a", %progbits + .balign 4 + .global foo1 + .global foo2 +foo1: + .word 0x11223344, 0x55667788 +foo2: + .word 0x99aabbcc, 0xddeeff00 + +@ ARM: R_ARM_LDRS_PC_G0 + +@ ARM_ADDEND: ldrd r0, r1, [pc, #-8] +@ ARM_ADDEND: ldrd r0, r1, [pc, #-16] diff --git a/llvm/test/MC/ARM/pcrel-global.s b/llvm/test/MC/ARM/pcrel-global.s index 1e9e6e989356e..702f3d1bfa5b6 100644 --- a/llvm/test/MC/ARM/pcrel-global.s +++ b/llvm/test/MC/ARM/pcrel-global.s @@ -7,7 +7,7 @@ @ CHECK: There are no relocations in this file. @ DISASM-LABEL: : -@ DISASM-NEXT: ldr r0, [pc, #0x0] @ 0x8 +@ DISASM-NEXT: ldr r0, [pc, #0x0] @ 0x4 @ DISASM-NEXT: add r0, pc @ DISASM-NEXT: .word 0xfffffffb @@ GNU assembler creates an R_ARM_REL32 referencing bar. @@ -15,10 +15,6 @@ .syntax unified -.globl foo -foo: -vldr d0, foo @ arm_pcrel_10 - .thumb .thumb_func .type bar, %function diff --git a/llvm/test/MC/ARM/pcrel-ldr-relocs.s b/llvm/test/MC/ARM/pcrel-ldr-relocs.s index e0f27f2994999..4a182be128d54 100644 --- a/llvm/test/MC/ARM/pcrel-ldr-relocs.s +++ b/llvm/test/MC/ARM/pcrel-ldr-relocs.s @@ -34,10 +34,10 @@ .global bar .type bar, %function bar: - ldr r0, foo1 - ldrb r0, foo1 - ldr r0, foo2-8 - ldrb r0, foo1+8 + ldr r0, foo1 @ arm_ldst_pcrel_12 / t2_ldst_pcrel_12 + ldrb r0, foo1 @ arm_ldst_pcrel_12 / t2_ldst_pcrel_12 + ldr r0, foo2-8 @ arm_ldst_pcrel_12 / t2_ldst_pcrel_12 + ldrb r0, foo1+8 @ arm_ldst_pcrel_12 / t2_ldst_pcrel_12 bx lr .section .data.foo, "a", %progbits diff --git a/llvm/test/MC/ARM/pcrel-ldrd-same-section.s b/llvm/test/MC/ARM/pcrel-ldrd-same-section.s new file mode 100644 index 0000000000000..b176a7562d781 --- /dev/null +++ b/llvm/test/MC/ARM/pcrel-ldrd-same-section.s @@ -0,0 +1,39 @@ +@ RUN: llvm-mc -filetype=obj -o %t %s -triple=armv7 +@ RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=RELOC +@ RUN: llvm-objdump -d --triple=armv7 %t | FileCheck %s --check-prefix=ARM_OFFSET + +@ RUN: llvm-mc -filetype=obj -o %t %s -triple=armebv7 +@ RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=RELOC +@ RUN: llvm-objdump -d --triple=armebv7 %t | FileCheck %s --check-prefix=ARM_OFFSET + +@ RUN: llvm-mc -filetype=obj -o %t %s -triple=thumbv7 +@ RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=RELOC +@ RUN: llvm-objdump -d --triple=thumbv7 %t | FileCheck %s --check-prefix=THUMB_OFFSET + +@ RUN: llvm-mc -filetype=obj -o %y %s -triple=thumbebv7 +@ RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=RELOC +@ RUN: llvm-objdump -d --triple=thumbebv7 %t | FileCheck %s --check-prefix=THUMB_OFFSET + +baz: + .word 0x11223344, 0x55667788 +label: + + ldrd r0, r1, foo @ arm_pcrel_10_unscaled / t2_pcrel_10 + ldrd r0, r1, bar-8 @ arm_pcrel_10_unscaled / t2_pcrel_10 + + ldrd r0, r1, baz @ arm_pcrel_10_unscaled / t2_pcrel_10 + ldrd r0, r1, label-8 @ arm_pcrel_10_unscaled / t2_pcrel_10 +foo: + .word 0x11223344, 0x55667788 +bar: + +@ RELOC: There are no relocations in this file. + +@ ARM_OFFSET: ldrd r0, r1, [pc, #8] @ 0x18 +@ ARM_OFFSET: ldrd r0, r1, [pc, #4] @ 0x18 +@ ARM_OFFSET: ldrd r0, r1, [pc, #-24] @ 0x0 +@ ARM_OFFSET: ldrd r0, r1, [pc, #-28] @ 0x0 +@ THUMB_OFFSET: ldrd r0, r1, [pc, #12] @ 0x18 +@ THUMB_OFFSET: ldrd r0, r1, [pc, #8] @ 0x18 +@ THUMB_OFFSET: ldrd r0, r1, [pc, #-20] @ 0x0 +@ THUMB_OFFSET: ldrd r0, r1, [pc, #-24] @ 0x0 diff --git a/llvm/test/MC/ARM/pcrel-thumb-ldrd-relocs.s b/llvm/test/MC/ARM/pcrel-thumb-ldrd-relocs.s new file mode 100644 index 0000000000000..6b53595b055d5 --- /dev/null +++ b/llvm/test/MC/ARM/pcrel-thumb-ldrd-relocs.s @@ -0,0 +1,6 @@ +@ RUN: not llvm-mc -filetype=obj -o /dev/null %s 2>&1 -triple=thumbv7 | FileCheck %s +@ RUN: not llvm-mc -filetype=obj -o /dev/null %s 2>&1 -triple=thumbebv7 | FileCheck %s + + ldrd r0, r1, foo + +@ CHECK: :[[#@LINE-2]]:4: error: unsupported relocation type diff --git a/llvm/test/MC/ARM/pcrel-vldr-diff-section.s b/llvm/test/MC/ARM/pcrel-vldr-diff-section.s new file mode 100644 index 0000000000000..aa259b6e95f50 --- /dev/null +++ b/llvm/test/MC/ARM/pcrel-vldr-diff-section.s @@ -0,0 +1,15 @@ +@ RUN: not llvm-mc -filetype=obj -o /dev/null %s 2>&1 -triple=armv8.2a-eabi | FileCheck %s +@ RUN: not llvm-mc -filetype=obj -o /dev/null %s 2>&1 -triple=armebv8.2a-eabi | FileCheck %s +@ RUN: not llvm-mc -filetype=obj -o /dev/null %s 2>&1 -triple=thumbv8.2a-eabi | FileCheck %s +@ RUN: not llvm-mc -filetype=obj -o /dev/null %s 2>&1 -triple=thumbebv8.2a-eabi | FileCheck %s + + .arch_extension fp16 + +vldr s0, foo @ arm_pcrel_10 / t2_pcrel_10 +vldr d0, foo @ arm_pcrel_10 / t2_pcrel_10 +vldr.16 s0,foo @ arm_pcrel_9 / t2_pcrel_9 + +@ CHECK: :[[#@LINE-4]]:1: error: unsupported relocation type +@ CHECK: :[[#@LINE-4]]:1: error: unsupported relocation type +@ CHECK: :[[#@LINE-4]]:1: error: unsupported relocation type + diff --git a/llvm/test/MC/ARM/pcrel-vldr-same-section.s b/llvm/test/MC/ARM/pcrel-vldr-same-section.s new file mode 100644 index 0000000000000..493a34a1e46cb --- /dev/null +++ b/llvm/test/MC/ARM/pcrel-vldr-same-section.s @@ -0,0 +1,62 @@ +@ RUN: llvm-mc -filetype=obj -o %t %s -triple=armv8.2a-eabi +@ RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=RELOC +@ RUN: llvm-objdump -d --triple=armv8.2a-eabi --mattr=+fullfp16 %t | FileCheck %s --check-prefix=ARM_OFFSET +@ RUN: llvm-mc -filetype=obj -o %t %s -triple=armebv8.2a-eabi +@ RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=RELOC +@ RUN: llvm-objdump -d --triple=armebv8.2a-eabi --mattr=+fullfp16 %t | FileCheck %s --check-prefix=ARM_OFFSET +@ RUN: llvm-mc -filetype=obj -o %t %s -triple=thumbv8.2a-eabi +@ RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=RELOC +@ RUN: llvm-objdump -d --triple=thumbv8.2a-eabi --mattr=+fullfp16 %t | FileCheck %s --check-prefix=THUMB_OFFSET +@ RUN: llvm-mc -filetype=obj -o %y %s -triple=thumbebv8.2a-eabi +@ RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=RELOC +@ RUN: llvm-objdump -d --triple=thumbebv8.2a-eabi --mattr=+fullfp16 %t | FileCheck %s --check-prefix=THUMB_OFFSET + + .arch_extension fp16 +baz: + .word 0x11223344, 0x55667788 +label: + + vldr s0, foo @ arm_pcrel_10 / t2_pcrel_10 + vldr d0, foo @ arm_pcrel_10 / t2_pcrel_10 + vldr.16 s0, foo @ arm_pcrel_9 / t2_pcrel_9 + vldr s0, bar-8 + vldr d0, bar-8 + vldr.16 s0, bar-8 + vldr s0, baz + vldr d0, baz + vldr.16 s0, baz + vldr s0, label-8 + vldr d0, label-8 + vldr.16 s0, label-8 + +foo: + .word 0x11223344, 0x55667788 +bar: + +@ RELOC: There are no relocations in this file. + +@ ARM_OFFSET: vldr s0, [pc, #40] @ 0x38 +@ ARM_OFFSET: vldr d0, [pc, #36] @ 0x38 +@ ARM_OFFSET: vldr.16 s0, [pc, #32] @ 0x38 +@ ARM_OFFSET: vldr s0, [pc, #28] @ 0x38 +@ ARM_OFFSET: vldr d0, [pc, #24] @ 0x38 +@ ARM_OFFSET: vldr.16 s0, [pc, #20] @ 0x38 +@ ARM_OFFSET: vldr s0, [pc, #-40] @ 0x0 +@ ARM_OFFSET: vldr d0, [pc, #-44] @ 0x0 +@ ARM_OFFSET: vldr.16 s0, [pc, #-48] @ 0x0 +@ ARM_OFFSET: vldr s0, [pc, #-52] @ 0x0 +@ ARM_OFFSET: vldr d0, [pc, #-56] @ 0x0 +@ ARM_OFFSET: vldr.16 s0, [pc, #-60] @ 0x0 +@ THUMB_OFFSET: ldr s0, [pc, #44] @ 0x38 +@ THUMB_OFFSET: ldr d0, [pc, #40] @ 0x38 +@ THUMB_OFFSET: ldr.16 s0, [pc, #36] @ 0x38 +@ THUMB_OFFSET: ldr s0, [pc, #32] @ 0x38 +@ THUMB_OFFSET: ldr d0, [pc, #28] @ 0x38 +@ THUMB_OFFSET: ldr.16 s0, [pc, #24] @ 0x38 +@ THUMB_OFFSET: vldr s0, [pc, #-36] @ 0x0 +@ THUMB_OFFSET: vldr d0, [pc, #-40] @ 0x0 +@ THUMB_OFFSET: vldr.16 s0, [pc, #-44] @ 0x0 +@ THUMB_OFFSET: vldr s0, [pc, #-48] @ 0x0 +@ THUMB_OFFSET: vldr d0, [pc, #-52] @ 0x0 +@ THUMB_OFFSET: vldr.16 s0, [pc, #-56] @ 0x0 + From d331b0769f8a8dd8b3082342e0b9e2d106498003 Mon Sep 17 00:00:00 2001 From: Eleanor Bonnici Date: Tue, 2 Jan 2024 11:01:05 +0000 Subject: [PATCH 2/5] fixup! [llvm][MC][ARM] Don't autoresolve fixups --- .../{pcrel-arm-ldrd-relocs.s => pcrel-ldrd-diff-section.s} | 7 +++++++ llvm/test/MC/ARM/pcrel-thumb-ldrd-relocs.s | 6 ------ llvm/test/MC/ARM/pcrel-vldr-diff-section.s | 1 - llvm/test/MC/ARM/pcrel-vldr-same-section.s | 1 - 4 files changed, 7 insertions(+), 8 deletions(-) rename llvm/test/MC/ARM/{pcrel-arm-ldrd-relocs.s => pcrel-ldrd-diff-section.s} (69%) delete mode 100644 llvm/test/MC/ARM/pcrel-thumb-ldrd-relocs.s diff --git a/llvm/test/MC/ARM/pcrel-arm-ldrd-relocs.s b/llvm/test/MC/ARM/pcrel-ldrd-diff-section.s similarity index 69% rename from llvm/test/MC/ARM/pcrel-arm-ldrd-relocs.s rename to llvm/test/MC/ARM/pcrel-ldrd-diff-section.s index ab217a9effa6e..c2acd8b389631 100644 --- a/llvm/test/MC/ARM/pcrel-arm-ldrd-relocs.s +++ b/llvm/test/MC/ARM/pcrel-ldrd-diff-section.s @@ -1,3 +1,5 @@ +@ RUN: not llvm-mc -filetype=obj --defsym=ERR=1 -o /dev/null %s 2>&1 -triple=thumbv7 | FileCheck %s --check-prefix=ERR +@ RUN: not llvm-mc -filetype=obj --defsym=ERR=1 -o /dev/null %s 2>&1 -triple=thumbebv7 | FileCheck %s --check-prefix=ERR @ RUN: llvm-mc -filetype=obj -triple=armv7 %s -o %t @ RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=ARM @ RUN: llvm-objdump -d --triple=armv7 %t | FileCheck %s --check-prefix=ARM_ADDEND @@ -24,6 +26,11 @@ foo1: foo2: .word 0x99aabbcc, 0xddeeff00 +.ifdef ERR + @ ERR:[[#@LINE-14]]:5: error: unsupported relocation type + @ ERR:[[#@LINE-14]]:5: error: unsupported relocation type +.endif + @ ARM: R_ARM_LDRS_PC_G0 @ ARM_ADDEND: ldrd r0, r1, [pc, #-8] diff --git a/llvm/test/MC/ARM/pcrel-thumb-ldrd-relocs.s b/llvm/test/MC/ARM/pcrel-thumb-ldrd-relocs.s deleted file mode 100644 index 6b53595b055d5..0000000000000 --- a/llvm/test/MC/ARM/pcrel-thumb-ldrd-relocs.s +++ /dev/null @@ -1,6 +0,0 @@ -@ RUN: not llvm-mc -filetype=obj -o /dev/null %s 2>&1 -triple=thumbv7 | FileCheck %s -@ RUN: not llvm-mc -filetype=obj -o /dev/null %s 2>&1 -triple=thumbebv7 | FileCheck %s - - ldrd r0, r1, foo - -@ CHECK: :[[#@LINE-2]]:4: error: unsupported relocation type diff --git a/llvm/test/MC/ARM/pcrel-vldr-diff-section.s b/llvm/test/MC/ARM/pcrel-vldr-diff-section.s index aa259b6e95f50..44b1032a8f63e 100644 --- a/llvm/test/MC/ARM/pcrel-vldr-diff-section.s +++ b/llvm/test/MC/ARM/pcrel-vldr-diff-section.s @@ -12,4 +12,3 @@ vldr.16 s0,foo @ arm_pcrel_9 / t2_pcrel_9 @ CHECK: :[[#@LINE-4]]:1: error: unsupported relocation type @ CHECK: :[[#@LINE-4]]:1: error: unsupported relocation type @ CHECK: :[[#@LINE-4]]:1: error: unsupported relocation type - diff --git a/llvm/test/MC/ARM/pcrel-vldr-same-section.s b/llvm/test/MC/ARM/pcrel-vldr-same-section.s index 493a34a1e46cb..4bc7d353c4c3d 100644 --- a/llvm/test/MC/ARM/pcrel-vldr-same-section.s +++ b/llvm/test/MC/ARM/pcrel-vldr-same-section.s @@ -59,4 +59,3 @@ bar: @ THUMB_OFFSET: vldr s0, [pc, #-48] @ 0x0 @ THUMB_OFFSET: vldr d0, [pc, #-52] @ 0x0 @ THUMB_OFFSET: vldr.16 s0, [pc, #-56] @ 0x0 - From 0048c1f926b5bb11974f3db0e77b157bae1e6819 Mon Sep 17 00:00:00 2001 From: Eleanor Bonnici Date: Tue, 2 Jan 2024 12:35:34 +0000 Subject: [PATCH 3/5] amend! [llvm][MC][ARM] Don't autoresolve fixups [llvm][MC][ARM] Don't autoresolve fixups Removes logic that caused some fixups to be marked as resolved in the assembler without actually resolving them. Assembler must either resolve the fixup, reject the code (error out) or defer the resolution to the linker. In general assembler can resolve offsets in pcrel instructions if the symbol referred to is in the same section and it cannot make assumptions about relative position of sections. For example, when LDRD instruction in arm mode is encountered, fixup_arm_pcrel_10_unscaled is raised. Prior to https://github.com/llvm/llvm-project/pull/72873/ the assembler would always mark it as resolved without generating a relocation. The resulting code would likely be incorrect whenever the label referred to is in a different section. This patch finishes the series to prevent incorrect code being generated for pcrel instructions referring to labels in different sections. This kind of assembly code is very rare and most likely a user error, so both options (relocation or error) are acceptable. Previously this was resolved by adding relocations. Here, for VLDR instructions an error is generated as relocation does not exist for Thumb mode and we wanted the tool's behaviour to be consistent across modes. In the LDRD case, Thumb mode does not have a relocation and errors out, but LDRD in Arm mode generates relocation because its fixup kind is shared with other instructions. Patch series: https://github.com/llvm/llvm-project/pull/72873 - LDRx https://github.com/llvm/llvm-project/pull/73834 - ADR this PR - LDRD and VLDR From 57c39d7a3b6ea892e8f62787347fda44a06e5a8a Mon Sep 17 00:00:00 2001 From: Eleanor Bonnici Date: Mon, 15 Jan 2024 15:30:03 +0000 Subject: [PATCH 4/5] Fix "ldr" in the disassembly for vldr --- llvm/test/MC/ARM/pcrel-vldr-same-section.s | 66 +++++++++++----------- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/llvm/test/MC/ARM/pcrel-vldr-same-section.s b/llvm/test/MC/ARM/pcrel-vldr-same-section.s index 4bc7d353c4c3d..0727c010ed8e7 100644 --- a/llvm/test/MC/ARM/pcrel-vldr-same-section.s +++ b/llvm/test/MC/ARM/pcrel-vldr-same-section.s @@ -16,17 +16,17 @@ baz: .word 0x11223344, 0x55667788 label: - vldr s0, foo @ arm_pcrel_10 / t2_pcrel_10 - vldr d0, foo @ arm_pcrel_10 / t2_pcrel_10 - vldr.16 s0, foo @ arm_pcrel_9 / t2_pcrel_9 - vldr s0, bar-8 - vldr d0, bar-8 + vldr s0, foo @ arm_pcrel_10 / t2_pcrel_10 + vldr d0, foo @ arm_pcrel_10 / t2_pcrel_10 + vldr.16 s0, foo @ arm_pcrel_9 / t2_pcrel_9 + vldr s0, bar-8 + vldr d0, bar-8 vldr.16 s0, bar-8 - vldr s0, baz - vldr d0, baz + vldr s0, baz + vldr d0, baz vldr.16 s0, baz - vldr s0, label-8 - vldr d0, label-8 + vldr s0, label-8 + vldr d0, label-8 vldr.16 s0, label-8 foo: @@ -35,27 +35,27 @@ bar: @ RELOC: There are no relocations in this file. -@ ARM_OFFSET: vldr s0, [pc, #40] @ 0x38 -@ ARM_OFFSET: vldr d0, [pc, #36] @ 0x38 -@ ARM_OFFSET: vldr.16 s0, [pc, #32] @ 0x38 -@ ARM_OFFSET: vldr s0, [pc, #28] @ 0x38 -@ ARM_OFFSET: vldr d0, [pc, #24] @ 0x38 -@ ARM_OFFSET: vldr.16 s0, [pc, #20] @ 0x38 -@ ARM_OFFSET: vldr s0, [pc, #-40] @ 0x0 -@ ARM_OFFSET: vldr d0, [pc, #-44] @ 0x0 -@ ARM_OFFSET: vldr.16 s0, [pc, #-48] @ 0x0 -@ ARM_OFFSET: vldr s0, [pc, #-52] @ 0x0 -@ ARM_OFFSET: vldr d0, [pc, #-56] @ 0x0 -@ ARM_OFFSET: vldr.16 s0, [pc, #-60] @ 0x0 -@ THUMB_OFFSET: ldr s0, [pc, #44] @ 0x38 -@ THUMB_OFFSET: ldr d0, [pc, #40] @ 0x38 -@ THUMB_OFFSET: ldr.16 s0, [pc, #36] @ 0x38 -@ THUMB_OFFSET: ldr s0, [pc, #32] @ 0x38 -@ THUMB_OFFSET: ldr d0, [pc, #28] @ 0x38 -@ THUMB_OFFSET: ldr.16 s0, [pc, #24] @ 0x38 -@ THUMB_OFFSET: vldr s0, [pc, #-36] @ 0x0 -@ THUMB_OFFSET: vldr d0, [pc, #-40] @ 0x0 -@ THUMB_OFFSET: vldr.16 s0, [pc, #-44] @ 0x0 -@ THUMB_OFFSET: vldr s0, [pc, #-48] @ 0x0 -@ THUMB_OFFSET: vldr d0, [pc, #-52] @ 0x0 -@ THUMB_OFFSET: vldr.16 s0, [pc, #-56] @ 0x0 +@ ARM_OFFSET: vldr s0, [pc, #40] @ 0x38 +@ ARM_OFFSET: vldr d0, [pc, #36] @ 0x38 +@ ARM_OFFSET: vldr.16 s0, [pc, #32] @ 0x38 +@ ARM_OFFSET: vldr s0, [pc, #28] @ 0x38 +@ ARM_OFFSET: vldr d0, [pc, #24] @ 0x38 +@ ARM_OFFSET: vldr.16 s0, [pc, #20] @ 0x38 +@ ARM_OFFSET: vldr s0, [pc, #-40] @ 0x0 +@ ARM_OFFSET: vldr d0, [pc, #-44] @ 0x0 +@ ARM_OFFSET: vldr.16 s0, [pc, #-48] @ 0x0 +@ ARM_OFFSET: vldr s0, [pc, #-52] @ 0x0 +@ ARM_OFFSET: vldr d0, [pc, #-56] @ 0x0 +@ ARM_OFFSET: vldr.16 s0, [pc, #-60] @ 0x0 +@ THUMB_OFFSET: vldr s0, [pc, #44] @ 0x38 +@ THUMB_OFFSET: vldr d0, [pc, #40] @ 0x38 +@ THUMB_OFFSET: vldr.16 s0, [pc, #36] @ 0x38 +@ THUMB_OFFSET: vldr s0, [pc, #32] @ 0x38 +@ THUMB_OFFSET: vldr d0, [pc, #28] @ 0x38 +@ THUMB_OFFSET: vldr.16 s0, [pc, #24] @ 0x38 +@ THUMB_OFFSET: vldr s0, [pc, #-36] @ 0x0 +@ THUMB_OFFSET: vldr d0, [pc, #-40] @ 0x0 +@ THUMB_OFFSET: vldr.16 s0, [pc, #-44] @ 0x0 +@ THUMB_OFFSET: vldr s0, [pc, #-48] @ 0x0 +@ THUMB_OFFSET: vldr d0, [pc, #-52] @ 0x0 +@ THUMB_OFFSET: vldr.16 s0, [pc, #-56] @ 0x0 From 2a20e1bbfdb940e2ee076cc2e7810024aab8d164 Mon Sep 17 00:00:00 2001 From: Eleanor Bonnici Date: Mon, 15 Jan 2024 18:27:08 +0000 Subject: [PATCH 5/5] Move ERR check in pcrel-ldrd-diff-section.s closer to instruction --- llvm/test/MC/ARM/pcrel-ldrd-diff-section.s | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/llvm/test/MC/ARM/pcrel-ldrd-diff-section.s b/llvm/test/MC/ARM/pcrel-ldrd-diff-section.s index c2acd8b389631..0b745a97687d5 100644 --- a/llvm/test/MC/ARM/pcrel-ldrd-diff-section.s +++ b/llvm/test/MC/ARM/pcrel-ldrd-diff-section.s @@ -15,6 +15,10 @@ bar: ldrd r0, r1, foo1 @ arm_pcrel_10_unscaled ldrd r0, r1, foo2-8 @ arm_pcrel_10_unscaled +.ifdef ERR + @ ERR:[[#@LINE-3]]:5: error: unsupported relocation type + @ ERR:[[#@LINE-3]]:5: error: unsupported relocation type +.endif bx lr .section .data.foo, "a", %progbits @@ -26,11 +30,6 @@ foo1: foo2: .word 0x99aabbcc, 0xddeeff00 -.ifdef ERR - @ ERR:[[#@LINE-14]]:5: error: unsupported relocation type - @ ERR:[[#@LINE-14]]:5: error: unsupported relocation type -.endif - @ ARM: R_ARM_LDRS_PC_G0 @ ARM_ADDEND: ldrd r0, r1, [pc, #-8]