Skip to content

Conversation

@andjo403
Copy link
Contributor

@andjo403 andjo403 commented Nov 6, 2025

Proof https://alive2.llvm.org/ce/z/oCQyTG

only added handling for zext as sext was not present in llvm-opt-benchmark

closes #163108
closes #86176

… select's condition

eg fold binop(select cond, C1, C2, zext(cond)) to
select cond, C11, C22
@andjo403 andjo403 requested review from dtcxzyw and spaits November 6, 2025 17:54
@andjo403 andjo403 requested a review from nikic as a code owner November 6, 2025 17:54
@llvmbot llvmbot added llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms labels Nov 6, 2025
@llvmbot
Copy link
Member

llvmbot commented Nov 6, 2025

@llvm/pr-subscribers-llvm-transforms

Author: Andreas Jonson (andjo403)

Changes

Proof https://alive2.llvm.org/ce/z/oCQyTG

closes #163108
closes #86176


Full diff: https://github.com/llvm/llvm-project/pull/166816.diff

2 Files Affected:

  • (modified) llvm/lib/Transforms/InstCombine/InstructionCombining.cpp (+3)
  • (modified) llvm/test/Transforms/InstCombine/binop-select.ll (+6-23)
diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
index b158e0f626850..27ec6c6cb78a3 100644
--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -1758,6 +1758,9 @@ static Value *simplifyOperationIntoSelectOperand(Instruction &I, SelectInst *SI,
                                     m_Specific(Op), m_Value(V))) &&
                isGuaranteedNotToBeUndefOrPoison(V)) {
       // Pass
+    } else if (match(Op, m_ZExt(m_Specific(SI->getCondition())))) {
+      V = IsTrueArm ? ConstantInt::get(Op->getType(), 1)
+                    : ConstantInt::getNullValue(Op->getType());
     } else {
       V = Op;
     }
diff --git a/llvm/test/Transforms/InstCombine/binop-select.ll b/llvm/test/Transforms/InstCombine/binop-select.ll
index fe1ec9014f188..9e336ad104599 100644
--- a/llvm/test/Transforms/InstCombine/binop-select.ll
+++ b/llvm/test/Transforms/InstCombine/binop-select.ll
@@ -406,10 +406,7 @@ define i32 @ashr_sel_op1_use(i1 %b) {
 
 define i8 @commonArgWithOr0(i1 %arg0) {
 ; CHECK-LABEL: @commonArgWithOr0(
-; CHECK-NEXT:    [[V0:%.*]] = zext i1 [[ARG0:%.*]] to i8
-; CHECK-NEXT:    [[V1:%.*]] = select i1 [[ARG0]], i8 0, i8 8
-; CHECK-NEXT:    [[V2:%.*]] = or disjoint i8 [[V1]], [[V0]]
-; CHECK-NEXT:    [[V3:%.*]] = or disjoint i8 [[V2]], 16
+; CHECK-NEXT:    [[V3:%.*]] = select i1 [[ARG0:%.*]], i8 17, i8 24
 ; CHECK-NEXT:    ret i8 [[V3]]
 ;
   %v0 = zext i1 %arg0 to i8
@@ -433,10 +430,7 @@ define i8 @commonArgWithOr1(i1 %arg0) {
 
 define i8 @commonArgWithOr2(i1 %arg0) {
 ; CHECK-LABEL: @commonArgWithOr2(
-; CHECK-NEXT:    [[V0:%.*]] = zext i1 [[ARG0:%.*]] to i8
-; CHECK-NEXT:    [[V1:%.*]] = select i1 [[ARG0]], i8 5, i8 42
-; CHECK-NEXT:    [[V2:%.*]] = or i8 [[V1]], [[V0]]
-; CHECK-NEXT:    [[V3:%.*]] = or disjoint i8 [[V2]], 16
+; CHECK-NEXT:    [[V3:%.*]] = select i1 [[ARG0:%.*]], i8 21, i8 58
 ; CHECK-NEXT:    ret i8 [[V3]]
 ;
   %v0 = zext i1 %arg0 to i8
@@ -496,10 +490,7 @@ define i8 @commonArgWithAnd3(i1 %arg0) {
 
 define i8 @commonArgWithXor0(i1 %arg0) {
 ; CHECK-LABEL: @commonArgWithXor0(
-; CHECK-NEXT:    [[V0:%.*]] = zext i1 [[ARG0:%.*]] to i8
-; CHECK-NEXT:    [[V1:%.*]] = select i1 [[ARG0]], i8 0, i8 8
-; CHECK-NEXT:    [[V2:%.*]] = or disjoint i8 [[V1]], [[V0]]
-; CHECK-NEXT:    [[V3:%.*]] = or disjoint i8 [[V2]], 16
+; CHECK-NEXT:    [[V3:%.*]] = select i1 [[ARG0:%.*]], i8 17, i8 24
 ; CHECK-NEXT:    ret i8 [[V3]]
 ;
   %v0 = zext i1 %arg0 to i8
@@ -511,9 +502,7 @@ define i8 @commonArgWithXor0(i1 %arg0) {
 
 define i8 @commonArgWithXor1(i1 %arg0) {
 ; CHECK-LABEL: @commonArgWithXor1(
-; CHECK-NEXT:    [[V0:%.*]] = zext i1 [[ARG0:%.*]] to i8
-; CHECK-NEXT:    [[V1:%.*]] = select i1 [[ARG0]], i8 9, i8 1
-; CHECK-NEXT:    [[V2:%.*]] = xor i8 [[V1]], [[V0]]
+; CHECK-NEXT:    [[V2:%.*]] = select i1 [[ARG0:%.*]], i8 8, i8 1
 ; CHECK-NEXT:    ret i8 [[V2]]
 ;
   %v0 = zext i1 %arg0 to i8
@@ -524,10 +513,7 @@ define i8 @commonArgWithXor1(i1 %arg0) {
 
 define i8 @commonArgWithXor2(i1 %arg0) {
 ; CHECK-LABEL: @commonArgWithXor2(
-; CHECK-NEXT:    [[V0:%.*]] = zext i1 [[ARG0:%.*]] to i8
-; CHECK-NEXT:    [[V1:%.*]] = select i1 [[ARG0]], i8 1, i8 7
-; CHECK-NEXT:    [[V2:%.*]] = xor i8 [[V1]], [[V0]]
-; CHECK-NEXT:    [[V3:%.*]] = or disjoint i8 [[V2]], 16
+; CHECK-NEXT:    [[V3:%.*]] = select i1 [[ARG0:%.*]], i8 16, i8 23
 ; CHECK-NEXT:    ret i8 [[V3]]
 ;
   %v0 = zext i1 %arg0 to i8
@@ -539,10 +525,7 @@ define i8 @commonArgWithXor2(i1 %arg0) {
 
 define i8 @commonArgWithXor3(i1 %arg0) {
 ; CHECK-LABEL: @commonArgWithXor3(
-; CHECK-NEXT:    [[V0:%.*]] = zext i1 [[ARG0:%.*]] to i8
-; CHECK-NEXT:    [[V1:%.*]] = select i1 [[ARG0]], i8 5, i8 45
-; CHECK-NEXT:    [[V2:%.*]] = xor i8 [[V1]], [[V0]]
-; CHECK-NEXT:    [[V3:%.*]] = or disjoint i8 [[V2]], 16
+; CHECK-NEXT:    [[V3:%.*]] = select i1 [[ARG0:%.*]], i8 20, i8 61
 ; CHECK-NEXT:    ret i8 [[V3]]
 ;
   %v0 = zext i1 %arg0 to i8

Copy link
Contributor

@spaits spaits left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM. I just have a few qestions/recommendations.

Copy link
Member

@dtcxzyw dtcxzyw left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM. Thanks.

@andjo403 andjo403 merged commit b9ea93c into llvm:main Nov 8, 2025
13 checks passed
@andjo403 andjo403 deleted the foldOperationInToSelectWithZextOfSelecxtCond branch November 8, 2025 15:24
vinay-deshmukh pushed a commit to vinay-deshmukh/llvm-project that referenced this pull request Nov 8, 2025
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

llvm:instcombine Covers the InstCombine, InstSimplify and AggressiveInstCombine passes llvm:transforms

Projects

None yet

4 participants