From c003a709007ba2f83ead028f9bdd0aaa841fa4dc Mon Sep 17 00:00:00 2001 From: Ramkumar Ramachandra Date: Thu, 2 Oct 2025 16:08:35 +0100 Subject: [PATCH 1/2] [VPlan] Improve code using m_APInt (NFC) --- llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp index 64bbe630e3172..503d763cc7eb3 100644 --- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp +++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp @@ -1478,11 +1478,8 @@ static bool optimizeVectorInductionWidthForTCAndVFUF(VPlan &Plan, if (!Plan.getVectorLoopRegion()) return false; - if (!Plan.getTripCount()->isLiveIn()) - return false; - auto *TC = dyn_cast_if_present( - Plan.getTripCount()->getUnderlyingValue()); - if (!TC || !BestVF.isFixed()) + const APInt *TC; + if (!match(Plan.getTripCount(), m_APInt(TC)) || !BestVF.isFixed()) return false; // Calculate the minimum power-of-2 bit width that can fit the known TC, VF @@ -1495,7 +1492,7 @@ static bool optimizeVectorInductionWidthForTCAndVFUF(VPlan &Plan, return std::max(PowerOf2Ceil(MaxVal.getActiveBits()), 8); }; unsigned NewBitWidth = - ComputeBitWidth(TC->getValue(), BestVF.getKnownMinValue() * BestUF); + ComputeBitWidth(*TC, BestVF.getKnownMinValue() * BestUF); LLVMContext &Ctx = Plan.getContext(); auto *NewIVTy = IntegerType::get(Ctx, NewBitWidth); From 7259446e9ef3ed6c6137d36a4aba56474917db6f Mon Sep 17 00:00:00 2001 From: Ramkumar Ramachandra Date: Mon, 20 Oct 2025 10:55:22 +0100 Subject: [PATCH 2/2] [VPlan] Swap || branches --- llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp index 503d763cc7eb3..2e894f8636363 100644 --- a/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp +++ b/llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp @@ -1479,7 +1479,7 @@ static bool optimizeVectorInductionWidthForTCAndVFUF(VPlan &Plan, return false; const APInt *TC; - if (!match(Plan.getTripCount(), m_APInt(TC)) || !BestVF.isFixed()) + if (!BestVF.isFixed() || !match(Plan.getTripCount(), m_APInt(TC))) return false; // Calculate the minimum power-of-2 bit width that can fit the known TC, VF