From af4377d6c19dddcfe0ebefdc3f52319644bcb771 Mon Sep 17 00:00:00 2001
From: Qi Zhao <zhaoqi01@loongson.cn>
Date: Fri, 26 Sep 2025 16:24:33 +0800
Subject: [PATCH 1/3] [LoongArch][NFC] Pre-commit tests for `xvinsve0.{w/d}`

---
 .../ir-instruction/shuffle-as-xvinsve0.ll     | 921 ++++++++++++++++++
 1 file changed, 921 insertions(+)
 create mode 100644 llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll

diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll
new file mode 100644
index 0000000000000..b6c9c4da05e5a
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll
@@ -0,0 +1,921 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
+; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64
+
+;; xvinsve0.w
+define void @xvinsve0_v8i32_l_0(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v8i32_l_0:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI0_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI0_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_l_1(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v8i32_l_1:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI1_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI1_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 8, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_l_2(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v8i32_l_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI2_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI2_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5, i32 6, i32 7>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_l_3(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v8i32_l_3:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI3_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI3_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 1, i32 2, i32 8, i32 4, i32 5, i32 6, i32 7>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_l_4(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v8i32_l_4:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    ld.w $a2, $a2, 0
+; LA32-NEXT:    xvld $xr0, $a1, 0
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 5
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 6
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 7
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA32-NEXT:    xvst $xr2, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v8i32_l_4:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    xvld $xr0, $a2, 0
+; LA64-NEXT:    xvld $xr1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 5
+; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 6
+; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 7
+; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 3
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 1
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 2
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 3
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA64-NEXT:    xvpermi.q $xr2, $xr0, 2
+; LA64-NEXT:    xvst $xr2, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 5, i32 6, i32 7>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_l_5(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v8i32_l_5:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    xvld $xr0, $a1, 0
+; LA32-NEXT:    ld.w $a1, $a2, 0
+; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 4
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 0
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 6
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 7
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA32-NEXT:    xvst $xr2, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v8i32_l_5:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    xvld $xr0, $a1, 0
+; LA64-NEXT:    xvld $xr1, $a2, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 4
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 6
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 7
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA64-NEXT:    xvpermi.q $xr1, $xr2, 2
+; LA64-NEXT:    xvst $xr1, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 6, i32 7>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_l_6(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v8i32_l_6:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    xvld $xr0, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 4
+; LA32-NEXT:    ld.w $a2, $a2, 0
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 5
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 7
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA32-NEXT:    xvst $xr2, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v8i32_l_6:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    xvld $xr0, $a1, 0
+; LA64-NEXT:    xvld $xr1, $a2, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 4
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 5
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 7
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA64-NEXT:    xvpermi.q $xr1, $xr2, 2
+; LA64-NEXT:    xvst $xr1, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 7>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_l_7(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v8i32_l_7:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    xvld $xr0, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 4
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 5
+; LA32-NEXT:    ld.w $a2, $a2, 0
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 6
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA32-NEXT:    xvst $xr2, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v8i32_l_7:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    xvld $xr0, $a1, 0
+; LA64-NEXT:    xvld $xr1, $a2, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 4
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 5
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 6
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA64-NEXT:    xvpermi.q $xr1, $xr2, 2
+; LA64-NEXT:    xvst $xr1, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8f32_l(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v8f32_l:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI8_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI8_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x float>, ptr %a
+  %vb = load <8 x float>, ptr %b
+  %vc = shufflevector <8 x float> %va, <8 x float> %vb, <8 x i32> <i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+  store <8 x float> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_h_0(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v8i32_h_0:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI9_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI9_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_h_1(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v8i32_h_1:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI10_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI10_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 0, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_h_2(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v8i32_h_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI11_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI11_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 9, i32 0, i32 11, i32 12, i32 13, i32 14, i32 15>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_h_3(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v8i32_h_3:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI12_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI12_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 9, i32 10, i32 0, i32 12, i32 13, i32 14, i32 15>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_h_4(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v8i32_h_4:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    ld.w $a1, $a1, 0
+; LA32-NEXT:    xvld $xr0, $a2, 0
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 5
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 6
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 7
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA32-NEXT:    xvst $xr2, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v8i32_h_4:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    xvld $xr0, $a1, 0
+; LA64-NEXT:    xvld $xr1, $a2, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 5
+; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 6
+; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 7
+; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 3
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 1
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 2
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 3
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA64-NEXT:    xvpermi.q $xr2, $xr0, 2
+; LA64-NEXT:    xvst $xr2, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 0, i32 13, i32 14, i32 15>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_h_5(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v8i32_h_5:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    xvld $xr0, $a2, 0
+; LA32-NEXT:    ld.w $a1, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 4
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 0
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 6
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 7
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA32-NEXT:    xvst $xr2, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v8i32_h_5:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    xvld $xr0, $a2, 0
+; LA64-NEXT:    xvld $xr1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 4
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 6
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 7
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA64-NEXT:    xvpermi.q $xr1, $xr2, 2
+; LA64-NEXT:    xvst $xr1, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 0, i32 14, i32 15>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_h_6(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v8i32_h_6:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    xvld $xr0, $a2, 0
+; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 4
+; LA32-NEXT:    ld.w $a1, $a1, 0
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 0
+; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 5
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 1
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 7
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA32-NEXT:    xvst $xr2, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v8i32_h_6:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    xvld $xr0, $a2, 0
+; LA64-NEXT:    xvld $xr1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 4
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 5
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 7
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA64-NEXT:    xvpermi.q $xr1, $xr2, 2
+; LA64-NEXT:    xvst $xr1, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 0, i32 15>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8i32_h_7(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v8i32_h_7:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    xvld $xr0, $a2, 0
+; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 4
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 0
+; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 5
+; LA32-NEXT:    ld.w $a1, $a1, 0
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 1
+; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 6
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 2
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA32-NEXT:    xvst $xr2, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v8i32_h_7:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    xvld $xr0, $a2, 0
+; LA64-NEXT:    xvld $xr1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 4
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 5
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 6
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA64-NEXT:    xvpermi.q $xr1, $xr2, 2
+; LA64-NEXT:    xvst $xr1, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <8 x i32>, ptr %a
+  %vb = load <8 x i32>, ptr %b
+  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 0>
+  store <8 x i32> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v8f32_h(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v8f32_h:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI17_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI17_0)
+; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <8 x float>, ptr %a
+  %vb = load <8 x float>, ptr %b
+  %vc = shufflevector <8 x float> %va, <8 x float> %vb, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+  store <8 x float> %vc, ptr %d
+  ret void
+}
+
+;; xvinsve0.d
+define void @xvinsve0_v4i64_l_0(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v4i64_l_0:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI18_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI18_0)
+; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <4 x i64>, ptr %a
+  %vb = load <4 x i64>, ptr %b
+  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
+  store <4 x i64> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v4i64_l_1(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v4i64_l_1:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI19_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI19_0)
+; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <4 x i64>, ptr %a
+  %vb = load <4 x i64>, ptr %b
+  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
+  store <4 x i64> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v4i64_l_2(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v4i64_l_2:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    xvld $xr0, $a2, 0
+; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 0
+; LA32-NEXT:    xvld $xr1, $a1, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a2, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 6
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 7
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA32-NEXT:    vinsgr2vr.w $vr0, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 1
+; LA32-NEXT:    vinsgr2vr.w $vr0, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 2
+; LA32-NEXT:    vinsgr2vr.w $vr0, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 3
+; LA32-NEXT:    vinsgr2vr.w $vr0, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr0, $xr2, 2
+; LA32-NEXT:    xvst $xr0, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v4i64_l_2:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    ld.d $a2, $a2, 0
+; LA64-NEXT:    xvld $xr0, $a1, 0
+; LA64-NEXT:    vinsgr2vr.d $vr1, $a2, 0
+; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 3
+; LA64-NEXT:    vinsgr2vr.d $vr1, $a1, 1
+; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 1
+; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 1
+; LA64-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA64-NEXT:    xvst $xr2, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <4 x i64>, ptr %a
+  %vb = load <4 x i64>, ptr %b
+  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
+  store <4 x i64> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v4i64_l_3(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v4i64_l_3:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    xvld $xr0, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 4
+; LA32-NEXT:    xvld $xr1, $a2, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 5
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr1, $xr2, 2
+; LA32-NEXT:    xvst $xr1, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v4i64_l_3:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    xvld $xr0, $a1, 0
+; LA64-NEXT:    ld.d $a1, $a2, 0
+; LA64-NEXT:    xvpickve2gr.d $a2, $xr0, 2
+; LA64-NEXT:    vinsgr2vr.d $vr1, $a2, 0
+; LA64-NEXT:    vinsgr2vr.d $vr1, $a1, 1
+; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 1
+; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 1
+; LA64-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA64-NEXT:    xvst $xr2, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <4 x i64>, ptr %a
+  %vb = load <4 x i64>, ptr %b
+  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
+  store <4 x i64> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v4f64_l(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v4f64_l:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI22_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI22_0)
+; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <4 x double>, ptr %a
+  %vb = load <4 x double>, ptr %b
+  %vc = shufflevector <4 x double> %va, <4 x double> %vb, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
+  store <4 x double> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v4i64_h_0(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v4i64_h_0:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI23_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI23_0)
+; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <4 x i64>, ptr %a
+  %vb = load <4 x i64>, ptr %b
+  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
+  store <4 x i64> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v4i64_h_1(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v4i64_h_1:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI24_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI24_0)
+; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <4 x i64>, ptr %a
+  %vb = load <4 x i64>, ptr %b
+  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 4, i32 0, i32 6, i32 7>
+  store <4 x i64> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v4i64_h_2(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v4i64_h_2:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    xvld $xr0, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA32-NEXT:    xvld $xr1, $a2, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 6
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 7
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA32-NEXT:    vinsgr2vr.w $vr0, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 1
+; LA32-NEXT:    vinsgr2vr.w $vr0, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 2
+; LA32-NEXT:    vinsgr2vr.w $vr0, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 3
+; LA32-NEXT:    vinsgr2vr.w $vr0, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr0, $xr2, 2
+; LA32-NEXT:    xvst $xr0, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v4i64_h_2:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    ld.d $a1, $a1, 0
+; LA64-NEXT:    xvld $xr0, $a2, 0
+; LA64-NEXT:    vinsgr2vr.d $vr1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 3
+; LA64-NEXT:    vinsgr2vr.d $vr1, $a1, 1
+; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 1
+; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 1
+; LA64-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA64-NEXT:    xvst $xr2, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <4 x i64>, ptr %a
+  %vb = load <4 x i64>, ptr %b
+  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 4, i32 5, i32 0, i32 7>
+  store <4 x i64> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v4i64_h_3(ptr %d, ptr %a, ptr %b) nounwind {
+; LA32-LABEL: xvinsve0_v4i64_h_3:
+; LA32:       # %bb.0: # %entry
+; LA32-NEXT:    xvld $xr0, $a2, 0
+; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 4
+; LA32-NEXT:    xvld $xr1, $a1, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a2, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 5
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 0
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 1
+; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 0
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
+; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
+; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
+; LA32-NEXT:    xvpermi.q $xr1, $xr2, 2
+; LA32-NEXT:    xvst $xr1, $a0, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: xvinsve0_v4i64_h_3:
+; LA64:       # %bb.0: # %entry
+; LA64-NEXT:    xvld $xr0, $a2, 0
+; LA64-NEXT:    ld.d $a1, $a1, 0
+; LA64-NEXT:    xvpickve2gr.d $a2, $xr0, 2
+; LA64-NEXT:    vinsgr2vr.d $vr1, $a2, 0
+; LA64-NEXT:    vinsgr2vr.d $vr1, $a1, 1
+; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 0
+; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 0
+; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 1
+; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 1
+; LA64-NEXT:    xvpermi.q $xr2, $xr1, 2
+; LA64-NEXT:    xvst $xr2, $a0, 0
+; LA64-NEXT:    ret
+entry:
+  %va = load <4 x i64>, ptr %a
+  %vb = load <4 x i64>, ptr %b
+  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 4, i32 5, i32 6, i32 0>
+  store <4 x i64> %vc, ptr %d
+  ret void
+}
+
+define void @xvinsve0_v4f64_h(ptr %d, ptr %a, ptr %b) nounwind {
+; CHECK-LABEL: xvinsve0_v4f64_h:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    xvld $xr0, $a1, 0
+; CHECK-NEXT:    xvld $xr1, $a2, 0
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI27_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI27_0)
+; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvst $xr2, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %va = load <4 x double>, ptr %a
+  %vb = load <4 x double>, ptr %b
+  %vc = shufflevector <4 x double> %va, <4 x double> %vb, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
+  store <4 x double> %vc, ptr %d
+  ret void
+}

From 3ed02d439363ed0c35e183baae212435348cc351 Mon Sep 17 00:00:00 2001
From: Qi Zhao <zhaoqi01@loongson.cn>
Date: Fri, 26 Sep 2025 19:46:24 +0800
Subject: [PATCH 2/3] simplify tests

---
 .../ir-instruction/shuffle-as-xvinsve0.ll     | 568 ------------------
 1 file changed, 568 deletions(-)

diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll
index b6c9c4da05e5a..218dafa581a9e 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll
@@ -21,60 +21,6 @@ entry:
   ret void
 }
 
-define void @xvinsve0_v8i32_l_1(ptr %d, ptr %a, ptr %b) nounwind {
-; CHECK-LABEL: xvinsve0_v8i32_l_1:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xvld $xr0, $a1, 0
-; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI1_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI1_0)
-; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
-; CHECK-NEXT:    xvst $xr2, $a0, 0
-; CHECK-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 8, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
-define void @xvinsve0_v8i32_l_2(ptr %d, ptr %a, ptr %b) nounwind {
-; CHECK-LABEL: xvinsve0_v8i32_l_2:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xvld $xr0, $a1, 0
-; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI2_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI2_0)
-; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
-; CHECK-NEXT:    xvst $xr2, $a0, 0
-; CHECK-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5, i32 6, i32 7>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
-define void @xvinsve0_v8i32_l_3(ptr %d, ptr %a, ptr %b) nounwind {
-; CHECK-LABEL: xvinsve0_v8i32_l_3:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xvld $xr0, $a1, 0
-; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI3_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI3_0)
-; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
-; CHECK-NEXT:    xvst $xr2, $a0, 0
-; CHECK-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 1, i32 2, i32 8, i32 4, i32 5, i32 6, i32 7>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
 define void @xvinsve0_v8i32_l_4(ptr %d, ptr %a, ptr %b) nounwind {
 ; LA32-LABEL: xvinsve0_v8i32_l_4:
 ; LA32:       # %bb.0: # %entry
@@ -130,171 +76,6 @@ entry:
   ret void
 }
 
-define void @xvinsve0_v8i32_l_5(ptr %d, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: xvinsve0_v8i32_l_5:
-; LA32:       # %bb.0: # %entry
-; LA32-NEXT:    xvld $xr0, $a1, 0
-; LA32-NEXT:    ld.w $a1, $a2, 0
-; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 4
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 0
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 6
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 7
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
-; LA32-NEXT:    xvst $xr2, $a0, 0
-; LA32-NEXT:    ret
-;
-; LA64-LABEL: xvinsve0_v8i32_l_5:
-; LA64:       # %bb.0: # %entry
-; LA64-NEXT:    xvld $xr0, $a1, 0
-; LA64-NEXT:    xvld $xr1, $a2, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 4
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 6
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 7
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA64-NEXT:    xvpermi.q $xr1, $xr2, 2
-; LA64-NEXT:    xvst $xr1, $a0, 0
-; LA64-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 8, i32 6, i32 7>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
-define void @xvinsve0_v8i32_l_6(ptr %d, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: xvinsve0_v8i32_l_6:
-; LA32:       # %bb.0: # %entry
-; LA32-NEXT:    xvld $xr0, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 4
-; LA32-NEXT:    ld.w $a2, $a2, 0
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 5
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 7
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
-; LA32-NEXT:    xvst $xr2, $a0, 0
-; LA32-NEXT:    ret
-;
-; LA64-LABEL: xvinsve0_v8i32_l_6:
-; LA64:       # %bb.0: # %entry
-; LA64-NEXT:    xvld $xr0, $a1, 0
-; LA64-NEXT:    xvld $xr1, $a2, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 4
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 5
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 7
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA64-NEXT:    xvpermi.q $xr1, $xr2, 2
-; LA64-NEXT:    xvst $xr1, $a0, 0
-; LA64-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 7>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
-define void @xvinsve0_v8i32_l_7(ptr %d, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: xvinsve0_v8i32_l_7:
-; LA32:       # %bb.0: # %entry
-; LA32-NEXT:    xvld $xr0, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 4
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 5
-; LA32-NEXT:    ld.w $a2, $a2, 0
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 6
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 3
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
-; LA32-NEXT:    xvst $xr2, $a0, 0
-; LA32-NEXT:    ret
-;
-; LA64-LABEL: xvinsve0_v8i32_l_7:
-; LA64:       # %bb.0: # %entry
-; LA64-NEXT:    xvld $xr0, $a1, 0
-; LA64-NEXT:    xvld $xr1, $a2, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 4
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 5
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 6
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA64-NEXT:    xvpermi.q $xr1, $xr2, 2
-; LA64-NEXT:    xvst $xr1, $a0, 0
-; LA64-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 8>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
 define void @xvinsve0_v8f32_l(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK-LABEL: xvinsve0_v8f32_l:
 ; CHECK:       # %bb.0: # %entry
@@ -313,24 +94,6 @@ entry:
   ret void
 }
 
-define void @xvinsve0_v8i32_h_0(ptr %d, ptr %a, ptr %b) nounwind {
-; CHECK-LABEL: xvinsve0_v8i32_h_0:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xvld $xr0, $a1, 0
-; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI9_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI9_0)
-; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
-; CHECK-NEXT:    xvst $xr2, $a0, 0
-; CHECK-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
 define void @xvinsve0_v8i32_h_1(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK-LABEL: xvinsve0_v8i32_h_1:
 ; CHECK:       # %bb.0: # %entry
@@ -349,152 +112,6 @@ entry:
   ret void
 }
 
-define void @xvinsve0_v8i32_h_2(ptr %d, ptr %a, ptr %b) nounwind {
-; CHECK-LABEL: xvinsve0_v8i32_h_2:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xvld $xr0, $a1, 0
-; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI11_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI11_0)
-; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
-; CHECK-NEXT:    xvst $xr2, $a0, 0
-; CHECK-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 9, i32 0, i32 11, i32 12, i32 13, i32 14, i32 15>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
-define void @xvinsve0_v8i32_h_3(ptr %d, ptr %a, ptr %b) nounwind {
-; CHECK-LABEL: xvinsve0_v8i32_h_3:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xvld $xr0, $a1, 0
-; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI12_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI12_0)
-; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
-; CHECK-NEXT:    xvst $xr2, $a0, 0
-; CHECK-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 9, i32 10, i32 0, i32 12, i32 13, i32 14, i32 15>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
-define void @xvinsve0_v8i32_h_4(ptr %d, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: xvinsve0_v8i32_h_4:
-; LA32:       # %bb.0: # %entry
-; LA32-NEXT:    ld.w $a1, $a1, 0
-; LA32-NEXT:    xvld $xr0, $a2, 0
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 5
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 6
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 7
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
-; LA32-NEXT:    xvst $xr2, $a0, 0
-; LA32-NEXT:    ret
-;
-; LA64-LABEL: xvinsve0_v8i32_h_4:
-; LA64:       # %bb.0: # %entry
-; LA64-NEXT:    xvld $xr0, $a1, 0
-; LA64-NEXT:    xvld $xr1, $a2, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 5
-; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 6
-; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 7
-; LA64-NEXT:    vinsgr2vr.w $vr0, $a1, 3
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 1
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 2
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 3
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA64-NEXT:    xvpermi.q $xr2, $xr0, 2
-; LA64-NEXT:    xvst $xr2, $a0, 0
-; LA64-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 0, i32 13, i32 14, i32 15>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
-define void @xvinsve0_v8i32_h_5(ptr %d, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: xvinsve0_v8i32_h_5:
-; LA32:       # %bb.0: # %entry
-; LA32-NEXT:    xvld $xr0, $a2, 0
-; LA32-NEXT:    ld.w $a1, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 4
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 0
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 6
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 7
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
-; LA32-NEXT:    xvst $xr2, $a0, 0
-; LA32-NEXT:    ret
-;
-; LA64-LABEL: xvinsve0_v8i32_h_5:
-; LA64:       # %bb.0: # %entry
-; LA64-NEXT:    xvld $xr0, $a2, 0
-; LA64-NEXT:    xvld $xr1, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 4
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 6
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 7
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA64-NEXT:    xvpermi.q $xr1, $xr2, 2
-; LA64-NEXT:    xvst $xr1, $a0, 0
-; LA64-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 0, i32 14, i32 15>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
 define void @xvinsve0_v8i32_h_6(ptr %d, ptr %a, ptr %b) nounwind {
 ; LA32-LABEL: xvinsve0_v8i32_h_6:
 ; LA32:       # %bb.0: # %entry
@@ -550,61 +167,6 @@ entry:
   ret void
 }
 
-define void @xvinsve0_v8i32_h_7(ptr %d, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: xvinsve0_v8i32_h_7:
-; LA32:       # %bb.0: # %entry
-; LA32-NEXT:    xvld $xr0, $a2, 0
-; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 4
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 0
-; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 5
-; LA32-NEXT:    ld.w $a1, $a1, 0
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 1
-; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 6
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a2, 2
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA32-NEXT:    xvpermi.q $xr2, $xr1, 2
-; LA32-NEXT:    xvst $xr2, $a0, 0
-; LA32-NEXT:    ret
-;
-; LA64-LABEL: xvinsve0_v8i32_h_7:
-; LA64:       # %bb.0: # %entry
-; LA64-NEXT:    xvld $xr0, $a2, 0
-; LA64-NEXT:    xvld $xr1, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 4
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 5
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 6
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr1, 0
-; LA64-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 0
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 2
-; LA64-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA64-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA64-NEXT:    xvpermi.q $xr1, $xr2, 2
-; LA64-NEXT:    xvst $xr1, $a0, 0
-; LA64-NEXT:    ret
-entry:
-  %va = load <8 x i32>, ptr %a
-  %vb = load <8 x i32>, ptr %b
-  %vc = shufflevector <8 x i32> %va, <8 x i32> %vb, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 0>
-  store <8 x i32> %vc, ptr %d
-  ret void
-}
-
 define void @xvinsve0_v8f32_h(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK-LABEL: xvinsve0_v8f32_h:
 ; CHECK:       # %bb.0: # %entry
@@ -624,24 +186,6 @@ entry:
 }
 
 ;; xvinsve0.d
-define void @xvinsve0_v4i64_l_0(ptr %d, ptr %a, ptr %b) nounwind {
-; CHECK-LABEL: xvinsve0_v4i64_l_0:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xvld $xr0, $a1, 0
-; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI18_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI18_0)
-; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
-; CHECK-NEXT:    xvst $xr2, $a0, 0
-; CHECK-NEXT:    ret
-entry:
-  %va = load <4 x i64>, ptr %a
-  %vb = load <4 x i64>, ptr %b
-  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
-  store <4 x i64> %vc, ptr %d
-  ret void
-}
-
 define void @xvinsve0_v4i64_l_1(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK-LABEL: xvinsve0_v4i64_l_1:
 ; CHECK:       # %bb.0: # %entry
@@ -707,53 +251,6 @@ entry:
   ret void
 }
 
-define void @xvinsve0_v4i64_l_3(ptr %d, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: xvinsve0_v4i64_l_3:
-; LA32:       # %bb.0: # %entry
-; LA32-NEXT:    xvld $xr0, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 4
-; LA32-NEXT:    xvld $xr1, $a2, 0
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 5
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 0
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 1
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA32-NEXT:    xvpermi.q $xr1, $xr2, 2
-; LA32-NEXT:    xvst $xr1, $a0, 0
-; LA32-NEXT:    ret
-;
-; LA64-LABEL: xvinsve0_v4i64_l_3:
-; LA64:       # %bb.0: # %entry
-; LA64-NEXT:    xvld $xr0, $a1, 0
-; LA64-NEXT:    ld.d $a1, $a2, 0
-; LA64-NEXT:    xvpickve2gr.d $a2, $xr0, 2
-; LA64-NEXT:    vinsgr2vr.d $vr1, $a2, 0
-; LA64-NEXT:    vinsgr2vr.d $vr1, $a1, 1
-; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 0
-; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 0
-; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 1
-; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 1
-; LA64-NEXT:    xvpermi.q $xr2, $xr1, 2
-; LA64-NEXT:    xvst $xr2, $a0, 0
-; LA64-NEXT:    ret
-entry:
-  %va = load <4 x i64>, ptr %a
-  %vb = load <4 x i64>, ptr %b
-  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
-  store <4 x i64> %vc, ptr %d
-  ret void
-}
-
 define void @xvinsve0_v4f64_l(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK-LABEL: xvinsve0_v4f64_l:
 ; CHECK:       # %bb.0: # %entry
@@ -790,24 +287,6 @@ entry:
   ret void
 }
 
-define void @xvinsve0_v4i64_h_1(ptr %d, ptr %a, ptr %b) nounwind {
-; CHECK-LABEL: xvinsve0_v4i64_h_1:
-; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xvld $xr0, $a1, 0
-; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI24_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI24_0)
-; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
-; CHECK-NEXT:    xvst $xr2, $a0, 0
-; CHECK-NEXT:    ret
-entry:
-  %va = load <4 x i64>, ptr %a
-  %vb = load <4 x i64>, ptr %b
-  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 4, i32 0, i32 6, i32 7>
-  store <4 x i64> %vc, ptr %d
-  ret void
-}
-
 define void @xvinsve0_v4i64_h_2(ptr %d, ptr %a, ptr %b) nounwind {
 ; LA32-LABEL: xvinsve0_v4i64_h_2:
 ; LA32:       # %bb.0: # %entry
@@ -855,53 +334,6 @@ entry:
   ret void
 }
 
-define void @xvinsve0_v4i64_h_3(ptr %d, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: xvinsve0_v4i64_h_3:
-; LA32:       # %bb.0: # %entry
-; LA32-NEXT:    xvld $xr0, $a2, 0
-; LA32-NEXT:    xvpickve2gr.w $a2, $xr0, 4
-; LA32-NEXT:    xvld $xr1, $a1, 0
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a2, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 5
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 0
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr1, 1
-; LA32-NEXT:    vinsgr2vr.w $vr2, $a1, 3
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 0
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 0
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 1
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 1
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 2
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 2
-; LA32-NEXT:    xvpickve2gr.w $a1, $xr0, 3
-; LA32-NEXT:    vinsgr2vr.w $vr1, $a1, 3
-; LA32-NEXT:    xvpermi.q $xr1, $xr2, 2
-; LA32-NEXT:    xvst $xr1, $a0, 0
-; LA32-NEXT:    ret
-;
-; LA64-LABEL: xvinsve0_v4i64_h_3:
-; LA64:       # %bb.0: # %entry
-; LA64-NEXT:    xvld $xr0, $a2, 0
-; LA64-NEXT:    ld.d $a1, $a1, 0
-; LA64-NEXT:    xvpickve2gr.d $a2, $xr0, 2
-; LA64-NEXT:    vinsgr2vr.d $vr1, $a2, 0
-; LA64-NEXT:    vinsgr2vr.d $vr1, $a1, 1
-; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 0
-; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 0
-; LA64-NEXT:    xvpickve2gr.d $a1, $xr0, 1
-; LA64-NEXT:    vinsgr2vr.d $vr2, $a1, 1
-; LA64-NEXT:    xvpermi.q $xr2, $xr1, 2
-; LA64-NEXT:    xvst $xr2, $a0, 0
-; LA64-NEXT:    ret
-entry:
-  %va = load <4 x i64>, ptr %a
-  %vb = load <4 x i64>, ptr %b
-  %vc = shufflevector <4 x i64> %va, <4 x i64> %vb, <4 x i32> <i32 4, i32 5, i32 6, i32 0>
-  store <4 x i64> %vc, ptr %d
-  ret void
-}
-
 define void @xvinsve0_v4f64_h(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK-LABEL: xvinsve0_v4f64_h:
 ; CHECK:       # %bb.0: # %entry

From df48cda91fa9c64a7194739aedaefb1c4af4c5c5 Mon Sep 17 00:00:00 2001
From: Qi Zhao <zhaoqi01@loongson.cn>
Date: Fri, 26 Sep 2025 20:15:21 +0800
Subject: [PATCH 3/3] update tests

---
 .../ir-instruction/shuffle-as-xvinsve0.ll     | 28 +++++++++----------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll
index 218dafa581a9e..b5d5c9c15d7c8 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll
@@ -81,8 +81,8 @@ define void @xvinsve0_v8f32_l(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xvld $xr0, $a1, 0
 ; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI8_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI8_0)
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI2_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI2_0)
 ; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
 ; CHECK-NEXT:    xvst $xr2, $a0, 0
 ; CHECK-NEXT:    ret
@@ -99,8 +99,8 @@ define void @xvinsve0_v8i32_h_1(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xvld $xr0, $a1, 0
 ; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI10_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI10_0)
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI3_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI3_0)
 ; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
 ; CHECK-NEXT:    xvst $xr2, $a0, 0
 ; CHECK-NEXT:    ret
@@ -172,8 +172,8 @@ define void @xvinsve0_v8f32_h(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xvld $xr0, $a1, 0
 ; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI17_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI17_0)
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI5_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI5_0)
 ; CHECK-NEXT:    xvshuf.w $xr2, $xr1, $xr0
 ; CHECK-NEXT:    xvst $xr2, $a0, 0
 ; CHECK-NEXT:    ret
@@ -191,8 +191,8 @@ define void @xvinsve0_v4i64_l_1(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xvld $xr0, $a1, 0
 ; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI19_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI19_0)
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI6_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI6_0)
 ; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
 ; CHECK-NEXT:    xvst $xr2, $a0, 0
 ; CHECK-NEXT:    ret
@@ -256,8 +256,8 @@ define void @xvinsve0_v4f64_l(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xvld $xr0, $a1, 0
 ; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI22_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI22_0)
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI8_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI8_0)
 ; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
 ; CHECK-NEXT:    xvst $xr2, $a0, 0
 ; CHECK-NEXT:    ret
@@ -274,8 +274,8 @@ define void @xvinsve0_v4i64_h_0(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xvld $xr0, $a1, 0
 ; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI23_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI23_0)
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI9_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI9_0)
 ; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
 ; CHECK-NEXT:    xvst $xr2, $a0, 0
 ; CHECK-NEXT:    ret
@@ -339,8 +339,8 @@ define void @xvinsve0_v4f64_h(ptr %d, ptr %a, ptr %b) nounwind {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xvld $xr0, $a1, 0
 ; CHECK-NEXT:    xvld $xr1, $a2, 0
-; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI27_0)
-; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI27_0)
+; CHECK-NEXT:    pcalau12i $a1, %pc_hi20(.LCPI11_0)
+; CHECK-NEXT:    xvld $xr2, $a1, %pc_lo12(.LCPI11_0)
 ; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
 ; CHECK-NEXT:    xvst $xr2, $a0, 0
 ; CHECK-NEXT:    ret