From d6d8d35657b0d3a3bf18fd8cd60ea272c7372fec Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Wed, 18 Jun 2025 22:44:25 +0800 Subject: [PATCH 1/2] [SCCP] Add pre-commit tests. NFC. --- llvm/test/Transforms/SCCP/uscmp.ll | 76 ++++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) create mode 100644 llvm/test/Transforms/SCCP/uscmp.ll diff --git a/llvm/test/Transforms/SCCP/uscmp.ll b/llvm/test/Transforms/SCCP/uscmp.ll new file mode 100644 index 0000000000000..9b9974a93a009 --- /dev/null +++ b/llvm/test/Transforms/SCCP/uscmp.ll @@ -0,0 +1,76 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -passes=sccp -S < %s | FileCheck %s + +define i32 @scmp_to_sub(i32 range(i32 -1, 2) %a) { +; CHECK-LABEL: define i32 @scmp_to_sub( +; CHECK-SAME: i32 range(i32 -1, 2) [[A:%.*]]) { +; CHECK-NEXT: [[SCMP:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0) +; CHECK-NEXT: ret i32 [[SCMP]] +; + %scmp = call i32 @llvm.scmp(i32 %a, i32 0) + ret i32 %scmp +} + +define i32 @scmp_zext_to_sub(i1 %a, i1 %b) { +; CHECK-LABEL: define i32 @scmp_zext_to_sub( +; CHECK-SAME: i1 [[A:%.*]], i1 [[B:%.*]]) { +; CHECK-NEXT: [[ZEXT_A:%.*]] = zext i1 [[A]] to i32 +; CHECK-NEXT: [[ZEXT_B:%.*]] = zext i1 [[B]] to i32 +; CHECK-NEXT: [[SCMP:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[ZEXT_A]], i32 [[ZEXT_B]]) +; CHECK-NEXT: ret i32 [[SCMP]] +; + %zext_a = zext i1 %a to i32 + %zext_b = zext i1 %b to i32 + %scmp = call i32 @llvm.scmp(i32 %zext_a, i32 %zext_b) + ret i32 %scmp +} + +define i8 @scmp_to_sub_trunc(i32 range(i32 -1, 2) %a) { +; CHECK-LABEL: define i8 @scmp_to_sub_trunc( +; CHECK-SAME: i32 range(i32 -1, 2) [[A:%.*]]) { +; CHECK-NEXT: [[SCMP:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[A]], i32 0) +; CHECK-NEXT: ret i8 [[SCMP]] +; + %scmp = call i8 @llvm.scmp(i32 %a, i32 0) + ret i8 %scmp +} + +define i64 @scmp_to_sub_sext(i32 range(i32 -1, 2) %a) { +; CHECK-LABEL: define i64 @scmp_to_sub_sext( +; CHECK-SAME: i32 range(i32 -1, 2) [[A:%.*]]) { +; CHECK-NEXT: [[SCMP:%.*]] = call i64 @llvm.scmp.i64.i32(i32 [[A]], i32 0) +; CHECK-NEXT: ret i64 [[SCMP]] +; + %scmp = call i64 @llvm.scmp(i32 %a, i32 0) + ret i64 %scmp +} + +define i32 @scmp_to_sub_small_range(i32 range(i32 -1, 1) %a) { +; CHECK-LABEL: define i32 @scmp_to_sub_small_range( +; CHECK-SAME: i32 range(i32 -1, 1) [[A:%.*]]) { +; CHECK-NEXT: [[SCMP:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0) +; CHECK-NEXT: ret i32 [[SCMP]] +; + %scmp = call i32 @llvm.scmp(i32 %a, i32 0) + ret i32 %scmp +} + +define i32 @ucmp_to_sub(i32 range(i32 0, 3) %a) { +; CHECK-LABEL: define i32 @ucmp_to_sub( +; CHECK-SAME: i32 range(i32 0, 3) [[A:%.*]]) { +; CHECK-NEXT: [[SCMP:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 1) +; CHECK-NEXT: ret i32 [[SCMP]] +; + %scmp = call i32 @llvm.scmp(i32 %a, i32 1) + ret i32 %scmp +} + +define i32 @scmp_to_sub_large_range(i32 range(i32 -1, 3) %a) { +; CHECK-LABEL: define i32 @scmp_to_sub_large_range( +; CHECK-SAME: i32 range(i32 -1, 3) [[A:%.*]]) { +; CHECK-NEXT: [[SCMP:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0) +; CHECK-NEXT: ret i32 [[SCMP]] +; + %scmp = call i32 @llvm.scmp(i32 %a, i32 0) + ret i32 %scmp +} From 79e351d39ef4313e32adce40a1304a5d90361e58 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Wed, 18 Jun 2025 22:45:17 +0800 Subject: [PATCH 2/2] [SCCP] Simplify [us]cmp(X, Y) into X - Y --- llvm/lib/Transforms/Utils/SCCPSolver.cpp | 37 +++++++++++++++++++++++- llvm/test/Transforms/SCCP/uscmp.ll | 14 +++++---- 2 files changed, 44 insertions(+), 7 deletions(-) diff --git a/llvm/lib/Transforms/Utils/SCCPSolver.cpp b/llvm/lib/Transforms/Utils/SCCPSolver.cpp index f4b378b82daec..0e3f0647d6284 100644 --- a/llvm/lib/Transforms/Utils/SCCPSolver.cpp +++ b/llvm/lib/Transforms/Utils/SCCPSolver.cpp @@ -245,11 +245,46 @@ static Value *simplifyInstruction(SCCPSolver &Solver, const APInt *RHSC; // Remove masking operations. if (match(&Inst, m_And(m_Value(X), m_LowBitMask(RHSC)))) { - ConstantRange LRange = GetRange(Inst.getOperand(0)); + ConstantRange LRange = GetRange(X); if (LRange.getUnsignedMax().ule(*RHSC)) return X; } + if (auto *II = dyn_cast(&Inst)) { + Intrinsic::ID IID = II->getIntrinsicID(); + // Check if we can simplify [us]cmp(X, Y) to X - Y. + if (IID == Intrinsic::scmp || IID == Intrinsic::ucmp) { + Value *LHS = II->getOperand(0); + Value *RHS = II->getOperand(1); + unsigned BitWidth = LHS->getType()->getScalarSizeInBits(); + ConstantRange LRange = GetRange(LHS); + if (LRange.isSizeLargerThan(3)) + return nullptr; + ConstantRange RRange = GetRange(RHS); + if (RRange.isSizeLargerThan(3)) + return nullptr; + ConstantRange RHSLower = RRange.sub(APInt(BitWidth, 1)); + ConstantRange RHSUpper = RRange.add(APInt(BitWidth, 1)); + ICmpInst::Predicate Pred = + IID == Intrinsic::scmp ? CmpInst::ICMP_SLE : CmpInst::ICMP_ULE; + if (!RHSLower.icmp(Pred, LRange) || !LRange.icmp(Pred, RHSUpper)) + return nullptr; + Instruction *Sub = BinaryOperator::CreateSub(LHS, RHS, Inst.getName(), + Inst.getIterator()); + if (IID == Intrinsic::scmp) + Sub->setHasNoSignedWrap(true); + Sub->setDebugLoc(Inst.getDebugLoc()); + InsertedValues.insert(Sub); + if (Sub->getType() != Inst.getType()) { + Sub = CastInst::CreateIntegerCast(Sub, Inst.getType(), true, "", + Inst.getIterator()); + Sub->setDebugLoc(Inst.getDebugLoc()); + InsertedValues.insert(Sub); + } + return Sub; + } + } + return nullptr; } diff --git a/llvm/test/Transforms/SCCP/uscmp.ll b/llvm/test/Transforms/SCCP/uscmp.ll index 9b9974a93a009..ea5a65556ac55 100644 --- a/llvm/test/Transforms/SCCP/uscmp.ll +++ b/llvm/test/Transforms/SCCP/uscmp.ll @@ -4,7 +4,7 @@ define i32 @scmp_to_sub(i32 range(i32 -1, 2) %a) { ; CHECK-LABEL: define i32 @scmp_to_sub( ; CHECK-SAME: i32 range(i32 -1, 2) [[A:%.*]]) { -; CHECK-NEXT: [[SCMP:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0) +; CHECK-NEXT: [[SCMP:%.*]] = sub nsw i32 [[A]], 0 ; CHECK-NEXT: ret i32 [[SCMP]] ; %scmp = call i32 @llvm.scmp(i32 %a, i32 0) @@ -16,7 +16,7 @@ define i32 @scmp_zext_to_sub(i1 %a, i1 %b) { ; CHECK-SAME: i1 [[A:%.*]], i1 [[B:%.*]]) { ; CHECK-NEXT: [[ZEXT_A:%.*]] = zext i1 [[A]] to i32 ; CHECK-NEXT: [[ZEXT_B:%.*]] = zext i1 [[B]] to i32 -; CHECK-NEXT: [[SCMP:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[ZEXT_A]], i32 [[ZEXT_B]]) +; CHECK-NEXT: [[SCMP:%.*]] = sub nsw i32 [[ZEXT_A]], [[ZEXT_B]] ; CHECK-NEXT: ret i32 [[SCMP]] ; %zext_a = zext i1 %a to i32 @@ -28,7 +28,8 @@ define i32 @scmp_zext_to_sub(i1 %a, i1 %b) { define i8 @scmp_to_sub_trunc(i32 range(i32 -1, 2) %a) { ; CHECK-LABEL: define i8 @scmp_to_sub_trunc( ; CHECK-SAME: i32 range(i32 -1, 2) [[A:%.*]]) { -; CHECK-NEXT: [[SCMP:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[A]], i32 0) +; CHECK-NEXT: [[SCMP1:%.*]] = sub nsw i32 [[A]], 0 +; CHECK-NEXT: [[SCMP:%.*]] = trunc i32 [[SCMP1]] to i8 ; CHECK-NEXT: ret i8 [[SCMP]] ; %scmp = call i8 @llvm.scmp(i32 %a, i32 0) @@ -38,7 +39,8 @@ define i8 @scmp_to_sub_trunc(i32 range(i32 -1, 2) %a) { define i64 @scmp_to_sub_sext(i32 range(i32 -1, 2) %a) { ; CHECK-LABEL: define i64 @scmp_to_sub_sext( ; CHECK-SAME: i32 range(i32 -1, 2) [[A:%.*]]) { -; CHECK-NEXT: [[SCMP:%.*]] = call i64 @llvm.scmp.i64.i32(i32 [[A]], i32 0) +; CHECK-NEXT: [[SCMP1:%.*]] = sub nsw i32 [[A]], 0 +; CHECK-NEXT: [[SCMP:%.*]] = sext i32 [[SCMP1]] to i64 ; CHECK-NEXT: ret i64 [[SCMP]] ; %scmp = call i64 @llvm.scmp(i32 %a, i32 0) @@ -48,7 +50,7 @@ define i64 @scmp_to_sub_sext(i32 range(i32 -1, 2) %a) { define i32 @scmp_to_sub_small_range(i32 range(i32 -1, 1) %a) { ; CHECK-LABEL: define i32 @scmp_to_sub_small_range( ; CHECK-SAME: i32 range(i32 -1, 1) [[A:%.*]]) { -; CHECK-NEXT: [[SCMP:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 0) +; CHECK-NEXT: [[SCMP:%.*]] = sub nsw i32 [[A]], 0 ; CHECK-NEXT: ret i32 [[SCMP]] ; %scmp = call i32 @llvm.scmp(i32 %a, i32 0) @@ -58,7 +60,7 @@ define i32 @scmp_to_sub_small_range(i32 range(i32 -1, 1) %a) { define i32 @ucmp_to_sub(i32 range(i32 0, 3) %a) { ; CHECK-LABEL: define i32 @ucmp_to_sub( ; CHECK-SAME: i32 range(i32 0, 3) [[A:%.*]]) { -; CHECK-NEXT: [[SCMP:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[A]], i32 1) +; CHECK-NEXT: [[SCMP:%.*]] = sub nsw i32 [[A]], 1 ; CHECK-NEXT: ret i32 [[SCMP]] ; %scmp = call i32 @llvm.scmp(i32 %a, i32 1)