From d4475cb5e54f0a495c86fdf91b80c8c8716757e8 Mon Sep 17 00:00:00 2001 From: mattarde Date: Tue, 22 Apr 2025 08:27:06 -0700 Subject: [PATCH 01/15] [X86][GlobalIsel] support fabs for f80 --- .../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 5 +++++ .../CodeGen/X86/GlobalISel/fabs-scalar.ll | 20 +++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp index 11dd05c584983..cf23782e1f424 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp @@ -466,6 +466,11 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, (UseX87 && typeInSet(0, {s80})(Query)); }); + //TODO: f32 and f64 FABS require xmm support + getActionDefinitionsBuilder(G_FABS) + .legalFor(UseX87, {s8, s80}) + .lower(); + // fp comparison getActionDefinitionsBuilder(G_FCMP) .legalFor(HasSSE1 || UseX87, {s8, s32}) diff --git a/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll new file mode 100644 index 0000000000000..39ce3a492a33c --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll @@ -0,0 +1,20 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-linux -mattr=+x87,-sse,-sse2 | FileCheck %s -check-prefixes=X64 +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel -mattr=+x87,-sse,-sse2 | FileCheck %s -check-prefixes=GISEL + +define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) { +; X64-LABEL: test_x86_fp80_abs: +; X64: # %bb.0: +; X64-NEXT: fldt {{[0-9]+}}(%rsp) +; X64-NEXT: fabs +; X64-NEXT: retq +; +; GISEL-LABEL: test_x86_fp80_abs: +; GISEL: # %bb.0: +; GISEL-NEXT: fldt {{[0-9]+}}(%rsp) +; GISEL-NEXT: fabs +; GISEL-NEXT: retq + %abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg) + ret x86_fp80 %abs +} From 22e2c831c93214116732a6e937f226ec17cf2a54 Mon Sep 17 00:00:00 2001 From: mattarde Date: Wed, 23 Apr 2025 22:40:23 -0700 Subject: [PATCH 02/15] add float and double --- .../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 5 +---- .../CodeGen/X86/GlobalISel/fabs-scalar.ll | 20 ------------------- llvm/test/CodeGen/X86/isel-fabs.ll | 18 ++++++++++++++++- 3 files changed, 18 insertions(+), 25 deletions(-) delete mode 100644 llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp index cf23782e1f424..b32b3e480c83e 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp @@ -466,10 +466,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, (UseX87 && typeInSet(0, {s80})(Query)); }); - //TODO: f32 and f64 FABS require xmm support - getActionDefinitionsBuilder(G_FABS) - .legalFor(UseX87, {s8, s80}) - .lower(); + getActionDefinitionsBuilder(G_FABS).legalFor(UseX87, {s8, s80}).lower(); // fp comparison getActionDefinitionsBuilder(G_FCMP) diff --git a/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll deleted file mode 100644 index 39ce3a492a33c..0000000000000 --- a/llvm/test/CodeGen/X86/GlobalISel/fabs-scalar.ll +++ /dev/null @@ -1,20 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64 -; RUN: llc < %s -mtriple=x86_64-linux -mattr=+x87,-sse,-sse2 | FileCheck %s -check-prefixes=X64 -; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel -mattr=+x87,-sse,-sse2 | FileCheck %s -check-prefixes=GISEL - -define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) { -; X64-LABEL: test_x86_fp80_abs: -; X64: # %bb.0: -; X64-NEXT: fldt {{[0-9]+}}(%rsp) -; X64-NEXT: fabs -; X64-NEXT: retq -; -; GISEL-LABEL: test_x86_fp80_abs: -; GISEL: # %bb.0: -; GISEL-NEXT: fldt {{[0-9]+}}(%rsp) -; GISEL-NEXT: fabs -; GISEL-NEXT: retq - %abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg) - ret x86_fp80 %abs -} diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll index 10bd5799280ad..b156aadc2bb90 100644 --- a/llvm/test/CodeGen/X86/isel-fabs.ll +++ b/llvm/test/CodeGen/X86/isel-fabs.ll @@ -1,9 +1,10 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 ; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 | FileCheck %s --check-prefixes=X64 ; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64 +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 -mattr=+x87,+sse,+sse2 -o - | FileCheck %s --check-prefix=X64 ; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=X86 ; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86 - +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=1 -mattr=+x87,+sse,+sse2 -o - | FileCheck %s -check-prefixes=GISEL define float @test_float_abs(float %arg) { ; X64-LABEL: test_float_abs: @@ -22,6 +23,12 @@ define float @test_float_abs(float %arg) { ; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; FASTISEL-X86-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF ; FASTISEL-X86-NEXT: retl +; GISEL-LABEL: test_float_abs: +; GISEL: # %bb.0: +; GISEL-NEXT: movd %xmm0, %eax +; GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF +; GISEL-NEXT: movd %eax, %xmm0 +; GISEL-NEXT: retq %abs = tail call float @llvm.fabs.f32(float %arg) ret float %abs } @@ -45,6 +52,15 @@ define double @test_double_abs(double %arg) { ; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; FASTISEL-X86-NEXT: andl $2147483647, %edx # imm = 0x7FFFFFFF ; FASTISEL-X86-NEXT: retl +; +; GISEL-LABEL: test_double_abs: +; GISEL: # %bb.0: +; GISEL-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF +; GISEL-NEXT: movq %xmm0, %rcx +; GISEL-NEXT: andq %rax, %rcx +; GISEL-NEXT: movq %rcx, %xmm0 +; GISEL-NEXT: retq %abs = tail call double @llvm.fabs.f64(double %arg) ret double %abs } + From 0ed32a7a5e91ec7324e83811e3026638c2de7370 Mon Sep 17 00:00:00 2001 From: mattarde Date: Thu, 1 May 2025 04:47:19 -0700 Subject: [PATCH 03/15] update test --- llvm/test/CodeGen/X86/isel-fabs.ll | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll index b156aadc2bb90..bd7ae6af09b16 100644 --- a/llvm/test/CodeGen/X86/isel-fabs.ll +++ b/llvm/test/CodeGen/X86/isel-fabs.ll @@ -7,10 +7,10 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=1 -mattr=+x87,+sse,+sse2 -o - | FileCheck %s -check-prefixes=GISEL define float @test_float_abs(float %arg) { -; X64-LABEL: test_float_abs: -; X64: # %bb.0: -; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 -; X64-NEXT: retq +; SDAG-X64-LABEL: test_float_abs: +; SDAG-X64: # %bb.0: +; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; SDAG-X64-NEXT: retq ; ; X86-LABEL: test_float_abs: ; X86: # %bb.0: @@ -34,10 +34,10 @@ define float @test_float_abs(float %arg) { } define double @test_double_abs(double %arg) { -; X64-LABEL: test_double_abs: -; X64: # %bb.0: -; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 -; X64-NEXT: retq +; SDAG-X64-LABEL: test_double_abs: +; SDAG-X64: # %bb.0: +; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; SDAG-X64-NEXT: retq ; ; X86-LABEL: test_double_abs: ; X86: # %bb.0: From 8221bc6224a868085d0a883884757e20f5f35d87 Mon Sep 17 00:00:00 2001 From: mattarde Date: Thu, 1 May 2025 10:53:19 -0700 Subject: [PATCH 04/15] remove s8 --- llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp index b32b3e480c83e..ae3c60bea3625 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp @@ -466,7 +466,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, (UseX87 && typeInSet(0, {s80})(Query)); }); - getActionDefinitionsBuilder(G_FABS).legalFor(UseX87, {s8, s80}).lower(); + getActionDefinitionsBuilder(G_FABS).legalFor(UseX87, {s80}).lower(); // fp comparison getActionDefinitionsBuilder(G_FCMP) From 6a58699c2bd06420380ba06dff1f994529dbbca8 Mon Sep 17 00:00:00 2001 From: mattarde Date: Tue, 27 May 2025 00:49:09 -0700 Subject: [PATCH 05/15] update fabs for f32 and f64 --- .../CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +- .../X86/GISel/X86InstructionSelector.cpp | 2 +- .../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 4 +- llvm/test/CodeGen/X86/isel-fabs-x87.ll | 30 ++++++--- llvm/test/CodeGen/X86/isel-fabs.ll | 65 +++++++++++++------ 5 files changed, 72 insertions(+), 31 deletions(-) diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index 7b18a98d7f3ca..9e070bde5b9b1 100644 --- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -9431,7 +9431,7 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerFAbs(MachineInstr &MI) { MIRBuilder.buildConstant( Ty, APInt::getSignedMaxValue(Ty.getScalarSizeInBits()))); - MI.eraseFromParent(); + MI.eraseFromParent(); return Legalized; } diff --git a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp index 3090ad313b90d..4f69ed5592277 100644 --- a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp +++ b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp @@ -94,7 +94,7 @@ class X86InstructionSelector : public InstructionSelector { bool selectCmp(MachineInstr &I, MachineRegisterInfo &MRI, MachineFunction &MF) const; bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI, - MachineFunction &MF) const; + MachineFunction &MF) const; bool selectUAddSub(MachineInstr &I, MachineRegisterInfo &MRI, MachineFunction &MF) const; bool selectDebugInstr(MachineInstr &I, MachineRegisterInfo &MRI) const; diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp index ae3c60bea3625..7cc02fe68f202 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp @@ -466,7 +466,9 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, (UseX87 && typeInSet(0, {s80})(Query)); }); - getActionDefinitionsBuilder(G_FABS).legalFor(UseX87, {s80}).lower(); + getActionDefinitionsBuilder(G_FABS) + .legalFor(UseX87 && !HasSSE2, {s32, s64, s80}) + .lower(); // fp comparison getActionDefinitionsBuilder(G_FCMP) diff --git a/llvm/test/CodeGen/X86/isel-fabs-x87.ll b/llvm/test/CodeGen/X86/isel-fabs-x87.ll index 8b846499946cc..6d2ef980a6a32 100644 --- a/llvm/test/CodeGen/X86/isel-fabs-x87.ll +++ b/llvm/test/CodeGen/X86/isel-fabs-x87.ll @@ -1,15 +1,23 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 -; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X64 -; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64 -; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86 -; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86 +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64 +; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64 +; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64 +; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86,SDAG-X86 +; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86 +; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86 define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) { -; X64-LABEL: test_x86_fp80_abs: -; X64: # %bb.0: -; X64-NEXT: fldt {{[0-9]+}}(%rsp) -; X64-NEXT: fabs -; X64-NEXT: retq +; SDAG-X64-LABEL: test_x86_fp80_abs: +; SDAG-X64: # %bb.0: +; SDAG-X64-NEXT: fldt {{[0-9]+}}(%rsp) +; SDAG-X64-NEXT: fabs +; SDAG-X64-NEXT: retq +; +; FASTISEL-X64-LABEL: test_x86_fp80_abs: +; FASTISEL-X64: # %bb.0: +; FASTISEL-X64-NEXT: fldt {{[0-9]+}}(%rsp) +; FASTISEL-X64-NEXT: fabs +; FASTISEL-X64-NEXT: retq ; ; X86-LABEL: test_x86_fp80_abs: ; X86: # %bb.0: @@ -19,3 +27,7 @@ define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) { %abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg) ret x86_fp80 %abs } +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; FASTISEL-X86: {{.*}} +; GISEL-X86: {{.*}} +; SDAG-X86: {{.*}} diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll index bd7ae6af09b16..c76ddaf158af4 100644 --- a/llvm/test/CodeGen/X86/isel-fabs.ll +++ b/llvm/test/CodeGen/X86/isel-fabs.ll @@ -1,10 +1,10 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 -; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 | FileCheck %s --check-prefixes=X64 -; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64 -; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 -mattr=+x87,+sse,+sse2 -o - | FileCheck %s --check-prefix=X64 -; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=X86 +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64 +; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64 +; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64 +; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=SDAG-X86 ; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86 -; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=1 -mattr=+x87,+sse,+sse2 -o - | FileCheck %s -check-prefixes=GISEL +; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86 define float @test_float_abs(float %arg) { ; SDAG-X64-LABEL: test_float_abs: @@ -18,17 +18,30 @@ define float @test_float_abs(float %arg) { ; X86-NEXT: andl {{[0-9]+}}(%esp), %eax ; X86-NEXT: retl ; +; GISEL-X64-LABEL: test_float_abs: +; GISEL-X64: # %bb.0: +; GISEL-X64-NEXT: movd %xmm0, %eax +; GISEL-X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF +; GISEL-X64-NEXT: movd %eax, %xmm0 +; GISEL-X64-NEXT: retq +; +; SDAG-X86-LABEL: test_float_abs: +; SDAG-X86: # %bb.0: +; SDAG-X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF +; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %eax +; SDAG-X86-NEXT: retl +; ; FASTISEL-X86-LABEL: test_float_abs: ; FASTISEL-X86: # %bb.0: ; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; FASTISEL-X86-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF ; FASTISEL-X86-NEXT: retl -; GISEL-LABEL: test_float_abs: -; GISEL: # %bb.0: -; GISEL-NEXT: movd %xmm0, %eax -; GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF -; GISEL-NEXT: movd %eax, %xmm0 -; GISEL-NEXT: retq +; +; GISEL-X86-LABEL: test_float_abs: +; GISEL-X86: # %bb.0: +; GISEL-X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF +; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %eax +; GISEL-X86-NEXT: retl %abs = tail call float @llvm.fabs.f32(float %arg) ret float %abs } @@ -46,6 +59,21 @@ define double @test_double_abs(double %arg) { ; X86-NEXT: andl {{[0-9]+}}(%esp), %edx ; X86-NEXT: retl ; +; GISEL-X64-LABEL: test_double_abs: +; GISEL-X64: # %bb.0: +; GISEL-X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF +; GISEL-X64-NEXT: movq %xmm0, %rcx +; GISEL-X64-NEXT: andq %rax, %rcx +; GISEL-X64-NEXT: movq %rcx, %xmm0 +; GISEL-X64-NEXT: retq +; +; SDAG-X86-LABEL: test_double_abs: +; SDAG-X86: # %bb.0: +; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; SDAG-X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF +; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %edx +; SDAG-X86-NEXT: retl +; ; FASTISEL-X86-LABEL: test_double_abs: ; FASTISEL-X86: # %bb.0: ; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx @@ -53,14 +81,13 @@ define double @test_double_abs(double %arg) { ; FASTISEL-X86-NEXT: andl $2147483647, %edx # imm = 0x7FFFFFFF ; FASTISEL-X86-NEXT: retl ; -; GISEL-LABEL: test_double_abs: -; GISEL: # %bb.0: -; GISEL-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF -; GISEL-NEXT: movq %xmm0, %rcx -; GISEL-NEXT: andq %rax, %rcx -; GISEL-NEXT: movq %rcx, %xmm0 -; GISEL-NEXT: retq +; GISEL-X86-LABEL: test_double_abs: +; GISEL-X86: # %bb.0: +; GISEL-X86-NEXT: movl $-1, %eax +; GISEL-X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF +; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %eax +; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %edx +; GISEL-X86-NEXT: retl %abs = tail call double @llvm.fabs.f64(double %arg) ret double %abs } - From db0e1cbb19d2652a4a61dea2888392a9ee57398f Mon Sep 17 00:00:00 2001 From: mattarde Date: Tue, 27 May 2025 00:53:38 -0700 Subject: [PATCH 06/15] fix indent --- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +- llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index 9e070bde5b9b1..7b18a98d7f3ca 100644 --- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -9431,7 +9431,7 @@ LegalizerHelper::LegalizeResult LegalizerHelper::lowerFAbs(MachineInstr &MI) { MIRBuilder.buildConstant( Ty, APInt::getSignedMaxValue(Ty.getScalarSizeInBits()))); - MI.eraseFromParent(); + MI.eraseFromParent(); return Legalized; } diff --git a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp index 4f69ed5592277..3090ad313b90d 100644 --- a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp +++ b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp @@ -94,7 +94,7 @@ class X86InstructionSelector : public InstructionSelector { bool selectCmp(MachineInstr &I, MachineRegisterInfo &MRI, MachineFunction &MF) const; bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI, - MachineFunction &MF) const; + MachineFunction &MF) const; bool selectUAddSub(MachineInstr &I, MachineRegisterInfo &MRI, MachineFunction &MF) const; bool selectDebugInstr(MachineInstr &I, MachineRegisterInfo &MRI) const; From f35b674189ddaf17a8723c7e97f6e72eab028e58 Mon Sep 17 00:00:00 2001 From: mattarde Date: Tue, 3 Jun 2025 00:25:45 -0700 Subject: [PATCH 07/15] add x87 specific runs --- .../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 41 ++++++++++++++- llvm/lib/Target/X86/GISel/X86LegalizerInfo.h | 2 + llvm/test/CodeGen/X86/isel-fabs-x87.ll | 32 ++++-------- llvm/test/CodeGen/X86/isel-fabs.ll | 51 +++++++++++-------- 4 files changed, 84 insertions(+), 42 deletions(-) diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp index 7cc02fe68f202..3f73898c69c42 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp @@ -468,7 +468,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, getActionDefinitionsBuilder(G_FABS) .legalFor(UseX87 && !HasSSE2, {s32, s64, s80}) - .lower(); + .custom(); // fp comparison getActionDefinitionsBuilder(G_FCMP) @@ -673,6 +673,8 @@ bool X86LegalizerInfo::legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI, return legalizeSITOFP(MI, MRI, Helper); case TargetOpcode::G_FPTOSI: return legalizeFPTOSI(MI, MRI, Helper); + case TargetOpcode::G_FABS: + return legalizeFAbs(MI, MRI, Helper); } llvm_unreachable("expected switch to return"); } @@ -839,6 +841,43 @@ bool X86LegalizerInfo::legalizeNarrowingStore(MachineInstr &MI, return true; } +bool X86LegalizerInfo::legalizeFAbs(MachineInstr &MI, + MachineRegisterInfo &MRI, + LegalizerHelper &Helper) const { + + MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; + Register SrcReg = MI.getOperand(1).getReg(); + Register DstReg = MI.getOperand(0).getReg(); + LLT Ty = MRI.getType(DstReg); + if (Subtarget.is32Bit()) { + // Reset sign bit + MIRBuilder.buildAnd( + DstReg, SrcReg, + MIRBuilder.buildConstant( + Ty, APInt::getSignedMaxValue(Ty.getScalarSizeInBits()))); + } else { + // In 64 bit mode, constant pool is used. + auto &MF = MIRBuilder.getMF(); + Type *IRTy = getTypeForLLT(Ty, MF.getFunction().getContext()); + Constant *ConstMask = ConstantInt::get( + IRTy, APInt::getSignedMaxValue(Ty.getScalarSizeInBits())); + LLT DstTy = MRI.getType(DstReg); + const DataLayout &DL = MIRBuilder.getDataLayout(); + unsigned AddrSpace = DL.getDefaultGlobalsAddressSpace(); + Align Alignment(DL.getABITypeAlign( + getTypeForLLT(DstTy, MF.getFunction().getContext()))); + auto Addr = MIRBuilder.buildConstantPool( + LLT::pointer(AddrSpace, DL.getPointerSizeInBits(AddrSpace)), + MF.getConstantPool()->getConstantPoolIndex(ConstMask, Alignment)); + MachineMemOperand *MMO = + MF.getMachineMemOperand(MachinePointerInfo::getConstantPool(MF), + MachineMemOperand::MOLoad, DstTy, Alignment); + auto LoadedMask = MIRBuilder.buildLoad(DstTy, Addr, *MMO); + MIRBuilder.buildAnd(DstReg, SrcReg, LoadedMask); + } + MI.eraseFromParent(); + return true; +} bool X86LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper, MachineInstr &MI) const { return true; diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h index 1ba82674ed4c6..b70acb30b14fc 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h @@ -54,6 +54,8 @@ class X86LegalizerInfo : public LegalizerInfo { bool legalizeFPTOSI(MachineInstr &MI, MachineRegisterInfo &MRI, LegalizerHelper &Helper) const; + bool legalizeFAbs(MachineInstr &MI, MachineRegisterInfo &MRI, + LegalizerHelper &Helper) const; }; } // namespace llvm #endif diff --git a/llvm/test/CodeGen/X86/isel-fabs-x87.ll b/llvm/test/CodeGen/X86/isel-fabs-x87.ll index 6d2ef980a6a32..e9863ef7a93e1 100644 --- a/llvm/test/CodeGen/X86/isel-fabs-x87.ll +++ b/llvm/test/CodeGen/X86/isel-fabs-x87.ll @@ -1,23 +1,17 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 -; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64 -; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64 -; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64 -; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86,SDAG-X86 -; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86 -; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X64 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64 +; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86 +; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86 +; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86 define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) { -; SDAG-X64-LABEL: test_x86_fp80_abs: -; SDAG-X64: # %bb.0: -; SDAG-X64-NEXT: fldt {{[0-9]+}}(%rsp) -; SDAG-X64-NEXT: fabs -; SDAG-X64-NEXT: retq -; -; FASTISEL-X64-LABEL: test_x86_fp80_abs: -; FASTISEL-X64: # %bb.0: -; FASTISEL-X64-NEXT: fldt {{[0-9]+}}(%rsp) -; FASTISEL-X64-NEXT: fabs -; FASTISEL-X64-NEXT: retq +; X64-LABEL: test_x86_fp80_abs: +; X64: # %bb.0: +; X64-NEXT: fldt {{[0-9]+}}(%rsp) +; X64-NEXT: fabs +; X64-NEXT: retq ; ; X86-LABEL: test_x86_fp80_abs: ; X86: # %bb.0: @@ -27,7 +21,3 @@ define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) { %abs = tail call x86_fp80 @llvm.fabs.f80(x86_fp80 %arg) ret x86_fp80 %abs } -;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: -; FASTISEL-X86: {{.*}} -; GISEL-X86: {{.*}} -; SDAG-X86: {{.*}} diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll index c76ddaf158af4..1734088b994b9 100644 --- a/llvm/test/CodeGen/X86/isel-fabs.ll +++ b/llvm/test/CodeGen/X86/isel-fabs.ll @@ -1,8 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 -; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SDAG-X64 -; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X64 -; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64 -; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=SDAG-X86 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 | FileCheck %s --check-prefixes=X64 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64 +; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=X86 ; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86 ; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86 @@ -17,19 +17,23 @@ define float @test_float_abs(float %arg) { ; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF ; X86-NEXT: andl {{[0-9]+}}(%esp), %eax ; X86-NEXT: retl +; X64-LABEL: test_float_abs: +; X64: # %bb.0: +; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; X64-NEXT: retq ; ; GISEL-X64-LABEL: test_float_abs: ; GISEL-X64: # %bb.0: ; GISEL-X64-NEXT: movd %xmm0, %eax -; GISEL-X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF +; GISEL-X64-NEXT: andl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax ; GISEL-X64-NEXT: movd %eax, %xmm0 ; GISEL-X64-NEXT: retq ; -; SDAG-X86-LABEL: test_float_abs: -; SDAG-X86: # %bb.0: -; SDAG-X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF -; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %eax -; SDAG-X86-NEXT: retl +; X86-LABEL: test_float_abs: +; X86: # %bb.0: +; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF +; X86-NEXT: andl {{[0-9]+}}(%esp), %eax +; X86-NEXT: retl ; ; FASTISEL-X86-LABEL: test_float_abs: ; FASTISEL-X86: # %bb.0: @@ -58,21 +62,24 @@ define double @test_double_abs(double %arg) { ; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF ; X86-NEXT: andl {{[0-9]+}}(%esp), %edx ; X86-NEXT: retl +; X64-LABEL: test_double_abs: +; X64: # %bb.0: +; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; X64-NEXT: retq ; ; GISEL-X64-LABEL: test_double_abs: ; GISEL-X64: # %bb.0: -; GISEL-X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF -; GISEL-X64-NEXT: movq %xmm0, %rcx -; GISEL-X64-NEXT: andq %rax, %rcx -; GISEL-X64-NEXT: movq %rcx, %xmm0 +; GISEL-X64-NEXT: movq %xmm0, %rax +; GISEL-X64-NEXT: andq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax +; GISEL-X64-NEXT: movq %rax, %xmm0 ; GISEL-X64-NEXT: retq ; -; SDAG-X86-LABEL: test_double_abs: -; SDAG-X86: # %bb.0: -; SDAG-X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; SDAG-X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF -; SDAG-X86-NEXT: andl {{[0-9]+}}(%esp), %edx -; SDAG-X86-NEXT: retl +; X86-LABEL: test_double_abs: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF +; X86-NEXT: andl {{[0-9]+}}(%esp), %edx +; X86-NEXT: retl ; ; FASTISEL-X86-LABEL: test_double_abs: ; FASTISEL-X86: # %bb.0: @@ -88,6 +95,10 @@ define double @test_double_abs(double %arg) { ; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %eax ; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %edx ; GISEL-X86-NEXT: retl + %abs = tail call double @llvm.fabs.f64(double %arg) ret double %abs } + +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; FASTISEL-X64: {{.*}} From 27825682558c41722a9687bf2c1293802925e65b Mon Sep 17 00:00:00 2001 From: mattarde Date: Thu, 5 Jun 2025 10:15:09 -0700 Subject: [PATCH 08/15] fix tst --- llvm/test/CodeGen/X86/isel-fabs.ll | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll index 1734088b994b9..986c4972690b7 100644 --- a/llvm/test/CodeGen/X86/isel-fabs.ll +++ b/llvm/test/CodeGen/X86/isel-fabs.ll @@ -12,11 +12,6 @@ define float @test_float_abs(float %arg) { ; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 ; SDAG-X64-NEXT: retq ; -; X86-LABEL: test_float_abs: -; X86: # %bb.0: -; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF -; X86-NEXT: andl {{[0-9]+}}(%esp), %eax -; X86-NEXT: retl ; X64-LABEL: test_float_abs: ; X64: # %bb.0: ; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 @@ -56,12 +51,6 @@ define double @test_double_abs(double %arg) { ; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 ; SDAG-X64-NEXT: retq ; -; X86-LABEL: test_double_abs: -; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF -; X86-NEXT: andl {{[0-9]+}}(%esp), %edx -; X86-NEXT: retl ; X64-LABEL: test_double_abs: ; X64: # %bb.0: ; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 From 860903d87d5eba1f3fa2d1e0c46cd89531d83032 Mon Sep 17 00:00:00 2001 From: mattarde Date: Thu, 5 Jun 2025 10:22:32 -0700 Subject: [PATCH 09/15] remove unused marker --- llvm/test/CodeGen/X86/isel-fabs.ll | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll index 986c4972690b7..798f9c3912568 100644 --- a/llvm/test/CodeGen/X86/isel-fabs.ll +++ b/llvm/test/CodeGen/X86/isel-fabs.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 ; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 | FileCheck %s --check-prefixes=X64 -; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64 ; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64 ; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=X86 ; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86 @@ -88,6 +88,3 @@ define double @test_double_abs(double %arg) { %abs = tail call double @llvm.fabs.f64(double %arg) ret double %abs } - -;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: -; FASTISEL-X64: {{.*}} From d4d3d44c817dfcdd8a09a7a00391224b27e2692f Mon Sep 17 00:00:00 2001 From: mattarde Date: Sat, 7 Jun 2025 04:06:23 -0700 Subject: [PATCH 10/15] fix clang format --- llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp index 3f73898c69c42..629342b417fdb 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp @@ -842,8 +842,8 @@ bool X86LegalizerInfo::legalizeNarrowingStore(MachineInstr &MI, } bool X86LegalizerInfo::legalizeFAbs(MachineInstr &MI, - MachineRegisterInfo &MRI, - LegalizerHelper &Helper) const { + MachineRegisterInfo &MRI, + LegalizerHelper &Helper) const { MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; Register SrcReg = MI.getOperand(1).getReg(); From 4838b22e610a787975b2037076a7e46f015b092a Mon Sep 17 00:00:00 2001 From: mattarde Date: Sat, 7 Jun 2025 04:20:21 -0700 Subject: [PATCH 11/15] fix clang format --- llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp index 629342b417fdb..f60f6c1bb7323 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp @@ -673,7 +673,7 @@ bool X86LegalizerInfo::legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI, return legalizeSITOFP(MI, MRI, Helper); case TargetOpcode::G_FPTOSI: return legalizeFPTOSI(MI, MRI, Helper); - case TargetOpcode::G_FABS: + case TargetOpcode::G_FABS: return legalizeFAbs(MI, MRI, Helper); } llvm_unreachable("expected switch to return"); @@ -841,8 +841,7 @@ bool X86LegalizerInfo::legalizeNarrowingStore(MachineInstr &MI, return true; } -bool X86LegalizerInfo::legalizeFAbs(MachineInstr &MI, - MachineRegisterInfo &MRI, +bool X86LegalizerInfo::legalizeFAbs(MachineInstr &MI, MachineRegisterInfo &MRI, LegalizerHelper &Helper) const { MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; From 63eebe0ed5fecb5c6c4e9989aea46cfb5a7b8cf2 Mon Sep 17 00:00:00 2001 From: mattarde Date: Wed, 11 Jun 2025 01:38:04 -0700 Subject: [PATCH 12/15] remove const pool --- .../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 42 +------------- llvm/lib/Target/X86/GISel/X86LegalizerInfo.h | 2 - llvm/test/CodeGen/X86/isel-fabs.ll | 58 ++++++++++--------- 3 files changed, 33 insertions(+), 69 deletions(-) diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp index f60f6c1bb7323..95c9a5c7db37b 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp @@ -467,8 +467,8 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, }); getActionDefinitionsBuilder(G_FABS) - .legalFor(UseX87 && !HasSSE2, {s32, s64, s80}) - .custom(); + .legalFor(UseX87 && !HasSSE2 && !HasSSE1, {s32, s64, s80}) + .lower(); // fp comparison getActionDefinitionsBuilder(G_FCMP) @@ -673,8 +673,6 @@ bool X86LegalizerInfo::legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI, return legalizeSITOFP(MI, MRI, Helper); case TargetOpcode::G_FPTOSI: return legalizeFPTOSI(MI, MRI, Helper); - case TargetOpcode::G_FABS: - return legalizeFAbs(MI, MRI, Helper); } llvm_unreachable("expected switch to return"); } @@ -841,42 +839,6 @@ bool X86LegalizerInfo::legalizeNarrowingStore(MachineInstr &MI, return true; } -bool X86LegalizerInfo::legalizeFAbs(MachineInstr &MI, MachineRegisterInfo &MRI, - LegalizerHelper &Helper) const { - - MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; - Register SrcReg = MI.getOperand(1).getReg(); - Register DstReg = MI.getOperand(0).getReg(); - LLT Ty = MRI.getType(DstReg); - if (Subtarget.is32Bit()) { - // Reset sign bit - MIRBuilder.buildAnd( - DstReg, SrcReg, - MIRBuilder.buildConstant( - Ty, APInt::getSignedMaxValue(Ty.getScalarSizeInBits()))); - } else { - // In 64 bit mode, constant pool is used. - auto &MF = MIRBuilder.getMF(); - Type *IRTy = getTypeForLLT(Ty, MF.getFunction().getContext()); - Constant *ConstMask = ConstantInt::get( - IRTy, APInt::getSignedMaxValue(Ty.getScalarSizeInBits())); - LLT DstTy = MRI.getType(DstReg); - const DataLayout &DL = MIRBuilder.getDataLayout(); - unsigned AddrSpace = DL.getDefaultGlobalsAddressSpace(); - Align Alignment(DL.getABITypeAlign( - getTypeForLLT(DstTy, MF.getFunction().getContext()))); - auto Addr = MIRBuilder.buildConstantPool( - LLT::pointer(AddrSpace, DL.getPointerSizeInBits(AddrSpace)), - MF.getConstantPool()->getConstantPoolIndex(ConstMask, Alignment)); - MachineMemOperand *MMO = - MF.getMachineMemOperand(MachinePointerInfo::getConstantPool(MF), - MachineMemOperand::MOLoad, DstTy, Alignment); - auto LoadedMask = MIRBuilder.buildLoad(DstTy, Addr, *MMO); - MIRBuilder.buildAnd(DstReg, SrcReg, LoadedMask); - } - MI.eraseFromParent(); - return true; -} bool X86LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper, MachineInstr &MI) const { return true; diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h index b70acb30b14fc..1ba82674ed4c6 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.h @@ -54,8 +54,6 @@ class X86LegalizerInfo : public LegalizerInfo { bool legalizeFPTOSI(MachineInstr &MI, MachineRegisterInfo &MRI, LegalizerHelper &Helper) const; - bool legalizeFAbs(MachineInstr &MI, MachineRegisterInfo &MRI, - LegalizerHelper &Helper) const; }; } // namespace llvm #endif diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll index 798f9c3912568..153588f0f970d 100644 --- a/llvm/test/CodeGen/X86/isel-fabs.ll +++ b/llvm/test/CodeGen/X86/isel-fabs.ll @@ -1,17 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 -; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 | FileCheck %s --check-prefixes=X64 -; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64 -; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64 -; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=X86 -; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86 -; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 | FileCheck %s --check-prefixes=X64 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64 +; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 | FileCheck %s --check-prefixes=X86 +; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86 +; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86 define float @test_float_abs(float %arg) { -; SDAG-X64-LABEL: test_float_abs: -; SDAG-X64: # %bb.0: -; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 -; SDAG-X64-NEXT: retq -; ; X64-LABEL: test_float_abs: ; X64: # %bb.0: ; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 @@ -20,20 +15,22 @@ define float @test_float_abs(float %arg) { ; GISEL-X64-LABEL: test_float_abs: ; GISEL-X64: # %bb.0: ; GISEL-X64-NEXT: movd %xmm0, %eax -; GISEL-X64-NEXT: andl {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %eax +; GISEL-X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF ; GISEL-X64-NEXT: movd %eax, %xmm0 ; GISEL-X64-NEXT: retq ; ; X86-LABEL: test_float_abs: ; X86: # %bb.0: -; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF -; X86-NEXT: andl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero +; X86-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 +; X86-NEXT: movd %xmm0, %eax ; X86-NEXT: retl ; ; FASTISEL-X86-LABEL: test_float_abs: ; FASTISEL-X86: # %bb.0: -; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; FASTISEL-X86-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF +; FASTISEL-X86-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero +; FASTISEL-X86-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 +; FASTISEL-X86-NEXT: movd %xmm0, %eax ; FASTISEL-X86-NEXT: retl ; ; GISEL-X86-LABEL: test_float_abs: @@ -46,11 +43,6 @@ define float @test_float_abs(float %arg) { } define double @test_double_abs(double %arg) { -; SDAG-X64-LABEL: test_double_abs: -; SDAG-X64: # %bb.0: -; SDAG-X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 -; SDAG-X64-NEXT: retq -; ; X64-LABEL: test_double_abs: ; X64: # %bb.0: ; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 @@ -58,9 +50,10 @@ define double @test_double_abs(double %arg) { ; ; GISEL-X64-LABEL: test_double_abs: ; GISEL-X64: # %bb.0: -; GISEL-X64-NEXT: movq %xmm0, %rax -; GISEL-X64-NEXT: andq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rax -; GISEL-X64-NEXT: movq %rax, %xmm0 +; GISEL-X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF +; GISEL-X64-NEXT: movq %xmm0, %rcx +; GISEL-X64-NEXT: andq %rax, %rcx +; GISEL-X64-NEXT: movq %rcx, %xmm0 ; GISEL-X64-NEXT: retq ; ; X86-LABEL: test_double_abs: @@ -72,9 +65,21 @@ define double @test_double_abs(double %arg) { ; ; FASTISEL-X86-LABEL: test_double_abs: ; FASTISEL-X86: # %bb.0: +; FASTISEL-X86-NEXT: pushl %ebp +; FASTISEL-X86-NEXT: .cfi_def_cfa_offset 8 +; FASTISEL-X86-NEXT: .cfi_offset %ebp, -8 +; FASTISEL-X86-NEXT: movl %esp, %ebp +; FASTISEL-X86-NEXT: .cfi_def_cfa_register %ebp +; FASTISEL-X86-NEXT: andl $-8, %esp +; FASTISEL-X86-NEXT: subl $8, %esp +; FASTISEL-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero +; FASTISEL-X86-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 +; FASTISEL-X86-NEXT: movlps %xmm0, (%esp) +; FASTISEL-X86-NEXT: movl (%esp), %eax ; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx -; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax -; FASTISEL-X86-NEXT: andl $2147483647, %edx # imm = 0x7FFFFFFF +; FASTISEL-X86-NEXT: movl %ebp, %esp +; FASTISEL-X86-NEXT: popl %ebp +; FASTISEL-X86-NEXT: .cfi_def_cfa %esp, 4 ; FASTISEL-X86-NEXT: retl ; ; GISEL-X86-LABEL: test_double_abs: @@ -84,7 +89,6 @@ define double @test_double_abs(double %arg) { ; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %eax ; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %edx ; GISEL-X86-NEXT: retl - %abs = tail call double @llvm.fabs.f64(double %arg) ret double %abs } From a718a5b6e1b86d040288f6e950261d06fd0f8039 Mon Sep 17 00:00:00 2001 From: mattarde Date: Wed, 11 Jun 2025 06:06:10 -0700 Subject: [PATCH 13/15] remove noise --- llvm/test/CodeGen/X86/isel-fabs.ll | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll index 153588f0f970d..c2d29248e49ba 100644 --- a/llvm/test/CodeGen/X86/isel-fabs.ll +++ b/llvm/test/CodeGen/X86/isel-fabs.ll @@ -6,7 +6,7 @@ ; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86 ; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86 -define float @test_float_abs(float %arg) { +define float @test_float_abs(float %arg) nounwind { ; X64-LABEL: test_float_abs: ; X64: # %bb.0: ; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 @@ -42,7 +42,7 @@ define float @test_float_abs(float %arg) { ret float %abs } -define double @test_double_abs(double %arg) { +define double @test_double_abs(double %arg) nounwind { ; X64-LABEL: test_double_abs: ; X64: # %bb.0: ; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 @@ -66,10 +66,7 @@ define double @test_double_abs(double %arg) { ; FASTISEL-X86-LABEL: test_double_abs: ; FASTISEL-X86: # %bb.0: ; FASTISEL-X86-NEXT: pushl %ebp -; FASTISEL-X86-NEXT: .cfi_def_cfa_offset 8 -; FASTISEL-X86-NEXT: .cfi_offset %ebp, -8 ; FASTISEL-X86-NEXT: movl %esp, %ebp -; FASTISEL-X86-NEXT: .cfi_def_cfa_register %ebp ; FASTISEL-X86-NEXT: andl $-8, %esp ; FASTISEL-X86-NEXT: subl $8, %esp ; FASTISEL-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero @@ -79,7 +76,6 @@ define double @test_double_abs(double %arg) { ; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx ; FASTISEL-X86-NEXT: movl %ebp, %esp ; FASTISEL-X86-NEXT: popl %ebp -; FASTISEL-X86-NEXT: .cfi_def_cfa %esp, 4 ; FASTISEL-X86-NEXT: retl ; ; GISEL-X86-LABEL: test_double_abs: From e57ab0324c13b81ac1a0b08bbeeb1775b21b07d4 Mon Sep 17 00:00:00 2001 From: mattarde Date: Thu, 19 Jun 2025 04:49:20 -0700 Subject: [PATCH 14/15] add fallback --- .../X86/GISel/X86InstructionSelector.cpp | 33 +++++++++++++ .../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 2 +- llvm/test/CodeGen/X86/isel-fabs-x87.ll | 46 +++++++++++++++++-- 3 files changed, 76 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp index 3090ad313b90d..520ce0ca87039 100644 --- a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp +++ b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp @@ -95,6 +95,8 @@ class X86InstructionSelector : public InstructionSelector { MachineFunction &MF) const; bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI, MachineFunction &MF) const; + bool selectFAbs(MachineInstr &I, MachineRegisterInfo &MRI, + MachineFunction &MF) const; bool selectUAddSub(MachineInstr &I, MachineRegisterInfo &MRI, MachineFunction &MF) const; bool selectDebugInstr(MachineInstr &I, MachineRegisterInfo &MRI) const; @@ -391,6 +393,8 @@ bool X86InstructionSelector::select(MachineInstr &I) { switch (I.getOpcode()) { default: return false; + case TargetOpcode::G_FABS: + return selectFAbs(I, MRI, MF); case TargetOpcode::G_STORE: case TargetOpcode::G_LOAD: return selectLoadStoreOp(I, MRI, MF); @@ -1051,6 +1055,35 @@ bool X86InstructionSelector::selectCmp(MachineInstr &I, return true; } +bool X86InstructionSelector::selectFAbs(MachineInstr &I, + MachineRegisterInfo &MRI, + MachineFunction &MF) const { + assert((I.getOpcode() == TargetOpcode::G_FABS) && "unexpected instruction"); + Register SrcReg = I.getOperand(1).getReg(); + Register DstReg = I.getOperand(0).getReg(); + LLT Ty = MRI.getType(SrcReg); + unsigned OpAbs; + const TargetRegisterClass *DstRC; + switch(Ty.getSizeInBits()) { + default: + return false; + case 32: + OpAbs = X86::ABS_Fp32; + DstRC = &X86::FR32RegClass; + break; + case 64: + OpAbs = X86::ABS_Fp64; + DstRC = &X86::FR64RegClass; + break; + } + MRI.setRegClass(DstReg, DstRC); + MachineInstr &FAbsInst = *BuildMI(*I.getParent(), I, I.getDebugLoc(), + TII.get(OpAbs), DstReg).addReg(SrcReg); + constrainSelectedInstRegOperands(FAbsInst, TII, TRI, RBI); + I.eraseFromParent(); + return true; +} + bool X86InstructionSelector::selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI, MachineFunction &MF) const { diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp index 95c9a5c7db37b..9f4ec18ed7bf3 100644 --- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp +++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp @@ -467,7 +467,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI, }); getActionDefinitionsBuilder(G_FABS) - .legalFor(UseX87 && !HasSSE2 && !HasSSE1, {s32, s64, s80}) + .legalFor(UseX87 && !HasSSE2 && !HasSSE1, {s64, s80}) .lower(); // fp comparison diff --git a/llvm/test/CodeGen/X86/isel-fabs-x87.ll b/llvm/test/CodeGen/X86/isel-fabs-x87.ll index e9863ef7a93e1..a0534e6a1a82e 100644 --- a/llvm/test/CodeGen/X86/isel-fabs-x87.ll +++ b/llvm/test/CodeGen/X86/isel-fabs-x87.ll @@ -1,10 +1,48 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X64 -; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -fast-isel | FileCheck %s --check-prefixes=X64 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64 -; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86 -; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86 -; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86 +; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86,SDAG-ISEL +; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel | FileCheck %s --check-prefixes=X86,Fast-ISEL +; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=0 | FileCheck %s --check-prefixes=X86,GISEL-ISEL + +define void @test_float_abs(ptr %argptr) { +; SDAG-ISEL-LABEL: test_float_abs: +; SDAG-ISEL: # %bb.0: +; SDAG-ISEL-NEXT: movl {{[0-9]+}}(%esp), %eax +; SDAG-ISEL-NEXT: andb $127, 3(%eax) +; SDAG-ISEL-NEXT: retl +; +; Fast-ISEL-LABEL: test_float_abs: +; Fast-ISEL: # %bb.0: +; Fast-ISEL-NEXT: movl {{[0-9]+}}(%esp), %eax +; Fast-ISEL-NEXT: andb $127, 3(%eax) +; Fast-ISEL-NEXT: retl +; +; GISEL-ISEL-LABEL: test_float_abs: +; GISEL-ISEL: # %bb.0: +; GISEL-ISEL-NEXT: movl {{[0-9]+}}(%esp), %eax +; GISEL-ISEL-NEXT: andl $2147483647, (%eax) # imm = 0x7FFFFFFF +; GISEL-ISEL-NEXT: retl + %arg = load float, float* %argptr + %abs = tail call float @llvm.fabs.f32(float %arg) + store float %abs, ptr %argptr + ret void + } + +define void @test_double_abs(ptr %argptr) { +; X86-LABEL: test_double_abs: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: fldl (%eax) +; X86-NEXT: fabs +; X86-NEXT: fstpl (%eax) +; X86-NEXT: retl + %arg = load double, double* %argptr + %abs = tail call double @llvm.fabs.f64(double %arg) + store double %abs, double* %argptr + ret void +} define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) { ; X64-LABEL: test_x86_fp80_abs: From f5e5274b6fa519f7a3670a85d6327da8b47535ba Mon Sep 17 00:00:00 2001 From: mattarde Date: Thu, 19 Jun 2025 05:03:40 -0700 Subject: [PATCH 15/15] format extension issue --- .../X86/GISel/X86InstructionSelector.cpp | 28 +++++++++---------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp index 520ce0ca87039..9b0dd0562cde3 100644 --- a/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp +++ b/llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp @@ -1054,7 +1054,6 @@ bool X86InstructionSelector::selectCmp(MachineInstr &I, I.eraseFromParent(); return true; } - bool X86InstructionSelector::selectFAbs(MachineInstr &I, MachineRegisterInfo &MRI, MachineFunction &MF) const { @@ -1064,21 +1063,22 @@ bool X86InstructionSelector::selectFAbs(MachineInstr &I, LLT Ty = MRI.getType(SrcReg); unsigned OpAbs; const TargetRegisterClass *DstRC; - switch(Ty.getSizeInBits()) { - default: - return false; - case 32: - OpAbs = X86::ABS_Fp32; - DstRC = &X86::FR32RegClass; - break; - case 64: - OpAbs = X86::ABS_Fp64; - DstRC = &X86::FR64RegClass; - break; + switch (Ty.getSizeInBits()) { + default: + return false; + case 32: + OpAbs = X86::ABS_Fp32; + DstRC = &X86::FR32RegClass; + break; + case 64: + OpAbs = X86::ABS_Fp64; + DstRC = &X86::FR64RegClass; + break; } MRI.setRegClass(DstReg, DstRC); - MachineInstr &FAbsInst = *BuildMI(*I.getParent(), I, I.getDebugLoc(), - TII.get(OpAbs), DstReg).addReg(SrcReg); + MachineInstr &FAbsInst = + *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(OpAbs), DstReg) + .addReg(SrcReg); constrainSelectedInstRegOperands(FAbsInst, TII, TRI, RBI); I.eraseFromParent(); return true;