From da38b72a15aec71ff04a475d9bb530810d03e237 Mon Sep 17 00:00:00 2001 From: Min Hsu Date: Mon, 3 Mar 2025 10:17:55 -0800 Subject: [PATCH] [Exegesis][RISCV] Remove the usage of RISCVSubtarget Replace the usage of RISCVSubtarget in RISCVExegesisPreprocessingPass with an equivalent. Because including RISCVSubtarget.h might slow down the build speed by hindering the degree of parallelism for components outside LLVMRISCVCodeGen. --- .../lib/RISCV/RISCVExegesisPreprocessing.cpp | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPreprocessing.cpp b/llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPreprocessing.cpp index 7f1cfd9ea52df..69a02e94ecb39 100644 --- a/llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPreprocessing.cpp +++ b/llvm/tools/llvm-exegesis/lib/RISCV/RISCVExegesisPreprocessing.cpp @@ -12,9 +12,10 @@ #include "RISCV.h" #include "RISCVExegesisPasses.h" #include "RISCVRegisterInfo.h" -#include "RISCVSubtarget.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/TargetInstrInfo.h" +#include "llvm/MC/MCContext.h" using namespace llvm; @@ -63,10 +64,13 @@ static bool processAVLOperand(MachineInstr &MI, MachineRegisterInfo &MRI, bool RISCVExegesisPreprocessing::runOnMachineFunction(MachineFunction &MF) { MachineRegisterInfo &MRI = MF.getRegInfo(); - const auto &STI = MF.getSubtarget(); - if (!STI.hasVInstructions()) + // We could have use RISCVSubtarget::hasVInstructions here but including + // RISCVSubtarget.h would serialize the build of components outside + // LLVMRISCVCodeGen. + const MCSubtargetInfo &STI = *MF.getContext().getSubtargetInfo(); + if (!STI.hasFeature(RISCV::FeatureStdExtZve32x)) return false; - const TargetInstrInfo &TII = *STI.getInstrInfo(); + const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); LLVM_DEBUG(MF.print(dbgs() << "===Before RISCVExegesisPoreprocessing===\n"); dbgs() << "\n");