From bdaeb7890a1ea62018f6d664c189e5c069dcb380 Mon Sep 17 00:00:00 2001 From: Madhur Amilkanthwar Date: Fri, 30 Aug 2024 15:14:09 +0530 Subject: [PATCH 1/3] [GISEL][AArch64] Stop using wip_match_opcode for some opcodes This match moves to the new style of writing pattern for matching opcodes and thus deprecates using wip_match_opcoee. It moves G_FCONSTANT, G_ICMP, G_STORE, and G_OR. --- llvm/lib/Target/AArch64/AArch64Combine.td | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64Combine.td b/llvm/lib/Target/AArch64/AArch64Combine.td index 3f717c8a60050..d12f834da5a15 100644 --- a/llvm/lib/Target/AArch64/AArch64Combine.td +++ b/llvm/lib/Target/AArch64/AArch64Combine.td @@ -13,14 +13,14 @@ include "llvm/Target/GlobalISel/Combine.td" def fconstant_to_constant : GICombineRule< (defs root:$root), - (match (wip_match_opcode G_FCONSTANT):$root, + (match (G_FCONSTANT $dst, $src):$root, [{ return matchFConstantToConstant(*${root}, MRI); }]), (apply [{ applyFConstantToConstant(*${root}); }])>; def icmp_redundant_trunc_matchdata : GIDefMatchData<"Register">; def icmp_redundant_trunc : GICombineRule< (defs root:$root, icmp_redundant_trunc_matchdata:$matchinfo), - (match (wip_match_opcode G_ICMP):$root, + (match (G_ICMP $dst, $tst, $src1, $src2):$root, [{ return matchICmpRedundantTrunc(*${root}, MRI, Helper.getKnownBits(), ${matchinfo}); }]), (apply [{ applyICmpRedundantTrunc(*${root}, MRI, B, Observer, ${matchinfo}); }])>; @@ -178,14 +178,14 @@ def adjust_icmp_imm_matchdata : GIDefMatchData<"std::pair">; def adjust_icmp_imm : GICombineRule < (defs root:$root, adjust_icmp_imm_matchdata:$matchinfo), - (match (wip_match_opcode G_ICMP):$root, + (match (G_ICMP $dst, $tst, $src1, $src2):$root, [{ return matchAdjustICmpImmAndPred(*${root}, MRI, ${matchinfo}); }]), (apply [{ applyAdjustICmpImmAndPred(*${root}, ${matchinfo}, B, Observer); }]) >; def swap_icmp_operands : GICombineRule < (defs root:$root), - (match (wip_match_opcode G_ICMP):$root, + (match (G_ICMP $dst, $tst, $src1, $src2):$root, [{ return trySwapICmpOperands(*${root}, MRI); }]), (apply [{ applySwapICmpOperands(*${root}, Observer); }]) >; @@ -226,14 +226,14 @@ def build_vector_lowering : GICombineGroup<[build_vector_to_dup]>; def lower_vector_fcmp : GICombineRule< (defs root:$root), - (match (wip_match_opcode G_FCMP):$root, + (match (G_FCMP $dst, $tst, $src1, $src2):$root, [{ return matchLowerVectorFCMP(*${root}, MRI, B); }]), (apply [{ applyLowerVectorFCMP(*${root}, MRI, B); }])>; def form_truncstore_matchdata : GIDefMatchData<"Register">; def form_truncstore : GICombineRule< (defs root:$root, form_truncstore_matchdata:$matchinfo), - (match (wip_match_opcode G_STORE):$root, + (match (G_STORE $src, $addr):$root, [{ return matchFormTruncstore(*${root}, MRI, ${matchinfo}); }]), (apply [{ applyFormTruncstore(*${root}, MRI, B, Observer, ${matchinfo}); }]) >; @@ -254,7 +254,7 @@ def mutate_anyext_to_zext : GICombineRule< def split_store_zero_128 : GICombineRule< (defs root:$d), - (match (wip_match_opcode G_STORE):$d, + (match (G_STORE $src, $addr):$d, [{ return matchSplitStoreZero128(*${d}, MRI); }]), (apply [{ applySplitStoreZero128(*${d}, MRI, B, Observer); }]) >; @@ -277,7 +277,7 @@ def unmerge_ext_to_unmerge : GICombineRule< def regtriple_matchdata : GIDefMatchData<"std::tuple">; def or_to_bsp: GICombineRule < (defs root:$root, regtriple_matchdata:$matchinfo), - (match (wip_match_opcode G_OR):$root, + (match (G_OR $dst, $src1, $src2):$root, [{ return matchOrToBSP(*${root}, MRI, ${matchinfo}); }]), (apply [{ applyOrToBSP(*${root}, MRI, B, ${matchinfo}); }]) >; From 58d02d409c7fddc6e37e492949a246cccf879db3 Mon Sep 17 00:00:00 2001 From: Madhur Amilkanthwar Date: Fri, 30 Aug 2024 21:03:22 +0530 Subject: [PATCH 2/3] Add MIR test --- .../CodeGen/AArch64/GlobalISel/icmp-trunc.mir | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/icmp-trunc.mir diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/icmp-trunc.mir b/llvm/test/CodeGen/AArch64/GlobalISel/icmp-trunc.mir new file mode 100644 index 0000000000000..cb8e055f22625 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/icmp-trunc.mir @@ -0,0 +1,19 @@ + +... +--- +name: rev64_mask_1_undef +alignment: 4 +legalized: true +regBankSelected: true +tracksRegLiveness: true +body: | + bb.1.entry: + liveins: $x0, $x1 + %0:gpr(s64) = COPY $x0 + %1:gpr(s32) = G_CONSTANT i32 0 + %2:gpr(s32) = G_TRUNC %0(s64) + %3:gpr(s32) = G_ICMP intpred(eq), %1(s32), %2(s32) + ;%1:_(<2 x s32>) = COPY $d1 + ;%2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1, shufflemask(1, undef) + ;$d0 = COPY %2(<2 x s32>) + RET_ReallyLR implicit $x0 From 608c2cdb8eb888376cc3f02639243ee397fcf321 Mon Sep 17 00:00:00 2001 From: Madhur Amilkanthwar Date: Mon, 2 Sep 2024 13:53:48 +0530 Subject: [PATCH 3/3] remove the test --- .../CodeGen/AArch64/GlobalISel/icmp-trunc.mir | 19 ------------------- 1 file changed, 19 deletions(-) delete mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/icmp-trunc.mir diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/icmp-trunc.mir b/llvm/test/CodeGen/AArch64/GlobalISel/icmp-trunc.mir deleted file mode 100644 index cb8e055f22625..0000000000000 --- a/llvm/test/CodeGen/AArch64/GlobalISel/icmp-trunc.mir +++ /dev/null @@ -1,19 +0,0 @@ - -... ---- -name: rev64_mask_1_undef -alignment: 4 -legalized: true -regBankSelected: true -tracksRegLiveness: true -body: | - bb.1.entry: - liveins: $x0, $x1 - %0:gpr(s64) = COPY $x0 - %1:gpr(s32) = G_CONSTANT i32 0 - %2:gpr(s32) = G_TRUNC %0(s64) - %3:gpr(s32) = G_ICMP intpred(eq), %1(s32), %2(s32) - ;%1:_(<2 x s32>) = COPY $d1 - ;%2:_(<2 x s32>) = G_SHUFFLE_VECTOR %0(<2 x s32>), %1, shufflemask(1, undef) - ;$d0 = COPY %2(<2 x s32>) - RET_ReallyLR implicit $x0