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12 | 12 | // A builtin type that has not been covered by any other #define |
13 | 13 | // Defining this macro covers all the builtins. |
14 | 14 | // |
15 | | -// - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, IsSigned, IsFP) |
| 15 | +// - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, IsSigned, IsFP, |
| 16 | +// IsBF) |
16 | 17 | // A RISC-V V scalable vector. |
17 | 18 | // |
18 | 19 | // - RVV_PREDICATE_TYPE(Name, Id, SingletonId, NumEls) |
|
45 | 46 | #endif |
46 | 47 |
|
47 | 48 | #ifndef RVV_VECTOR_TYPE |
48 | | -#define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, IsFP)\ |
| 49 | +#define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, \ |
| 50 | + IsFP, IsBF) \ |
49 | 51 | RVV_TYPE(Name, Id, SingletonId) |
50 | 52 | #endif |
51 | 53 |
|
|
55 | 57 | #endif |
56 | 58 |
|
57 | 59 | #ifndef RVV_VECTOR_TYPE_INT |
58 | | -#define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned) \ |
59 | | - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, false) |
| 60 | +#define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF, \ |
| 61 | + IsSigned) \ |
| 62 | + RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, false, \ |
| 63 | + false) |
60 | 64 | #endif |
61 | 65 |
|
62 | 66 | #ifndef RVV_VECTOR_TYPE_FLOAT |
63 | | -#define RVV_VECTOR_TYPE_FLOAT(Name, Id, SingletonId, NumEls, ElBits, NF) \ |
64 | | - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, false, true) |
| 67 | +#define RVV_VECTOR_TYPE_FLOAT(Name, Id, SingletonId, NumEls, ElBits, NF) \ |
| 68 | + RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, false, true, false) |
| 69 | +#endif |
| 70 | + |
| 71 | +#ifndef RVV_VECTOR_TYPE_BFLOAT |
| 72 | +#define RVV_VECTOR_TYPE_BFLOAT(Name, Id, SingletonId, NumEls, ElBits, NF) \ |
| 73 | + RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, false, false, true) |
65 | 74 | #endif |
66 | 75 |
|
67 | 76 | //===- Vector types -------------------------------------------------------===// |
@@ -125,6 +134,19 @@ RVV_VECTOR_TYPE_FLOAT("__rvv_float16m2_t", RvvFloat16m2, RvvFloat16m2Ty, 8, 16, |
125 | 134 | RVV_VECTOR_TYPE_FLOAT("__rvv_float16m4_t", RvvFloat16m4, RvvFloat16m4Ty, 16, 16, 1) |
126 | 135 | RVV_VECTOR_TYPE_FLOAT("__rvv_float16m8_t", RvvFloat16m8, RvvFloat16m8Ty, 32, 16, 1) |
127 | 136 |
|
| 137 | +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf4_t", RvvBFloat16mf4, RvvBFloat16mf4Ty, |
| 138 | + 1, 16, 1) |
| 139 | +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16mf2_t", RvvBFloat16mf2, RvvBFloat16mf2Ty, |
| 140 | + 2, 16, 1) |
| 141 | +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m1_t", RvvBFloat16m1, RvvBFloat16m1Ty, 4, |
| 142 | + 16, 1) |
| 143 | +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m2_t", RvvBFloat16m2, RvvBFloat16m2Ty, 8, |
| 144 | + 16, 1) |
| 145 | +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m4_t", RvvBFloat16m4, RvvBFloat16m4Ty, 16, |
| 146 | + 16, 1) |
| 147 | +RVV_VECTOR_TYPE_BFLOAT("__rvv_bfloat16m8_t", RvvBFloat16m8, RvvBFloat16m8Ty, 32, |
| 148 | + 16, 1) |
| 149 | + |
128 | 150 | RVV_VECTOR_TYPE_FLOAT("__rvv_float32mf2_t",RvvFloat32mf2,RvvFloat32mf2Ty,1, 32, 1) |
129 | 151 | RVV_VECTOR_TYPE_FLOAT("__rvv_float32m1_t", RvvFloat32m1, RvvFloat32m1Ty, 2, 32, 1) |
130 | 152 | RVV_VECTOR_TYPE_FLOAT("__rvv_float32m2_t", RvvFloat32m2, RvvFloat32m2Ty, 4, 32, 1) |
@@ -430,6 +452,7 @@ RVV_VECTOR_TYPE_FLOAT("__rvv_float64m2x4_t", RvvFloat64m2x4, RvvFloat64m2x4Ty, 2 |
430 | 452 |
|
431 | 453 | RVV_VECTOR_TYPE_FLOAT("__rvv_float64m4x2_t", RvvFloat64m4x2, RvvFloat64m4x2Ty, 4, 64, 2) |
432 | 454 |
|
| 455 | +#undef RVV_VECTOR_TYPE_BFLOAT |
433 | 456 | #undef RVV_VECTOR_TYPE_FLOAT |
434 | 457 | #undef RVV_VECTOR_TYPE_INT |
435 | 458 | #undef RVV_VECTOR_TYPE |
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