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Reland [AMDGPU] Add AMDGPU specific variadic operation MCExprs (#84562)
Adds AMDGPU specific variadic MCExpr operations 'max' and 'or'. Relands #82022 with fixes
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‎llvm/docs/AMDGPUUsage.rst‎

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@@ -1552,6 +1552,25 @@ The AMDGPU backend supports the following calling conventions:
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=============================== ==========================================================
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AMDGPU MCExpr
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-------------
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As part of the AMDGPU MC layer, AMDGPU provides the following target specific
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``MCExpr``\s.
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.. table:: AMDGPU MCExpr types:
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:name: amdgpu-mcexpr-table
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=================== ================= ========================================================
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MCExpr Operands Return value
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=================== ================= ========================================================
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``max(arg, ...)`` 1 or more Variadic signed operation that returns the maximum
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value of all its arguments.
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``or(arg, ...)`` 1 or more Variadic signed operation that returns the bitwise-or
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result of all its arguments.
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=================== ================= ========================================================
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.. _amdgpu-elf-code-object:
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‎llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp‎

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@@ -7,6 +7,7 @@
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//===----------------------------------------------------------------------===//
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#include "AMDKernelCodeT.h"
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#include "MCTargetDesc/AMDGPUMCExpr.h"
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#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
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#include "MCTargetDesc/AMDGPUTargetStreamer.h"
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#include "SIDefines.h"
@@ -1816,6 +1817,7 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
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public:
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void onBeginOfFile() override;
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bool parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) override;
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ParseStatus parseCustomOperand(OperandVector &Operands, unsigned MCK);
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@@ -8330,6 +8332,59 @@ void AMDGPUAsmParser::onBeginOfFile() {
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getTargetStreamer().EmitDirectiveAMDGCNTarget();
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}
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/// Parse AMDGPU specific expressions.
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///
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/// expr ::= or(expr, ...) |
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/// max(expr, ...)
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///
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bool AMDGPUAsmParser::parsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) {
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using AGVK = AMDGPUVariadicMCExpr::VariadicKind;
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if (isToken(AsmToken::Identifier)) {
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StringRef TokenId = getTokenStr();
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AGVK VK = StringSwitch<AGVK>(TokenId)
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.Case("max", AGVK::AGVK_Max)
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.Case("or", AGVK::AGVK_Or)
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.Default(AGVK::AGVK_None);
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if (VK != AGVK::AGVK_None && peekToken().is(AsmToken::LParen)) {
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SmallVector<const MCExpr *, 4> Exprs;
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uint64_t CommaCount = 0;
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lex(); // Eat 'max'/'or'
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lex(); // Eat '('
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while (true) {
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if (trySkipToken(AsmToken::RParen)) {
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if (Exprs.empty()) {
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Error(getToken().getLoc(),
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"empty " + Twine(TokenId) + " expression");
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return true;
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}
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if (CommaCount + 1 != Exprs.size()) {
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Error(getToken().getLoc(),
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"mismatch of commas in " + Twine(TokenId) + " expression");
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return true;
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}
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Res = AMDGPUVariadicMCExpr::create(VK, Exprs, getContext());
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return false;
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}
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const MCExpr *Expr;
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if (getParser().parseExpression(Expr, EndLoc))
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return true;
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Exprs.push_back(Expr);
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bool LastTokenWasComma = trySkipToken(AsmToken::Comma);
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if (LastTokenWasComma)
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CommaCount++;
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if (!LastTokenWasComma && !isToken(AsmToken::RParen)) {
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Error(getToken().getLoc(),
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"unexpected token in " + Twine(TokenId) + " expression");
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return true;
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}
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}
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}
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}
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return getParser().parsePrimaryExpr(Res, EndLoc, nullptr);
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}
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ParseStatus AMDGPUAsmParser::parseOModSI(OperandVector &Operands) {
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StringRef Name = getTokenStr();
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if (Name == "mul") {

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp‎

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//===- AMDGPUMCExpr.cpp - AMDGPU specific MC expression classes -----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPUMCExpr.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/Allocator.h"
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#include "llvm/Support/raw_ostream.h"
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#include <optional>
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using namespace llvm;
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AMDGPUVariadicMCExpr::AMDGPUVariadicMCExpr(VariadicKind Kind,
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ArrayRef<const MCExpr *> Args,
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MCContext &Ctx)
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: Kind(Kind), Ctx(Ctx) {
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assert(Args.size() >= 1 && "Needs a minimum of one expression.");
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assert(Kind != AGVK_None &&
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"Cannot construct AMDGPUVariadicMCExpr of kind none.");
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// Allocating the variadic arguments through the same allocation mechanism
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// that the object itself is allocated with so they end up in the same memory.
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//
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// Will result in an asan failure if allocated on the heap through standard
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// allocation (e.g., through SmallVector's grow).
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RawArgs = static_cast<const MCExpr **>(
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Ctx.allocate(sizeof(const MCExpr *) * Args.size()));
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std::uninitialized_copy(Args.begin(), Args.end(), RawArgs);
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this->Args = ArrayRef<const MCExpr *>(RawArgs, Args.size());
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}
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AMDGPUVariadicMCExpr::~AMDGPUVariadicMCExpr() { Ctx.deallocate(RawArgs); }
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const AMDGPUVariadicMCExpr *
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AMDGPUVariadicMCExpr::create(VariadicKind Kind, ArrayRef<const MCExpr *> Args,
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MCContext &Ctx) {
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return new (Ctx) AMDGPUVariadicMCExpr(Kind, Args, Ctx);
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}
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const MCExpr *AMDGPUVariadicMCExpr::getSubExpr(size_t Index) const {
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assert(Index < Args.size() &&
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"Indexing out of bounds AMDGPUVariadicMCExpr sub-expr");
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return Args[Index];
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}
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void AMDGPUVariadicMCExpr::printImpl(raw_ostream &OS,
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const MCAsmInfo *MAI) const {
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switch (Kind) {
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default:
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llvm_unreachable("Unknown AMDGPUVariadicMCExpr kind.");
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case AGVK_Or:
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OS << "or(";
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break;
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case AGVK_Max:
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OS << "max(";
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break;
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}
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for (auto It = Args.begin(); It != Args.end(); ++It) {
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(*It)->print(OS, MAI, /*InParens=*/false);
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if ((It + 1) != Args.end())
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OS << ", ";
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}
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OS << ')';
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}
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static int64_t op(AMDGPUVariadicMCExpr::VariadicKind Kind, int64_t Arg1,
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int64_t Arg2) {
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switch (Kind) {
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default:
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llvm_unreachable("Unknown AMDGPUVariadicMCExpr kind.");
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case AMDGPUVariadicMCExpr::AGVK_Max:
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return std::max(Arg1, Arg2);
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case AMDGPUVariadicMCExpr::AGVK_Or:
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return Arg1 | Arg2;
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}
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}
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bool AMDGPUVariadicMCExpr::evaluateAsRelocatableImpl(
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MCValue &Res, const MCAsmLayout *Layout, const MCFixup *Fixup) const {
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std::optional<int64_t> Total;
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for (const MCExpr *Arg : Args) {
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MCValue ArgRes;
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if (!Arg->evaluateAsRelocatable(ArgRes, Layout, Fixup) ||
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!ArgRes.isAbsolute())
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return false;
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if (!Total.has_value())
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Total = ArgRes.getConstant();
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Total = op(Kind, *Total, ArgRes.getConstant());
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}
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Res = MCValue::get(*Total);
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return true;
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}
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void AMDGPUVariadicMCExpr::visitUsedExpr(MCStreamer &Streamer) const {
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for (const MCExpr *Arg : Args)
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Streamer.visitUsedExpr(*Arg);
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}
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MCFragment *AMDGPUVariadicMCExpr::findAssociatedFragment() const {
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for (const MCExpr *Arg : Args) {
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if (Arg->findAssociatedFragment())
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return Arg->findAssociatedFragment();
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}
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return nullptr;
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}

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h‎

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//===- AMDGPUMCExpr.h - AMDGPU specific MC expression classes ---*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCEXPR_H
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#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCEXPR_H
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/MC/MCExpr.h"
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namespace llvm {
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/// AMDGPU target specific variadic MCExpr operations.
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///
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/// Takes in a minimum of 1 argument to be used with an operation. The supported
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/// operations are:
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/// - (bitwise) or
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/// - max
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///
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/// \note If the 'or'/'max' operations are provided only a single argument, the
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/// operation will act as a no-op and simply resolve as the provided argument.
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///
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class AMDGPUVariadicMCExpr : public MCTargetExpr {
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public:
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enum VariadicKind { AGVK_None, AGVK_Or, AGVK_Max };
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private:
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VariadicKind Kind;
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MCContext &Ctx;
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const MCExpr **RawArgs;
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ArrayRef<const MCExpr *> Args;
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AMDGPUVariadicMCExpr(VariadicKind Kind, ArrayRef<const MCExpr *> Args,
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MCContext &Ctx);
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~AMDGPUVariadicMCExpr();
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public:
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static const AMDGPUVariadicMCExpr *
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create(VariadicKind Kind, ArrayRef<const MCExpr *> Args, MCContext &Ctx);
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static const AMDGPUVariadicMCExpr *createOr(ArrayRef<const MCExpr *> Args,
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MCContext &Ctx) {
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return create(VariadicKind::AGVK_Or, Args, Ctx);
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}
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static const AMDGPUVariadicMCExpr *createMax(ArrayRef<const MCExpr *> Args,
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MCContext &Ctx) {
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return create(VariadicKind::AGVK_Max, Args, Ctx);
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}
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VariadicKind getKind() const { return Kind; }
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const MCExpr *getSubExpr(size_t Index) const;
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void printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const override;
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bool evaluateAsRelocatableImpl(MCValue &Res, const MCAsmLayout *Layout,
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const MCFixup *Fixup) const override;
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void visitUsedExpr(MCStreamer &Streamer) const override;
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MCFragment *findAssociatedFragment() const override;
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void fixELFSymbolsInTLSFixups(MCAssembler &) const override{};
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static bool classof(const MCExpr *E) {
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return E->getKind() == MCExpr::Target;
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}
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCEXPR_H

‎llvm/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt‎

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@@ -5,6 +5,7 @@ add_llvm_component_library(LLVMAMDGPUDesc
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AMDGPUInstPrinter.cpp
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AMDGPUMCAsmInfo.cpp
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AMDGPUMCCodeEmitter.cpp
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AMDGPUMCExpr.cpp
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AMDGPUMCTargetDesc.cpp
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AMDGPUTargetStreamer.cpp
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R600InstPrinter.cpp

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