@@ -71,7 +71,8 @@ const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
7171 // Name Offset (bits) Size (bits) Flags
7272 {" fixup_arm_ldst_pcrel_12" , 0 , 32 , IsPCRelConstant},
7373 {" fixup_t2_ldst_pcrel_12" , 0 , 32 ,
74- IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
74+ MCFixupKindInfo::FKF_IsPCRel |
75+ MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
7576 {" fixup_arm_pcrel_10_unscaled" , 0 , 32 , IsPCRelConstant},
7677 {" fixup_arm_pcrel_10" , 0 , 32 , IsPCRelConstant},
7778 {" fixup_t2_pcrel_10" , 0 , 32 ,
@@ -81,10 +82,12 @@ const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
8182 {" fixup_t2_pcrel_9" , 0 , 32 ,
8283 IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
8384 {" fixup_thumb_adr_pcrel_10" , 0 , 8 ,
84- IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
85+ MCFixupKindInfo::FKF_IsPCRel |
86+ MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
8587 {" fixup_arm_adr_pcrel_12" , 0 , 32 , IsPCRelConstant},
8688 {" fixup_t2_adr_pcrel_12" , 0 , 32 ,
87- IsPCRelConstant | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
89+ MCFixupKindInfo::FKF_IsPCRel |
90+ MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
8891 {" fixup_arm_condbranch" , 0 , 24 , MCFixupKindInfo::FKF_IsPCRel},
8992 {" fixup_arm_uncondbranch" , 0 , 24 , MCFixupKindInfo::FKF_IsPCRel},
9093 {" fixup_t2_condbranch" , 0 , 32 , MCFixupKindInfo::FKF_IsPCRel},
@@ -116,8 +119,7 @@ const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
116119 {" fixup_bfc_target" , 0 , 32 , MCFixupKindInfo::FKF_IsPCRel},
117120 {" fixup_bfcsel_else_target" , 0 , 32 , 0 },
118121 {" fixup_wls" , 0 , 32 , MCFixupKindInfo::FKF_IsPCRel},
119- {" fixup_le" , 0 , 32 , MCFixupKindInfo::FKF_IsPCRel}
120- };
122+ {" fixup_le" , 0 , 32 , MCFixupKindInfo::FKF_IsPCRel}};
121123 const static MCFixupKindInfo InfosBE[ARM::NumTargetFixupKinds] = {
122124 // This table *must* be in the order that the fixup_* kinds are defined in
123125 // ARMFixupKinds.h.
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