@@ -1673,59 +1673,6 @@ bool SIInsertWaitcnts::generateWaitcntInstBefore(MachineInstr &MI,
16731673 AMDGPU::SendMsg::ID_GS_DONE_PreGFX11)) {
16741674 Wait.LoadCnt = 0 ;
16751675 }
1676- #if 0 // TODO: the following blocks of logic when we have fence.
1677- else if (MI.getOpcode() == SC_FENCE) {
1678- const unsigned int group_size =
1679- context->shader_info->GetMaxThreadGroupSize();
1680- // group_size == 0 means thread group size is unknown at compile time
1681- const bool group_is_multi_wave =
1682- (group_size == 0 || group_size > target_info->GetWaveFrontSize());
1683- const bool fence_is_global = !((SCInstInternalMisc*)Inst)->IsGroupFence();
1684-
1685- for (unsigned int i = 0; i < Inst->NumSrcOperands(); i++) {
1686- SCRegType src_type = Inst->GetSrcType(i);
1687- switch (src_type) {
1688- case SCMEM_LDS:
1689- if (group_is_multi_wave ||
1690- context->OptFlagIsOn(OPT_R1100_LDSMEM_FENCE_CHICKEN_BIT)) {
1691- EmitWaitcnt |= ScoreBrackets->updateByWait(DS_CNT,
1692- ScoreBrackets->getScoreUB(DS_CNT));
1693- // LDS may have to wait for VMcnt after buffer load to LDS
1694- if (target_info->HasBufferLoadToLDS()) {
1695- EmitWaitcnt |= ScoreBrackets->updateByWait(LOAD_CNT,
1696- ScoreBrackets->getScoreUB(LOAD_CNT));
1697- }
1698- }
1699- break;
1700-
1701- case SCMEM_GDS:
1702- if (group_is_multi_wave || fence_is_global) {
1703- EmitWaitcnt |= ScoreBrackets->updateByWait(EXP_CNT,
1704- ScoreBrackets->getScoreUB(EXP_CNT));
1705- EmitWaitcnt |= ScoreBrackets->updateByWait(DS_CNT,
1706- ScoreBrackets->getScoreUB(DS_CNT));
1707- }
1708- break;
1709-
1710- case SCMEM_UAV:
1711- case SCMEM_TFBUF:
1712- case SCMEM_RING:
1713- case SCMEM_SCATTER:
1714- if (group_is_multi_wave || fence_is_global) {
1715- EmitWaitcnt |= ScoreBrackets->updateByWait(EXP_CNT,
1716- ScoreBrackets->getScoreUB(EXP_CNT));
1717- EmitWaitcnt |= ScoreBrackets->updateByWait(LOAD_CNT,
1718- ScoreBrackets->getScoreUB(LOAD_CNT));
1719- }
1720- break;
1721-
1722- case SCMEM_SCRATCH:
1723- default:
1724- break;
1725- }
1726- }
1727- }
1728- #endif
17291676
17301677 // Export & GDS instructions do not read the EXEC mask until after the export
17311678 // is granted (which can occur well after the instruction is issued).
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