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davemgreendavemgreen
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[AArch64] Avoid generating LDAPUR on certain cores (#124274)
On the CPUs listed below, we want to avoid LDAPUR for performance reasons. Add a tuning feature to disable them when using: -mcpu=neoverse-v2 -mcpu=neoverse-v3 -mcpu=cortex-x3 -mcpu=cortex-x4 -mcpu=cortex-x925
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+127
-35
lines changed

5 files changed

+127
-35
lines changed

‎llvm/lib/Target/AArch64/AArch64Features.td‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -805,10 +805,14 @@ def FeatureLdpAlignedOnly : SubtargetFeature<"ldp-aligned-only", "HasLdpAlignedO
805805
def FeatureStpAlignedOnly : SubtargetFeature<"stp-aligned-only", "HasStpAlignedOnly",
806806
"true", "In order to emit stp, first check if the store will be aligned to 2 * element_size">;
807807

808-
def FeatureUseFixedOverScalableIfEqualCost: SubtargetFeature<"use-fixed-over-scalable-if-equal-cost",
808+
def FeatureUseFixedOverScalableIfEqualCost : SubtargetFeature<"use-fixed-over-scalable-if-equal-cost",
809809
"UseFixedOverScalableIfEqualCost", "true",
810810
"Prefer fixed width loop vectorization over scalable if the cost-model assigns equal costs">;
811811

812+
// For performance reasons we prefer to use ldapr to ldapur on certain cores.
813+
def FeatureAvoidLDAPUR : SubtargetFeature<"avoid-ldapur", "AvoidLDAPUR", "true",
814+
"Prefer add+ldapr to offset ldapur">;
815+
812816
//===----------------------------------------------------------------------===//
813817
// Architectures.
814818
//

‎llvm/lib/Target/AArch64/AArch64InstrAtomics.td‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -575,7 +575,7 @@ let Predicates = [HasRCPC3, HasNEON] in {
575575
}
576576

577577
// v8.4a FEAT_LRCPC2 patterns
578-
let Predicates = [HasRCPC_IMMO] in {
578+
let Predicates = [HasRCPC_IMMO, UseLDAPUR] in {
579579
// Load-Acquire RCpc Register unscaled loads
580580
def : Pat<(acquiring_load<atomic_load_az_8>
581581
(am_unscaled8 GPR64sp:$Rn, simm9:$offset)),
@@ -589,7 +589,9 @@ let Predicates = [HasRCPC_IMMO] in {
589589
def : Pat<(acquiring_load<atomic_load_64>
590590
(am_unscaled64 GPR64sp:$Rn, simm9:$offset)),
591591
(LDAPURXi GPR64sp:$Rn, simm9:$offset)>;
592+
}
592593

594+
let Predicates = [HasRCPC_IMMO] in {
593595
// Store-Release Register unscaled stores
594596
def : Pat<(releasing_store<atomic_store_8>
595597
(am_unscaled8 GPR64sp:$Rn, simm9:$offset), GPR32:$val),

‎llvm/lib/Target/AArch64/AArch64InstrInfo.td‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -389,6 +389,8 @@ def NoUseScalarIncVL : Predicate<"!Subtarget->useScalarIncVL()">;
389389

390390
def UseSVEFPLD1R : Predicate<"!Subtarget->noSVEFPLD1R()">;
391391

392+
def UseLDAPUR : Predicate<"!Subtarget->avoidLDAPUR()">;
393+
392394
def AArch64LocalRecover : SDNode<"ISD::LOCAL_RECOVER",
393395
SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>,
394396
SDTCisInt<1>]>>;

‎llvm/lib/Target/AArch64/AArch64Processors.td‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -240,6 +240,7 @@ def TuneX3 : SubtargetFeature<"cortex-x3", "ARMProcFamily", "CortexX3",
240240
FeaturePostRAScheduler,
241241
FeatureEnableSelectOptimize,
242242
FeatureUseFixedOverScalableIfEqualCost,
243+
FeatureAvoidLDAPUR,
243244
FeaturePredictableSelectIsExpensive]>;
244245

245246
def TuneX4 : SubtargetFeature<"cortex-x4", "ARMProcFamily", "CortexX4",
@@ -250,6 +251,7 @@ def TuneX4 : SubtargetFeature<"cortex-x4", "ARMProcFamily", "CortexX4",
250251
FeaturePostRAScheduler,
251252
FeatureEnableSelectOptimize,
252253
FeatureUseFixedOverScalableIfEqualCost,
254+
FeatureAvoidLDAPUR,
253255
FeaturePredictableSelectIsExpensive]>;
254256

255257
def TuneX925 : SubtargetFeature<"cortex-x925", "ARMProcFamily",
@@ -260,6 +262,7 @@ def TuneX925 : SubtargetFeature<"cortex-x925", "ARMProcFamily",
260262
FeaturePostRAScheduler,
261263
FeatureEnableSelectOptimize,
262264
FeatureUseFixedOverScalableIfEqualCost,
265+
FeatureAvoidLDAPUR,
263266
FeaturePredictableSelectIsExpensive]>;
264267

265268
def TuneA64FX : SubtargetFeature<"a64fx", "ARMProcFamily", "A64FX",
@@ -540,6 +543,7 @@ def TuneNeoverseV2 : SubtargetFeature<"neoversev2", "ARMProcFamily", "NeoverseV2
540543
FeaturePostRAScheduler,
541544
FeatureEnableSelectOptimize,
542545
FeatureUseFixedOverScalableIfEqualCost,
546+
FeatureAvoidLDAPUR,
543547
FeaturePredictableSelectIsExpensive]>;
544548

545549
def TuneNeoverseV3 : SubtargetFeature<"neoversev3", "ARMProcFamily", "NeoverseV3",
@@ -549,6 +553,7 @@ def TuneNeoverseV3 : SubtargetFeature<"neoversev3", "ARMProcFamily", "NeoverseV3
549553
FeatureFuseAdrpAdd,
550554
FeaturePostRAScheduler,
551555
FeatureEnableSelectOptimize,
556+
FeatureAvoidLDAPUR,
552557
FeaturePredictableSelectIsExpensive]>;
553558

554559
def TuneNeoverseV3AE : SubtargetFeature<"neoversev3AE", "ARMProcFamily", "NeoverseV3",
@@ -558,6 +563,7 @@ def TuneNeoverseV3AE : SubtargetFeature<"neoversev3AE", "ARMProcFamily", "Neover
558563
FeatureFuseAdrpAdd,
559564
FeaturePostRAScheduler,
560565
FeatureEnableSelectOptimize,
566+
FeatureAvoidLDAPUR,
561567
FeaturePredictableSelectIsExpensive]>;
562568

563569
def TuneSaphira : SubtargetFeature<"saphira", "ARMProcFamily", "Saphira",

‎llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll‎

Lines changed: 111 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,12 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "(?!^\s*lda.*\bsp\b)^\s*.*\bsp\b" --filter "^\s*(ld|st[^r]|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)"
22
; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.4a -mattr=+rcpc-immo -global-isel=true -global-isel-abort=2 -O0 | FileCheck %s --check-prefixes=CHECK,GISEL
3-
; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.4a -mattr=+rcpc-immo -global-isel=false -O1 | FileCheck %s --check-prefixes=CHECK,SDAG
3+
; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.4a -mattr=+rcpc-immo -global-isel=false -O1 | FileCheck %s --check-prefixes=CHECK,SDAG,SDAG-NOAVOIDLDAPUR
4+
; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.4a -mattr=+rcpc-immo,avoid-ldapur -global-isel=false -O1 | FileCheck %s --check-prefixes=CHECK,SDAG,SDAG-AVOIDLDAPUR
5+
; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mcpu=neoverse-v2 -global-isel=false -O1 | FileCheck %s --check-prefixes=CHECK,SDAG,SDAG-AVOIDLDAPUR
6+
; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mcpu=neoverse-v3 -global-isel=false -O1 | FileCheck %s --check-prefixes=CHECK,SDAG,SDAG-AVOIDLDAPUR
7+
; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mcpu=cortex-x3 -global-isel=false -O1 | FileCheck %s --check-prefixes=CHECK,SDAG,SDAG-AVOIDLDAPUR
8+
; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mcpu=cortex-x4 -global-isel=false -O1 | FileCheck %s --check-prefixes=CHECK,SDAG,SDAG-AVOIDLDAPUR
9+
; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mcpu=cortex-x925 -global-isel=false -O1 | FileCheck %s --check-prefixes=CHECK,SDAG,SDAG-AVOIDLDAPUR
410

511
define i8 @load_atomic_i8_aligned_unordered(ptr %ptr) {
612
; CHECK-LABEL: load_atomic_i8_aligned_unordered:
@@ -39,8 +45,12 @@ define i8 @load_atomic_i8_aligned_acquire(ptr %ptr) {
3945
; GISEL: add x8, x0, #4
4046
; GISEL: ldaprb w0, [x8]
4147
;
42-
; SDAG-LABEL: load_atomic_i8_aligned_acquire:
43-
; SDAG: ldapurb w0, [x0, #4]
48+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i8_aligned_acquire:
49+
; SDAG-NOAVOIDLDAPUR: ldapurb w0, [x0, #4]
50+
;
51+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i8_aligned_acquire:
52+
; SDAG-AVOIDLDAPUR: add x8, x0, #4
53+
; SDAG-AVOIDLDAPUR: ldaprb w0, [x8]
4454
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
4555
%r = load atomic i8, ptr %gep acquire, align 1
4656
ret i8 %r
@@ -51,8 +61,12 @@ define i8 @load_atomic_i8_aligned_acquire_const(ptr readonly %ptr) {
5161
; GISEL: add x8, x0, #4
5262
; GISEL: ldaprb w0, [x8]
5363
;
54-
; SDAG-LABEL: load_atomic_i8_aligned_acquire_const:
55-
; SDAG: ldapurb w0, [x0, #4]
64+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i8_aligned_acquire_const:
65+
; SDAG-NOAVOIDLDAPUR: ldapurb w0, [x0, #4]
66+
;
67+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i8_aligned_acquire_const:
68+
; SDAG-AVOIDLDAPUR: add x8, x0, #4
69+
; SDAG-AVOIDLDAPUR: ldaprb w0, [x8]
5670
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
5771
%r = load atomic i8, ptr %gep acquire, align 1
5872
ret i8 %r
@@ -113,8 +127,12 @@ define i16 @load_atomic_i16_aligned_acquire(ptr %ptr) {
113127
; GISEL: add x8, x0, #8
114128
; GISEL: ldaprh w0, [x8]
115129
;
116-
; SDAG-LABEL: load_atomic_i16_aligned_acquire:
117-
; SDAG: ldapurh w0, [x0, #8]
130+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i16_aligned_acquire:
131+
; SDAG-NOAVOIDLDAPUR: ldapurh w0, [x0, #8]
132+
;
133+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i16_aligned_acquire:
134+
; SDAG-AVOIDLDAPUR: add x8, x0, #8
135+
; SDAG-AVOIDLDAPUR: ldaprh w0, [x8]
118136
%gep = getelementptr inbounds i16, ptr %ptr, i32 4
119137
%r = load atomic i16, ptr %gep acquire, align 2
120138
ret i16 %r
@@ -125,8 +143,12 @@ define i16 @load_atomic_i16_aligned_acquire_const(ptr readonly %ptr) {
125143
; GISEL: add x8, x0, #8
126144
; GISEL: ldaprh w0, [x8]
127145
;
128-
; SDAG-LABEL: load_atomic_i16_aligned_acquire_const:
129-
; SDAG: ldapurh w0, [x0, #8]
146+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i16_aligned_acquire_const:
147+
; SDAG-NOAVOIDLDAPUR: ldapurh w0, [x0, #8]
148+
;
149+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i16_aligned_acquire_const:
150+
; SDAG-AVOIDLDAPUR: add x8, x0, #8
151+
; SDAG-AVOIDLDAPUR: ldaprh w0, [x8]
130152
%gep = getelementptr inbounds i16, ptr %ptr, i32 4
131153
%r = load atomic i16, ptr %gep acquire, align 2
132154
ret i16 %r
@@ -183,16 +205,30 @@ define i32 @load_atomic_i32_aligned_monotonic_const(ptr readonly %ptr) {
183205
}
184206

185207
define i32 @load_atomic_i32_aligned_acquire(ptr %ptr) {
186-
; CHECK-LABEL: load_atomic_i32_aligned_acquire:
187-
; CHECK: ldapur w0, [x0, #16]
208+
; GISEL-LABEL: load_atomic_i32_aligned_acquire:
209+
; GISEL: ldapur w0, [x0, #16]
210+
;
211+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i32_aligned_acquire:
212+
; SDAG-NOAVOIDLDAPUR: ldapur w0, [x0, #16]
213+
;
214+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i32_aligned_acquire:
215+
; SDAG-AVOIDLDAPUR: add x8, x0, #16
216+
; SDAG-AVOIDLDAPUR: ldapr w0, [x8]
188217
%gep = getelementptr inbounds i32, ptr %ptr, i32 4
189218
%r = load atomic i32, ptr %gep acquire, align 4
190219
ret i32 %r
191220
}
192221

193222
define i32 @load_atomic_i32_aligned_acquire_const(ptr readonly %ptr) {
194-
; CHECK-LABEL: load_atomic_i32_aligned_acquire_const:
195-
; CHECK: ldapur w0, [x0, #16]
223+
; GISEL-LABEL: load_atomic_i32_aligned_acquire_const:
224+
; GISEL: ldapur w0, [x0, #16]
225+
;
226+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i32_aligned_acquire_const:
227+
; SDAG-NOAVOIDLDAPUR: ldapur w0, [x0, #16]
228+
;
229+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i32_aligned_acquire_const:
230+
; SDAG-AVOIDLDAPUR: add x8, x0, #16
231+
; SDAG-AVOIDLDAPUR: ldapr w0, [x8]
196232
%gep = getelementptr inbounds i32, ptr %ptr, i32 4
197233
%r = load atomic i32, ptr %gep acquire, align 4
198234
ret i32 %r
@@ -249,16 +285,30 @@ define i64 @load_atomic_i64_aligned_monotonic_const(ptr readonly %ptr) {
249285
}
250286

251287
define i64 @load_atomic_i64_aligned_acquire(ptr %ptr) {
252-
; CHECK-LABEL: load_atomic_i64_aligned_acquire:
253-
; CHECK: ldapur x0, [x0, #32]
288+
; GISEL-LABEL: load_atomic_i64_aligned_acquire:
289+
; GISEL: ldapur x0, [x0, #32]
290+
;
291+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i64_aligned_acquire:
292+
; SDAG-NOAVOIDLDAPUR: ldapur x0, [x0, #32]
293+
;
294+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i64_aligned_acquire:
295+
; SDAG-AVOIDLDAPUR: add x8, x0, #32
296+
; SDAG-AVOIDLDAPUR: ldapr x0, [x8]
254297
%gep = getelementptr inbounds i64, ptr %ptr, i32 4
255298
%r = load atomic i64, ptr %gep acquire, align 8
256299
ret i64 %r
257300
}
258301

259302
define i64 @load_atomic_i64_aligned_acquire_const(ptr readonly %ptr) {
260-
; CHECK-LABEL: load_atomic_i64_aligned_acquire_const:
261-
; CHECK: ldapur x0, [x0, #32]
303+
; GISEL-LABEL: load_atomic_i64_aligned_acquire_const:
304+
; GISEL: ldapur x0, [x0, #32]
305+
;
306+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i64_aligned_acquire_const:
307+
; SDAG-NOAVOIDLDAPUR: ldapur x0, [x0, #32]
308+
;
309+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i64_aligned_acquire_const:
310+
; SDAG-AVOIDLDAPUR: add x8, x0, #32
311+
; SDAG-AVOIDLDAPUR: ldapr x0, [x8]
262312
%gep = getelementptr inbounds i64, ptr %ptr, i32 4
263313
%r = load atomic i64, ptr %gep acquire, align 8
264314
ret i64 %r
@@ -387,8 +437,12 @@ define i8 @load_atomic_i8_unaligned_acquire(ptr %ptr) {
387437
; GISEL: add x8, x0, #4
388438
; GISEL: ldaprb w0, [x8]
389439
;
390-
; SDAG-LABEL: load_atomic_i8_unaligned_acquire:
391-
; SDAG: ldapurb w0, [x0, #4]
440+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i8_unaligned_acquire:
441+
; SDAG-NOAVOIDLDAPUR: ldapurb w0, [x0, #4]
442+
;
443+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i8_unaligned_acquire:
444+
; SDAG-AVOIDLDAPUR: add x8, x0, #4
445+
; SDAG-AVOIDLDAPUR: ldaprb w0, [x8]
392446
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
393447
%r = load atomic i8, ptr %gep acquire, align 1
394448
ret i8 %r
@@ -399,8 +453,12 @@ define i8 @load_atomic_i8_unaligned_acquire_const(ptr readonly %ptr) {
399453
; GISEL: add x8, x0, #4
400454
; GISEL: ldaprb w0, [x8]
401455
;
402-
; SDAG-LABEL: load_atomic_i8_unaligned_acquire_const:
403-
; SDAG: ldapurb w0, [x0, #4]
456+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i8_unaligned_acquire_const:
457+
; SDAG-NOAVOIDLDAPUR: ldapurb w0, [x0, #4]
458+
;
459+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i8_unaligned_acquire_const:
460+
; SDAG-AVOIDLDAPUR: add x8, x0, #4
461+
; SDAG-AVOIDLDAPUR: ldaprb w0, [x8]
404462
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
405463
%r = load atomic i8, ptr %gep acquire, align 1
406464
ret i8 %r
@@ -846,9 +904,14 @@ define i8 @load_atomic_i8_from_gep() {
846904
; GISEL: add x8, x8, #1
847905
; GISEL: ldaprb w0, [x8]
848906
;
849-
; SDAG-LABEL: load_atomic_i8_from_gep:
850-
; SDAG: bl init
851-
; SDAG: ldapurb w0, [sp, #13]
907+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i8_from_gep:
908+
; SDAG-NOAVOIDLDAPUR: bl init
909+
; SDAG-NOAVOIDLDAPUR: ldapurb w0, [sp, #13]
910+
;
911+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i8_from_gep:
912+
; SDAG-AVOIDLDAPUR: bl init
913+
; SDAG-AVOIDLDAPUR: orr x8, x19, #0x1
914+
; SDAG-AVOIDLDAPUR: ldaprb w0, [x8]
852915
%a = alloca [3 x i8]
853916
call void @init(ptr %a)
854917
%arrayidx = getelementptr [3 x i8], ptr %a, i64 0, i64 1
@@ -862,9 +925,14 @@ define i16 @load_atomic_i16_from_gep() {
862925
; GISEL: add x8, x8, #2
863926
; GISEL: ldaprh w0, [x8]
864927
;
865-
; SDAG-LABEL: load_atomic_i16_from_gep:
866-
; SDAG: bl init
867-
; SDAG: ldapurh w0, [sp, #10]
928+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i16_from_gep:
929+
; SDAG-NOAVOIDLDAPUR: bl init
930+
; SDAG-NOAVOIDLDAPUR: ldapurh w0, [sp, #10]
931+
;
932+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i16_from_gep:
933+
; SDAG-AVOIDLDAPUR: bl init
934+
; SDAG-AVOIDLDAPUR: orr x8, x19, #0x2
935+
; SDAG-AVOIDLDAPUR: ldaprh w0, [x8]
868936
%a = alloca [3 x i16]
869937
call void @init(ptr %a)
870938
%arrayidx = getelementptr [3 x i16], ptr %a, i64 0, i64 1
@@ -877,9 +945,14 @@ define i32 @load_atomic_i32_from_gep() {
877945
; GISEL: bl init
878946
; GISEL: ldapur w0, [x8, #4]
879947
;
880-
; SDAG-LABEL: load_atomic_i32_from_gep:
881-
; SDAG: bl init
882-
; SDAG: ldapur w0, [sp, #8]
948+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i32_from_gep:
949+
; SDAG-NOAVOIDLDAPUR: bl init
950+
; SDAG-NOAVOIDLDAPUR: ldapur w0, [sp, #8]
951+
;
952+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i32_from_gep:
953+
; SDAG-AVOIDLDAPUR: bl init
954+
; SDAG-AVOIDLDAPUR: add x8, x19, #4
955+
; SDAG-AVOIDLDAPUR: ldapr w0, [x8]
883956
%a = alloca [3 x i32]
884957
call void @init(ptr %a)
885958
%arrayidx = getelementptr [3 x i32], ptr %a, i64 0, i64 1
@@ -892,9 +965,14 @@ define i64 @load_atomic_i64_from_gep() {
892965
; GISEL: bl init
893966
; GISEL: ldapur x0, [x8, #8]
894967
;
895-
; SDAG-LABEL: load_atomic_i64_from_gep:
896-
; SDAG: bl init
897-
; SDAG: ldapur x0, [sp, #16]
968+
; SDAG-NOAVOIDLDAPUR-LABEL: load_atomic_i64_from_gep:
969+
; SDAG-NOAVOIDLDAPUR: bl init
970+
; SDAG-NOAVOIDLDAPUR: ldapur x0, [sp, #16]
971+
;
972+
; SDAG-AVOIDLDAPUR-LABEL: load_atomic_i64_from_gep:
973+
; SDAG-AVOIDLDAPUR: bl init
974+
; SDAG-AVOIDLDAPUR: add x8, x19, #8
975+
; SDAG-AVOIDLDAPUR: ldapr x0, [x8]
898976
%a = alloca [3 x i64]
899977
call void @init(ptr %a)
900978
%arrayidx = getelementptr [3 x i64], ptr %a, i64 0, i64 1

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