as

Author: optimisan

llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp

@@ -726,16 +726,7 @@ class SIInsertWaitcntsLegacy : public MachineFunctionPass {
   static char ID;
   SIInsertWaitcntsLegacy() : MachineFunctionPass(ID) {}
 
-  bool runOnMachineFunction(MachineFunction &MF) override {
-    auto *MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
-    auto *PDT =
-        &getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree();
-    AliasAnalysis *AA = nullptr;
-    if (auto *AAR = getAnalysisIfAvailable<AAResultsWrapperPass>())
-      AA = &AAR->getAAResults();
-
-    return SIInsertWaitcnts(MLI, PDT, AA).run(MF);
-  }
+  bool runOnMachineFunction(MachineFunction &MF) override;
 
   StringRef getPassName() const override {
     return "SI insert wait instructions";
@@ -2411,6 +2402,17 @@ bool SIInsertWaitcnts::shouldFlushVmCnt(MachineLoop *ML,
   return HasVMemLoad && UsesVgprLoadedOutside && ST->hasVmemWriteVgprInOrder();
 }
 
+bool SIInsertWaitcntsLegacy::runOnMachineFunction(MachineFunction &MF) {
+  auto *MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
+  auto *PDT =
+      &getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree();
+  AliasAnalysis *AA = nullptr;
+  if (auto *AAR = getAnalysisIfAvailable<AAResultsWrapperPass>())
+    AA = &AAR->getAAResults();
+
+  return SIInsertWaitcnts(MLI, PDT, AA).run(MF);
+}
+
 PreservedAnalyses
 SIInsertWaitcntsPass::run(MachineFunction &MF,
                           MachineFunctionAnalysisManager &MFAM) {

llvm/test/CodeGen/AMDGPU/call-waw-waitcnt.mir

@@ -1,6 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs -run-pass=si-insert-waitcnts %s -o - | FileCheck -check-prefix=GCN %s
-# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs -passes=si-insert-waitcnts %s -o - | FileCheck -check-prefix=GCN %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -passes=si-insert-waitcnts %s -o - | FileCheck -check-prefix=GCN %s
 
 # $sgpr30_sgpr31 will hold the return address. We need a waitcnt before SI_CALL so
 # that the return address is not clobbered in the callee by the outstanding load.