merge exec check

Author: arsenm

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

@@ -4767,14 +4767,10 @@ bool SIInstrInfo::physRegUsesConstantBus(const MachineOperand &RegOp) const {
   // SGPRs use the constant bus
 
   // FIXME: implicit registers that are not part of the MCInstrDesc's implicit
-  // physical register operands should also count.
+  // physical register operands should also count, except for exec.
   if (RegOp.isImplicit())
     return Reg == AMDGPU::VCC || Reg == AMDGPU::VCC_LO || Reg == AMDGPU::M0;
 
-  // Normal exec read does not count.
-  if ((Reg == AMDGPU::EXEC || Reg == AMDGPU::EXEC_LO) && RegOp.isImplicit())
-    return false;
-
   // SGPRs use the constant bus
   return AMDGPU::SReg_32RegClass.contains(Reg) ||
          AMDGPU::SReg_64RegClass.contains(Reg);