@@ -70,6 +70,108 @@ define <2 x i64> @freeze_zext_vec(<2 x i16> %a0) nounwind {
7070 ret <2 x i64 > %z
7171}
7272
73+ define i32 @freeze_abs (i32 %a0 ) nounwind {
74+ ; X86-LABEL: freeze_abs:
75+ ; X86: # %bb.0:
76+ ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
77+ ; X86-NEXT: movl %eax, %ecx
78+ ; X86-NEXT: negl %ecx
79+ ; X86-NEXT: cmovsl %eax, %ecx
80+ ; X86-NEXT: movl %ecx, %eax
81+ ; X86-NEXT: negl %eax
82+ ; X86-NEXT: cmovsl %ecx, %eax
83+ ; X86-NEXT: retl
84+ ;
85+ ; X64-LABEL: freeze_abs:
86+ ; X64: # %bb.0:
87+ ; X64-NEXT: movl %edi, %ecx
88+ ; X64-NEXT: negl %ecx
89+ ; X64-NEXT: cmovsl %edi, %ecx
90+ ; X64-NEXT: movl %ecx, %eax
91+ ; X64-NEXT: negl %eax
92+ ; X64-NEXT: cmovsl %ecx, %eax
93+ ; X64-NEXT: retq
94+ %x = call i32 @llvm.abs.i32 (i32 %a0 , i1 0 )
95+ %f = freeze i32 %x
96+ %r = call i32 @llvm.abs.i32 (i32 %f , i1 0 )
97+ ret i32 %r
98+ }
99+
100+ define <4 x i32 > @freeze_abs_vec (<4 x i32 > %a0 ) nounwind {
101+ ; X86-LABEL: freeze_abs_vec:
102+ ; X86: # %bb.0:
103+ ; X86-NEXT: movdqa %xmm0, %xmm1
104+ ; X86-NEXT: psrad $31, %xmm1
105+ ; X86-NEXT: pxor %xmm1, %xmm0
106+ ; X86-NEXT: psubd %xmm1, %xmm0
107+ ; X86-NEXT: movdqa %xmm0, %xmm1
108+ ; X86-NEXT: psrad $31, %xmm1
109+ ; X86-NEXT: pxor %xmm1, %xmm0
110+ ; X86-NEXT: psubd %xmm1, %xmm0
111+ ; X86-NEXT: retl
112+ ;
113+ ; X64-LABEL: freeze_abs_vec:
114+ ; X64: # %bb.0:
115+ ; X64-NEXT: pabsd %xmm0, %xmm0
116+ ; X64-NEXT: pabsd %xmm0, %xmm0
117+ ; X64-NEXT: retq
118+ %x = call <4 x i32 > @llvm.abs.v4i32 (<4 x i32 > %a0 , i1 0 )
119+ %f = freeze <4 x i32 > %x
120+ %r = call <4 x i32 > @llvm.abs.v4i32 (<4 x i32 > %f , i1 0 )
121+ ret <4 x i32 > %r
122+ }
123+
124+ define i32 @freeze_abs_undef (i32 %a0 ) nounwind {
125+ ; X86-LABEL: freeze_abs_undef:
126+ ; X86: # %bb.0:
127+ ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
128+ ; X86-NEXT: movl %eax, %ecx
129+ ; X86-NEXT: negl %ecx
130+ ; X86-NEXT: cmovsl %eax, %ecx
131+ ; X86-NEXT: movl %ecx, %eax
132+ ; X86-NEXT: negl %eax
133+ ; X86-NEXT: cmovsl %ecx, %eax
134+ ; X86-NEXT: retl
135+ ;
136+ ; X64-LABEL: freeze_abs_undef:
137+ ; X64: # %bb.0:
138+ ; X64-NEXT: movl %edi, %ecx
139+ ; X64-NEXT: negl %ecx
140+ ; X64-NEXT: cmovsl %edi, %ecx
141+ ; X64-NEXT: movl %ecx, %eax
142+ ; X64-NEXT: negl %eax
143+ ; X64-NEXT: cmovsl %ecx, %eax
144+ ; X64-NEXT: retq
145+ %x = call i32 @llvm.abs.i32 (i32 %a0 , i1 -1 )
146+ %f = freeze i32 %x
147+ %r = call i32 @llvm.abs.i32 (i32 %f , i1 -1 )
148+ ret i32 %r
149+ }
150+
151+ define <4 x i32 > @freeze_abs_undef_vec (<4 x i32 > %a0 ) nounwind {
152+ ; X86-LABEL: freeze_abs_undef_vec:
153+ ; X86: # %bb.0:
154+ ; X86-NEXT: movdqa %xmm0, %xmm1
155+ ; X86-NEXT: psrad $31, %xmm1
156+ ; X86-NEXT: pxor %xmm1, %xmm0
157+ ; X86-NEXT: psubd %xmm1, %xmm0
158+ ; X86-NEXT: movdqa %xmm0, %xmm1
159+ ; X86-NEXT: psrad $31, %xmm1
160+ ; X86-NEXT: pxor %xmm1, %xmm0
161+ ; X86-NEXT: psubd %xmm1, %xmm0
162+ ; X86-NEXT: retl
163+ ;
164+ ; X64-LABEL: freeze_abs_undef_vec:
165+ ; X64: # %bb.0:
166+ ; X64-NEXT: pabsd %xmm0, %xmm0
167+ ; X64-NEXT: pabsd %xmm0, %xmm0
168+ ; X64-NEXT: retq
169+ %x = call <4 x i32 > @llvm.abs.v4i32 (<4 x i32 > %a0 , i1 -1 )
170+ %f = freeze <4 x i32 > %x
171+ %r = call <4 x i32 > @llvm.abs.v4i32 (<4 x i32 > %f , i1 -1 )
172+ ret <4 x i32 > %r
173+ }
174+
73175define i32 @freeze_bswap (i32 %a0 ) nounwind {
74176; X86-LABEL: freeze_bswap:
75177; X86: # %bb.0:
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